]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
OMAP clock: drop RATE_FIXED
authorPaul Walmsley <paul@pwsan.com>
Wed, 7 Jan 2009 15:20:25 +0000 (17:20 +0200)
committerTony Lindgren <tony@atomide.com>
Wed, 7 Jan 2009 15:20:25 +0000 (17:20 +0200)
The RATE_FIXED flag currently has no useful purpose.  Fixed rate clocks
should simply not implement the recalc, set_rate, set_parent, and round_rate
function pointers.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap1/clock.c
arch/arm/mach-omap1/clock.h
arch/arm/mach-omap2/clock.c
arch/arm/mach-omap2/clock24xx.h
arch/arm/mach-omap2/clock34xx.h
arch/arm/plat-omap/include/mach/clock.h

index f3cf6f8156b7162aa82e0b0f76bc3d4b0b8ac6c0..af480505dadb52e6a8c8a0ffd947ac3701a99bbd 100644 (file)
@@ -570,9 +570,6 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
 {
        int dsor_exp;
 
-       if (clk->flags & RATE_FIXED)
-               return clk->rate;
-
        if (clk->flags & RATE_CKCTL) {
                dsor_exp = calc_dsor_exp(clk, rate);
                if (dsor_exp < 0)
index d9f34d3e61464bfbc136a6fe82ba0b8d3e5f8f57..564f4bc44ef59cc57cd05243f1ff25842cf18916 100644 (file)
@@ -554,8 +554,8 @@ static struct uart_clk uart1_16xx = {
                /* Direct from ULPD, no real parent */
                .parent         = &armper_ck.clk,
                .rate           = 48000000,
-               .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
-                                 ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+               .flags          = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
+                                 CLOCK_NO_IDLE_PARENT,
                .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
                .enable_bit     = 29,
                .enable         = &omap1_clk_enable_uart_functional,
@@ -602,8 +602,8 @@ static struct uart_clk uart3_16xx = {
                /* Direct from ULPD, no real parent */
                .parent         = &armper_ck.clk,
                .rate           = 48000000,
-               .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
-                                 ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+               .flags          = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
+                                 CLOCK_NO_IDLE_PARENT,
                .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
                .enable_bit     = 31,
                .enable         = &omap1_clk_enable_uart_functional,
@@ -617,7 +617,7 @@ static struct clk usb_clko = {      /* 6 MHz output on W4_USB_CLKO */
        /* Direct from ULPD, no parent */
        .rate           = 6000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
+                         CLOCK_IN_OMAP310 | ENABLE_REG_32BIT,
        .enable_reg     = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
        .enable_bit     = USB_MCLK_EN_BIT,
        .enable         = &omap1_clk_enable_generic,
@@ -629,7 +629,7 @@ static struct clk usb_hhc_ck1510 = {
        /* Direct from ULPD, no parent */
        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
-                         RATE_FIXED | ENABLE_REG_32BIT,
+                         ENABLE_REG_32BIT,
        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = USB_HOST_HHC_UHOST_EN,
        .enable         = &omap1_clk_enable_generic,
@@ -641,8 +641,7 @@ static struct clk usb_hhc_ck16xx = {
        /* Direct from ULPD, no parent */
        .rate           = 48000000,
        /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
-       .flags          = CLOCK_IN_OMAP16XX |
-                         RATE_FIXED | ENABLE_REG_32BIT,
+       .flags          = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT,
        .enable_reg     = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
        .enable_bit     = 8 /* UHOST_EN */,
        .enable         = &omap1_clk_enable_generic,
@@ -653,7 +652,7 @@ static struct clk usb_dc_ck = {
        .name           = "usb_dc_ck",
        /* Direct from ULPD, no parent */
        .rate           = 48000000,
-       .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED,
+       .flags          = CLOCK_IN_OMAP16XX,
        .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
        .enable_bit     = 4,
        .enable         = &omap1_clk_enable_generic,
@@ -664,9 +663,9 @@ static struct clk mclk_1510 = {
        .name           = "mclk",
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
-       .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
-       .enable_bit     = 6,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
+       .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+       .enable_bit     = 6,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
 };
@@ -688,7 +687,7 @@ static struct clk bclk_1510 = {
        .name           = "bclk",
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
 };
@@ -712,7 +711,7 @@ static struct clk mmc1_ck = {
        .parent         = &armper_ck.clk,
        .rate           = 48000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
+                         CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
                          CLOCK_NO_IDLE_PARENT,
        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 23,
@@ -726,8 +725,8 @@ static struct clk mmc2_ck = {
        /* Functional clock is direct from ULPD, interface clock is ARMPER */
        .parent         = &armper_ck.clk,
        .rate           = 48000000,
-       .flags          = CLOCK_IN_OMAP16XX |
-                         RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+       .flags          = CLOCK_IN_OMAP16XX | ENABLE_REG_32BIT |
+                         CLOCK_NO_IDLE_PARENT,
        .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 20,
        .enable         = &omap1_clk_enable_generic,
index 4d04e9f97349b536d48b7bf10e5321d1d3902fb4..31b5c9dc06631f6969e710ef490ed5d4e3c72458 100644 (file)
@@ -644,10 +644,6 @@ long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
        if (clk->round_rate != NULL)
                return clk->round_rate(clk, rate);
 
-       if (clk->flags & RATE_FIXED)
-               printk(KERN_ERR "clock: generic omap2_clk_round_rate called "
-                      "on fixed-rate clock %s\n", clk->name);
-
        return clk->rate;
 }
 
index 88ba9cfc7bcd544976c2e8849163986bcaa9bd47..824413d17c51f43b400d0c4b2d6887bc2bf2cfa6 100644 (file)
@@ -628,7 +628,7 @@ static struct clk func_32k_ck = {
        .name           = "func_32k_ck",
        .rate           = 32000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | ALWAYS_ENABLED,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
@@ -656,7 +656,7 @@ static struct clk alt_ck = {                /* Typical 54M or 48M, may not exist */
        .name           = "alt_ck",
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | ALWAYS_ENABLED,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
@@ -703,7 +703,7 @@ static struct clk apll96_ck = {
        .prcm_mod       = PLL_MOD,
        .rate           = 96000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | ENABLE_ON_INIT,
+                               ENABLE_ON_INIT,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_CLKEN,
        .enable_bit     = OMAP24XX_EN_96M_PLL_SHIFT,
@@ -717,7 +717,7 @@ static struct clk apll54_ck = {
        .prcm_mod       = PLL_MOD,
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | ENABLE_ON_INIT,
+                               ENABLE_ON_INIT,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_CLKEN,
        .enable_bit     = OMAP24XX_EN_54M_PLL_SHIFT,
index 2fde89eede9d5fc7767448f7bc34337782e32573..179ea1774d705b996a706ce487f5bc1f032189a4 100644 (file)
@@ -66,14 +66,14 @@ static struct clk dpll2_fck;
 static struct clk omap_32k_fck = {
        .name           = "omap_32k_fck",
        .rate           = 32768,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
 static struct clk secure_32k_fck = {
        .name           = "secure_32k_fck",
        .rate           = 32768,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
@@ -81,42 +81,42 @@ static struct clk secure_32k_fck = {
 static struct clk virt_12m_ck = {
        .name           = "virt_12m_ck",
        .rate           = 12000000,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
 static struct clk virt_13m_ck = {
        .name           = "virt_13m_ck",
        .rate           = 13000000,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
 static struct clk virt_16_8m_ck = {
        .name           = "virt_16_8m_ck",
        .rate           = 16800000,
-       .flags          = CLOCK_IN_OMAP3430ES2 | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP3430ES2 | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
 static struct clk virt_19_2m_ck = {
        .name           = "virt_19_2m_ck",
        .rate           = 19200000,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
 static struct clk virt_26m_ck = {
        .name           = "virt_26m_ck",
        .rate           = 26000000,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
 static struct clk virt_38_4m_ck = {
        .name           = "virt_38_4m_ck",
        .rate           = 38400000,
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED | ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
 };
 
@@ -170,8 +170,7 @@ static struct clk osc_sys_ck = {
        .clksel_mask    = OMAP3430_SYS_CLKIN_SEL_MASK,
        .clksel         = osc_sys_clksel,
        /* REVISIT: deal with autoextclkmode? */
-       .flags          = CLOCK_IN_OMAP343X | RATE_FIXED |
-                               ALWAYS_ENABLED,
+       .flags          = CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_clksel_recalc,
 };
index f01f59db35cb8f678e15c4b59bc3571a30d35f9c..4b9053194970a73843217ddef66d26f43180b485 100644 (file)
@@ -153,7 +153,7 @@ void omap_clk_del_child(struct clk *clk, struct clk *clk2);
 
 /* Clock flags */
 #define RATE_CKCTL             (1 << 0)        /* Main fixed ratio clocks */
-#define RATE_FIXED             (1 << 1)        /* Fixed clock rate */
+
 
 #define VIRTUAL_CLOCK          (1 << 3)        /* Composite clock from table */
 #define ALWAYS_ENABLED         (1 << 4)        /* Clock cannot be disabled */