]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
Set proper ATA UDMA mode for bf548 according to system clock.
authorsonic zhang <sonic.adi@gmail.com>
Tue, 27 Nov 2007 04:47:39 +0000 (12:47 +0800)
committerJeff Garzik <jeff@garzik.org>
Sat, 1 Dec 2007 22:35:58 +0000 (17:35 -0500)
UDMA Mode - Frequency compatibility

UDMA5 - 100 MB/s   - SCLK  = 133 MHz
UDMA4 - 66 MB/s    - SCLK >=  80 MHz
UDMA3 - 44.4 MB/s  - SCLK >=  50 MHz
UDMA2 - 33 MB/s    - SCLK >=  40 MHz

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
drivers/ata/pata_bf54x.c

index 81db405a5445bfe1a685cb374d406c4ac97de672..088a41f4e656ce57ebc36481e7b916f3df873440 100644 (file)
@@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev)
        int board_idx = 0;
        struct resource *res;
        struct ata_host *host;
+       unsigned int fsclk = get_sclk();
+       int udma_mode = 5;
        const struct ata_port_info *ppi[] =
                { &bfin_port_info[board_idx], NULL };
 
@@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev)
        if (res == NULL)
                return -EINVAL;
 
+       while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
+               udma_mode--;
+               bfin_port_info[board_idx].udma_mask >>= 1;
+       }
+
        /*
         * Now that that's out of the way, wire up the port..
         */