Commit
a63efb1547ac35dcb0f007090396a3c7510eb691 broke the dss1_alwon_fck
clock enable on 3430ES2+. The clock code was not waiting for the module
to come out of idle.
Problem reported by Rajendra Nayak <rnayak@ti.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
.prcm_mod = OMAP3430_DSS_MOD,
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP3430_EN_DSS1_SHIFT,
.prcm_mod = OMAP3430_DSS_MOD,
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP3430_EN_DSS1_SHIFT,
- .flags = CLOCK_IN_OMAP343X,
+ .flags = CLOCK_IN_OMAP3430ES1,
.clkdm = { .name = "dss_clkdm" },
.recalc = &followparent_recalc,
};
.clkdm = { .name = "dss_clkdm" },
.recalc = &followparent_recalc,
};
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP3430_EN_DSS1_SHIFT,
.idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
.enable_reg = CM_FCLKEN,
.enable_bit = OMAP3430_EN_DSS1_SHIFT,
.idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT,
- .flags = CLOCK_IN_OMAP343X | WAIT_READY,
+ .flags = CLOCK_IN_OMAP3430ES2 | WAIT_READY,
.clkdm = { .name = "dss_clkdm" },
.recalc = &followparent_recalc,
};
.clkdm = { .name = "dss_clkdm" },
.recalc = &followparent_recalc,
};