]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[ARM] 4351/1: AT91: Define rest of peripheral clocks
authorAndrew Victor <andrew@sanpeople.com>
Wed, 2 May 2007 16:14:57 +0000 (17:14 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 3 May 2007 13:10:21 +0000 (14:10 +0100)
Define and register the remaining peripheral clocks for the AT91
processors.

AT91SAM9261 clocks patch by Ivan Zhakov.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-at91/at91rm9200.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c

index 2ddcdd69df7d2267df116131323797f89a8ca3fa..2cad2bf864be3955a445f5ea7482d7a6edd30701 100644 (file)
@@ -117,6 +117,21 @@ static struct clk pioD_clk = {
        .pmc_mask       = 1 << AT91RM9200_ID_PIOD,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk ssc0_clk = {
+       .name           = "ssc0_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_SSC0,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc1_clk = {
+       .name           = "ssc1_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_SSC1,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc2_clk = {
+       .name           = "ssc2_clk",
+       .pmc_mask       = 1 << AT91RM9200_ID_SSC2,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk tc0_clk = {
        .name           = "tc0_clk",
        .pmc_mask       = 1 << AT91RM9200_ID_TC0,
@@ -161,7 +176,9 @@ static struct clk *periph_clocks[] __initdata = {
        &udc_clk,
        &twi_clk,
        &spi_clk,
-       // ssc 0 .. ssc2
+       &ssc0_clk,
+       &ssc1_clk,
+       &ssc2_clk,
        &tc0_clk,
        &tc1_clk,
        &tc2_clk,
index 6ea41d8266cbfca7e007db35f66ea867ea5bfc33..e47381e8aaba625e7abb5b6ff8cd0acc89ea04f5 100644 (file)
@@ -119,6 +119,11 @@ static struct clk spi1_clk = {
        .pmc_mask       = 1 << AT91SAM9260_ID_SPI1,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk ssc_clk = {
+       .name           = "ssc_clk",
+       .pmc_mask       = 1 << AT91SAM9260_ID_SSC,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk tc0_clk = {
        .name           = "tc0_clk",
        .pmc_mask       = 1 << AT91SAM9260_ID_TC0,
@@ -193,7 +198,7 @@ static struct clk *periph_clocks[] __initdata = {
        &twi_clk,
        &spi0_clk,
        &spi1_clk,
-       // ssc
+       &ssc_clk,
        &tc0_clk,
        &tc1_clk,
        &tc2_clk,
index 784d1e682d6db426fa19b2f4b1317da95a071e7b..dfe8c39c9fb9343a01910eee7ab7ef345ec8e527 100644 (file)
@@ -97,6 +97,21 @@ static struct clk spi1_clk = {
        .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk ssc0_clk = {
+       .name           = "ssc0_clk",
+       .pmc_mask       = 1 << AT91SAM9261_ID_SSC0,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc1_clk = {
+       .name           = "ssc1_clk",
+       .pmc_mask       = 1 << AT91SAM9261_ID_SSC1,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc2_clk = {
+       .name           = "ssc2_clk",
+       .pmc_mask       = 1 << AT91SAM9261_ID_SSC2,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk tc0_clk = {
        .name           = "tc0_clk",
        .pmc_mask       = 1 << AT91SAM9261_ID_TC0,
@@ -135,7 +150,9 @@ static struct clk *periph_clocks[] __initdata = {
        &twi_clk,
        &spi0_clk,
        &spi1_clk,
-       // ssc 0 .. ssc2
+       &ssc0_clk,
+       &ssc1_clk,
+       &ssc2_clk,
        &tc0_clk,
        &tc1_clk,
        &tc2_clk,
index 0e89a7fca3fa53df2bdbe2e799526903847d8477..00e27b177857e3dbe2623d8a4512c7251dbc7100 100644 (file)
@@ -87,6 +87,11 @@ static struct clk mmc1_clk = {
        .pmc_mask       = 1 << AT91SAM9263_ID_MCI1,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk can_clk = {
+       .name           = "can_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_CAN,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk twi_clk = {
        .name           = "twi_clk",
        .pmc_mask       = 1 << AT91SAM9263_ID_TWI,
@@ -102,16 +107,46 @@ static struct clk spi1_clk = {
        .pmc_mask       = 1 << AT91SAM9263_ID_SPI1,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk ssc0_clk = {
+       .name           = "ssc0_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_SSC0,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc1_clk = {
+       .name           = "ssc1_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_SSC1,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ac97_clk = {
+       .name           = "ac97_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_AC97C,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk tcb_clk = {
        .name           = "tcb_clk",
        .pmc_mask       = 1 << AT91SAM9263_ID_TCB,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk pwmc_clk = {
+       .name           = "pwmc_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_PWMC,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk macb_clk = {
        .name           = "macb_clk",
        .pmc_mask       = 1 << AT91SAM9263_ID_EMAC,
        .type           = CLK_TYPE_PERIPHERAL,
 };
+static struct clk dma_clk = {
+       .name           = "dma_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_DMA,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twodge_clk = {
+       .name           = "2dge_clk",
+       .pmc_mask       = 1 << AT91SAM9263_ID_2DGE,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
 static struct clk udc_clk = {
        .name           = "udc_clk",
        .pmc_mask       = 1 << AT91SAM9263_ID_UDP,
@@ -142,20 +177,21 @@ static struct clk *periph_clocks[] __initdata = {
        &usart2_clk,
        &mmc0_clk,
        &mmc1_clk,
-       // can
+       &can_clk,
        &twi_clk,
        &spi0_clk,
        &spi1_clk,
-       // ssc0 .. ssc1
-       // ac97
+       &ssc0_clk,
+       &ssc1_clk,
+       &ac97_clk,
        &tcb_clk,
-       // pwmc
+       &pwmc_clk,
        &macb_clk,
-       // 2dge
+       &twodge_clk,
        &udc_clk,
        &isi_clk,
        &lcdc_clk,
-       // dma
+       &dma_clk,
        &ohci_clk,
        // irq0 .. irq1
 };