]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
OMAP3 PRCM: add DPLL1-5 powerdomains, clockdomains
authorPaul Walmsley <paul@pwsan.com>
Wed, 10 Sep 2008 16:47:55 +0000 (10:47 -0600)
committerTony Lindgren <tony@atomide.com>
Fri, 12 Sep 2008 18:16:58 +0000 (11:16 -0700)
Each DPLL exists in its own powerdomain (cf 34xx TRM figure 4-18) and
clockdomain; so, create powerdomain and clockdomain structures for them.
These are used in a following patch for DPLL-related clocks.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/clockdomains.h
arch/arm/mach-omap2/powerdomains.h
arch/arm/mach-omap2/powerdomains34xx.h

index 215666899707d85da6b831bbadb48d90b9fb65d8..5234be156783d6b79a3532fec5247d7bf1364515 100644 (file)
@@ -249,6 +249,36 @@ static struct clockdomain emu_clkdm = {
        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
+static struct clockdomain dpll1_clkdm = {
+       .name           = "dpll1_clkdm",
+       .pwrdm          = { .name = "dpll1_pwrdm" },
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct clockdomain dpll2_clkdm = {
+       .name           = "dpll2_clkdm",
+       .pwrdm          = { .name = "dpll2_pwrdm" },
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct clockdomain dpll3_clkdm = {
+       .name           = "dpll3_clkdm",
+       .pwrdm          = { .name = "dpll3_pwrdm" },
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct clockdomain dpll4_clkdm = {
+       .name           = "dpll4_clkdm",
+       .pwrdm          = { .name = "dpll4_pwrdm" },
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct clockdomain dpll5_clkdm = {
+       .name           = "dpll5_clkdm",
+       .pwrdm          = { .name = "dpll5_pwrdm" },
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+};
+
 #endif   /* CONFIG_ARCH_OMAP34XX */
 
 /*
@@ -310,6 +340,11 @@ static struct clockdomain *clockdomains_omap[] = {
        &usbhost_clkdm,
        &per_clkdm,
        &emu_clkdm,
+       &dpll1_clkdm,
+       &dpll2_clkdm,
+       &dpll3_clkdm,
+       &dpll4_clkdm,
+       &dpll5_clkdm,
 #endif
 
        NULL,
index fba34406e6500f15882bf1066c1111fc3ed5547f..51623e275b4ea468f17dca4618784141d969cff2 100644 (file)
@@ -179,6 +179,11 @@ static struct powerdomain *powerdomains_omap[] __initdata = {
        &emu_pwrdm,
        &sgx_pwrdm,
        &usbhost_pwrdm,
+       &dpll1_pwrdm,
+       &dpll2_pwrdm,
+       &dpll3_pwrdm,
+       &dpll4_pwrdm,
+       &dpll5_pwrdm,
 #endif
 
        NULL
index adbfa9187a6c715c555ee7b3fe4f57c94f07e013..446a1edcb0824aed9849f3b0613179d7666021d8 100644 (file)
@@ -341,6 +341,37 @@ static struct powerdomain usbhost_pwrdm = {
        },
 };
 
+static struct powerdomain dpll1_pwrdm = {
+       .name           = "dpll1_pwrdm",
+       .prcm_offs      = MPU_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll2_pwrdm = {
+       .name           = "dpll2_pwrdm",
+       .prcm_offs      = OMAP3430_IVA2_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll3_pwrdm = {
+       .name           = "dpll3_pwrdm",
+       .prcm_offs      = PLL_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll4_pwrdm = {
+       .name           = "dpll4_pwrdm",
+       .prcm_offs      = PLL_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static struct powerdomain dpll5_pwrdm = {
+       .name           = "dpll5_pwrdm",
+       .prcm_offs      = PLL_MOD,
+       .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
+};
+
+
 #endif    /* CONFIG_ARCH_OMAP34XX */