]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
omap3: gpio pin config bugfixes
authorDavid Brownell <dbrownell@users.sourceforge.net>
Fri, 27 Feb 2009 22:46:08 +0000 (22:46 +0000)
committerTony Lindgren <tony@atomide.com>
Fri, 27 Feb 2009 22:48:10 +0000 (14:48 -0800)
Bugfix several GPIO mux configurations which didn't enable the
input drivers, but weren't named as e.g. ..._GPIO141_OUT.
These bugs were added quite recently, for OMAP3 EVM support.

To help avoid such bugs in the future, update the comment to
clarify the rule:  always use PIN_INPUT, unless the name uses
that name suffix, to be crystal-clear on the signal's use as
output-only.

(Also adds GPIO-63, for the EVM's MMC-1 writeprotect switch.
Presumably that works right...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/mux.c
arch/arm/plat-omap/include/mach/mux.h

index d226d817a6ad4757276099a269f9b35fd7f7db7b..9ed2e491ad2c2cb32312fb9aaf3ed7e14e462948 100644 (file)
@@ -453,6 +453,7 @@ MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
 
 
 /* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
+ * (Always specify PIN_INPUT, except for names suffixed by "_OUT".)
  * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
  */
 MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
@@ -460,17 +461,19 @@ MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
 MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("AF26_34XX_GPIO0", 0x1e0,
-               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("AF22_34XX_GPIO9", 0xa18,
-               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+MUX_CFG_34XX("L8_34XX_GPIO63", 0x0ce,
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("AF6_34XX_GPIO140_UP", 0x16c,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT_PULLUP)
 MUX_CFG_34XX("AE6_34XX_GPIO141", 0x16e,
-               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("AF5_34XX_GPIO142", 0x170,
-               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("AE5_34XX_GPIO143", 0x172,
-               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
+               OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
 MUX_CFG_34XX("AG4_34XX_GPIO134", 0x160,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
 MUX_CFG_34XX("U8_34XX_GPIO54", 0x0b4,
index ace037f15987a3f535920ed0745dded1ea30bc41..8d73a9a118b4015a51602593dcb3bc69e03a3a70 100644 (file)
@@ -792,6 +792,7 @@ enum omap34xx_index {
        J25_34XX_GPIO170,
        AF26_34XX_GPIO0,
        AF22_34XX_GPIO9,
+       L8_34XX_GPIO63,
        AF6_34XX_GPIO140_UP,
        AE6_34XX_GPIO141,
        AF5_34XX_GPIO142,