]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
oprofile: Fix p6 counter overflow check
authorAndi Kleen <andi@firstfloor.org>
Fri, 7 Nov 2008 13:02:49 +0000 (14:02 +0100)
committerRobert Richter <robert.richter@amd.com>
Fri, 7 Nov 2008 16:34:41 +0000 (17:34 +0100)
Fix the counter overflow check for CPUs with counter width > 32

I had a similar change in a different patch that I didn't submit
and I didn't notice the problem earlier because it was always
tested together.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
arch/x86/oprofile/op_model_ppro.c

index 0620d6d45f7d08f99e8974396260fb071f02948c..3f1b81a83e2e5be2ebd1cabde2a66b71ccd20306 100644 (file)
@@ -27,8 +27,7 @@ static int num_counters = 2;
 static int counter_width = 32;
 
 #define CTR_IS_RESERVED(msrs, c) (msrs->counters[(c)].addr ? 1 : 0)
-#define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters[(c)].addr, (l), (h)); } while (0)
-#define CTR_OVERFLOWED(n) (!((n) & (1U<<(counter_width-1))))
+#define CTR_OVERFLOWED(n) (!((n) & (1ULL<<(counter_width-1))))
 
 #define CTRL_IS_RESERVED(msrs, c) (msrs->controls[(c)].addr ? 1 : 0)
 #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls[(c)].addr), (l), (h)); } while (0)
@@ -124,14 +123,14 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs)
 static int ppro_check_ctrs(struct pt_regs * const regs,
                           struct op_msrs const * const msrs)
 {
-       unsigned int low, high;
+       u64 val;
        int i;
 
        for (i = 0 ; i < num_counters; ++i) {
                if (!reset_value[i])
                        continue;
-               CTR_READ(low, high, msrs, i);
-               if (CTR_OVERFLOWED(low)) {
+               rdmsrl(msrs->counters[i].addr, val);
+               if (CTR_OVERFLOWED(val)) {
                        oprofile_add_sample(regs, i);
                        wrmsrl(msrs->counters[i].addr, -reset_value[i]);
                }