]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibility
authorJosh Boyer <jwboyer@linux.vnet.ibm.com>
Thu, 6 Dec 2007 19:20:05 +0000 (13:20 -0600)
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>
Sun, 23 Dec 2007 19:33:47 +0000 (13:33 -0600)
Recent DTC versions disallow certain special characters in full paths without
being quoted with {}.  That however breaks compatibility with older DTC
versions.  Work around this by renaming the CPU nodes for the 4xx files to a
generic node name, and specify the processor type in the model property of the
CPU node.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
arch/powerpc/boot/dts/bamboo.dts
arch/powerpc/boot/dts/ebony.dts
arch/powerpc/boot/dts/ep405.dts
arch/powerpc/boot/dts/katmai.dts
arch/powerpc/boot/dts/kilauea.dts
arch/powerpc/boot/dts/rainier.dts
arch/powerpc/boot/dts/sequoia.dts
arch/powerpc/boot/dts/taishan.dts
arch/powerpc/boot/dts/walnut.dts

index 03f5d94ce3637d6f2ded8ed929514db9f05be03d..51ada46e3831fee096c71f260fc72c48eda11b31 100644 (file)
        #size-cells = <1>;
        model = "amcc,bamboo";
        compatible = "amcc,bamboo";
-       dcr-parent = <&/cpus/PowerPC,440EP@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,440EP@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,440EP";
                        reg = <0>;
                        clock-frequency = <0>; /* Filled in by zImage */
                        timebase-frequency = <0>; /* Filled in by zImage */
index 331c424e97ea062e4a8b0af3e00af9274adbf573..3cb2849eefe1e7ac060a05393c1822f83bfc7907 100644 (file)
        #size-cells = <1>;
        model = "ibm,ebony";
        compatible = "ibm,ebony";
-       dcr-parent = <&/cpus/PowerPC,440GP@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,440GP@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,440GP";
                        reg = <0>;
                        clock-frequency = <0>; // Filled in by zImage
                        timebase-frequency = <0>; // Filled in by zImage
index 007f3c24d3f2981cf684d78019b467fc7d5f36b0..16cfc0d01774fe056ec1ef2424239372b16c206c 100644 (file)
        #size-cells = <1>;
        model = "ep405";
        compatible = "ep405";
-       dcr-parent = <&/cpus/PowerPC,405GP@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,405GP@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,405GP";
                        reg = <0>;
                        clock-frequency = <bebc200>; /* Filled in by zImage */
                        timebase-frequency = <0>; /* Filled in by zImage */
index d4dedc2e44cc08139f6b4c321ae2fe175bb61add..d3135c58d0e4065687116ca8f569103e412f5ba2 100644 (file)
        #size-cells = <1>;
        model = "amcc,katmai";
        compatible = "amcc,katmai";
-       dcr-parent = <&/cpus/PowerPC,440SPe@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,440SPe@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,440SPe";
                        reg = <0>;
                        clock-frequency = <0>; /* Filled in by zImage */
                        timebase-frequency = <0>; /* Filled in by zImage */
index aa6a51769930e9f5a73638dd0883d55df50e761f..0a3fbfa4a99bb63e437d128ec7382807f513b9b9 100644 (file)
        #size-cells = <1>;
        model = "amcc,kilauea";
        compatible = "amcc,kilauea";
-       dcr-parent = <&/cpus/PowerPC,405EX@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,405EX@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,405EX";
                        reg = <0>;
                        clock-frequency = <0>; /* Filled in by U-Boot */
                        timebase-frequency = <0>; /* Filled in by U-Boot */
index cf1b95d1f14bb90822da09b8b771252fb9f832c4..63d996e647c814d93417f82cf3b9113b80405837 100644 (file)
        #size-cells = <1>;
        model = "amcc,rainier";
        compatible = "amcc,rainier";
-       dcr-parent = <&/cpus/PowerPC,440GRx@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,440GRx@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,440GRx";
                        reg = <0>;
                        clock-frequency = <0>; /* Filled in by zImage */
                        timebase-frequency = <0>; /* Filled in by zImage */
index 0c078483601c710364e587531e66188497209334..b8184e653bb653cfc175442f6e7b595645d6ac4d 100644 (file)
        #size-cells = <1>;
        model = "amcc,sequoia";
        compatible = "amcc,sequoia";
-       dcr-parent = <&/cpus/PowerPC,440EPx@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,440EPx@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,440EPx";
                        reg = <0>;
                        clock-frequency = <0>; /* Filled in by zImage */
                        timebase-frequency = <0>; /* Filled in by zImage */
index 259972b594b2ee9328247a19321dc88f7ef45591..0dec702c5261622e34d7fcde9c1d0107c74db05a 100644 (file)
        #size-cells = <1>;
        model = "amcc,taishan";
        compatible = "amcc,taishan";
-       dcr-parent = <&/cpus/PowerPC,440GX@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,440GX@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,440GX";
                        reg = <0>;
                        clock-frequency = <2FAF0800>; // 800MHz
                        timebase-frequency = <0>; // Filled in by zImage
index 681633ec954f5281693a8209ebddcfa97847c88a..8fcf6aa17113fcfc01cdde1ae6a79310eb2e4c85 100644 (file)
        #size-cells = <1>;
        model = "ibm,walnut";
        compatible = "ibm,walnut";
-       dcr-parent = <&/cpus/PowerPC,405GP@0>;
+       dcr-parent = <&/cpus/cpu@0>;
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               PowerPC,405GP@0 {
+               cpu@0 {
                        device_type = "cpu";
+                       model = "PowerPC,405GP";
                        reg = <0>;
                        clock-frequency = <bebc200>; /* Filled in by zImage */
                        timebase-frequency = <0>; /* Filled in by zImage */