x86: fix broken flushing in GART nofullflush path

Impact: remove stale IOTLB entries

In the non-default nofullflush case the GART is only flushed when
next_bit wraps around. But it can happen that an unmap operation unmaps
memory which is behind the current next_bit location. If these addresses
are reused it may result in stale GART IO/TLB entries. Fix this by
setting the GART next_bit always behind an unmapped location.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index a42b02b4df68855714b4ea2f7f3e580e0327e7b3..ba7ad83e20a8f80d5b0ca7de95d6c1c0fbe6b27c 100644 (file)
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -123,6 +123,8 @@ static void free_iommu(unsigned long offset, int size)
 
        spin_lock_irqsave(&iommu_bitmap_lock, flags);
        iommu_area_free(iommu_gart_bitmap, offset, size);
+       if (offset >= next_bit)
+               next_bit = offset + size;
        spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
 }