]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
m32r: Rename STI/CLI macros
authorHirokazu Takata <takata@linux-m32r.org>
Mon, 20 Aug 2007 11:53:50 +0000 (20:53 +0900)
committerHirokazu Takata <takata@linux-m32r.org>
Thu, 6 Sep 2007 02:10:56 +0000 (11:10 +0900)
The names of STI and CLI macros were derived from i386 arch historically,
but their name are incomprehensible.
So, for easy to understand, rename these macros to ENABLE_INTERRUPTS
and DISABLE_INTERRUPTS, respectively.

Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
arch/m32r/kernel/entry.S
include/asm-m32r/assembler.h

index 42b08bfd46fe939b2b882d97e6d4a9af15044a49..d4eaa2fd1818fea9b90e7c8bbdbe2bd7757ca99b 100644 (file)
 #define nr_syscalls ((syscall_table_size)/4)
 
 #ifdef CONFIG_PREEMPT
-#define preempt_stop(x)                CLI(x)
+#define preempt_stop(x)                DISABLE_INTERRUPTS(x)
 #else
 #define preempt_stop(x)
 #define resume_kernel          restore_all
@@ -144,7 +144,7 @@ ret_from_intr:
 #endif
        beqz    r4, resume_kernel
 ENTRY(resume_userspace)
-       CLI(r4)                         ; make sure we don't miss an interrupt
+       DISABLE_INTERRUPTS(r4)          ; make sure we don't miss an interrupt
                                        ; setting need_resched or sigpending
                                        ; between sampling and the iret
        GET_THREAD_INFO(r8)
@@ -168,11 +168,11 @@ need_resched:
        beqz    r4, restore_all
        LDIMM   (r4, PREEMPT_ACTIVE)
        st      r4, @(TI_PRE_COUNT, r8)
-       STI(r4)
+       ENABLE_INTERRUPTS(r4)
        bl      schedule
        ldi     r4, #0
        st      r4, @(TI_PRE_COUNT, r8)
-       CLI(r4)
+       DISABLE_INTERRUPTS(r4)
        bra     need_resched
 #endif
 
@@ -180,7 +180,7 @@ need_resched:
 ENTRY(system_call)
        SWITCH_TO_KERNEL_STACK
        SAVE_ALL
-       STI(r4)                         ; Enable interrupt
+       ENABLE_INTERRUPTS(r4)           ; Enable interrupt
        st      sp, PTREGS(sp)          ; implicit pt_regs parameter
        cmpui   r7, #NR_syscalls
        bnc     syscall_badsys
@@ -198,7 +198,7 @@ syscall_call:
        jl      r7                      ; execute system call
        st      r0, R0(sp)              ; save the return value
 syscall_exit:
-       CLI(r4)                         ; make sure we don't miss an interrupt
+       DISABLE_INTERRUPTS(r4)          ; make sure we don't miss an interrupt
                                        ; setting need_resched or sigpending
                                        ; between sampling and the iret
        ld      r9, @(TI_FLAGS, r8)
@@ -215,7 +215,7 @@ work_pending:
        beqz    r4, work_notifysig
 work_resched:
        bl      schedule
-       CLI(r4)                         ; make sure we don't miss an interrupt
+       DISABLE_INTERRUPTS(r4)          ; make sure we don't miss an interrupt
                                        ; setting need_resched or sigpending
                                        ; between sampling and the iret
        ld      r9, @(TI_FLAGS, r8)
@@ -257,7 +257,7 @@ syscall_exit_work:
        ld      r9, @(TI_FLAGS, r8)
        and3    r4, r9, #_TIF_SYSCALL_TRACE
        beqz    r4, work_pending
-       STI(r4)                         ; could let do_syscall_trace() call
+       ENABLE_INTERRUPTS(r4)           ; could let do_syscall_trace() call
                                        ; schedule() instead
        bl      do_syscall_trace
        bra     resume_userspace
index 47041d19d4a8c5019845cd53dbaf8b8c6c1f017f..26351539b5ff92626f560e97d64eabb3fdb85635 100644 (file)
        .endm
 
 #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define STI(reg) STI_M reg
-       .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+       .macro ENABLE_INTERRUPTS reg
        setpsw  #0x40       ->  nop
        ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
        .endm
 
-#define CLI(reg) CLI_M reg
-       .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+       .macro DISABLE_INTERRUPTS reg
        clrpsw  #0x40       ->  nop
        ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
        .endm
 #else  /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define STI(reg) STI_M reg
-       .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+       .macro ENABLE_INTERRUPTS reg
        mvfc    \reg, psw
        or3     \reg, \reg, #0x0040
        mvtc    \reg, psw
        .endm
 
-#define CLI(reg) CLI_M reg
-       .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+       .macro DISABLE_INTERRUPTS reg
        mvfc    \reg, psw
        and3    \reg, \reg, #0xffbf
        mvtc    \reg, psw