]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation.
authorRalf Baechle <ralf@linux-mips.org>
Thu, 22 Dec 2005 12:41:29 +0000 (13:41 +0100)
committer <ralf@denk.linux-mips.net> <>
Tue, 10 Jan 2006 13:39:08 +0000 (13:39 +0000)
Gcc has a tradition of misscompiling the previous construct using the
address of a label as argument to inline assembler.  Gas otoh has the
annoying difference between la and dla which are only usable for 32-bit
rsp. 64-bit code, so can't be used without conditional compilation.
The alterantive is switching the assembler to 64-bit code which happens
to work right even for 32-bit code ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
include/asm-mips/hazards.h

index 7517189e469f51bd413609b5a2ec1d7728ca586d..2fc90632f88cfeaab2e8fbaea794a961019a3a6f 100644 (file)
@@ -233,15 +233,25 @@ __asm__(
 #endif
 
 #ifdef CONFIG_CPU_MIPSR2
+/*
+ * gcc has a tradition of misscompiling the previous construct using the
+ * address of a label as argument to inline assembler.  Gas otoh has the
+ * annoying difference between la and dla which are only usable for 32-bit
+ * rsp. 64-bit code, so can't be used without conditional compilation.
+ * The alterantive is switching the assembler to 64-bit code which happens
+ * to work right even for 32-bit code ...
+ */
 #define instruction_hazard()                                           \
 do {                                                                   \
-__label__ __next;                                                      \
+       unsigned long tmp;                                              \
+                                                                       \
        __asm__ __volatile__(                                           \
+       "       .set    mips64r2                                \n"     \
+       "       dla     %0, 1f                                  \n"     \
        "       jr.hb   %0                                      \n"     \
-       :                                                               \
-       : "r" (&&__next));                                              \
-__next:                                                                        \
-       ;                                                               \
+       "       .set    mips0                                   \n"     \
+       "1:                                                     \n"     \
+       : "=r" (tmp));                                                  \
 } while (0)
 
 #else