]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
ARM: OMAP2: Combine some PRM registers and fix CONFIG_DEBUG_PM
authorTony Lindgren <tony@atomide.com>
Wed, 11 Jun 2008 00:39:06 +0000 (17:39 -0700)
committerTony Lindgren <tony@atomide.com>
Wed, 11 Jun 2008 00:40:35 +0000 (17:40 -0700)
Combine some PRM registers and fix CONFIG_DEBUG_PM

Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/pm-debug.c
arch/arm/mach-omap2/pm34xx.c
arch/arm/mach-omap2/prm.h

index 8a9f3c4f09f8b8b2f22b61c6096568a4f1cce35c..a32f11f4adb0d5f8efa88874bfe3da1f30a61d4f 100644 (file)
@@ -21,6 +21,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/kernel.h>
+#include <linux/timer.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
@@ -29,6 +31,7 @@
 #include <asm/arch/board.h>
 
 #include "prm.h"
+#include "cm.h"
 #include "pm.h"
 
 #ifdef CONFIG_PM_DEBUG
@@ -194,7 +197,7 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
        if (!resume) {
 #if 0
                /* MPU */
-               DUMP_PRM_REG(OMAP24XX_PRCM_IRQENABLE_MPU);
+               DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
                DUMP_CM_MOD_REG(MPU_MOD, CM_CLKSTCTRL);
                DUMP_PRM_MOD_REG(MPU_MOD, PM_PWSTCTRL);
                DUMP_PRM_MOD_REG(MPU_MOD, PM_PWSTST);
@@ -208,35 +211,42 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
 #endif
 #if 0
                DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1);
-               DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
+               if (cpu_is_omap24xx()) {
+                       DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2);
+                       DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
+                                       OMAP24XX_PRCM_CLKEMUL_CTRL_OFFSET);
+                       DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD,
+                                       OMAP24XX_PRCM_CLKSRC_CTRL_OFFSET);
+               }
                DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN);
                DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1);
                DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2);
                DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN);
                DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN);
-               DUMP_PRM_REG(OMAP24XX_PRCM_CLKEMUL_CTRL);
                DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE);
                DUMP_PRM_MOD_REG(CORE_MOD, PM_PWSTST);
-               DUMP_PRM_REG(OMAP24XX_PRCM_CLKSRC_CTRL);
 #endif
 #if 0
                /* DSP */
-               DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
-               DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
-               DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
-               DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
-               DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
-               DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSTCTRL);
-               DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, RM_RSTCTRL);
-               DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, RM_RSTST);
-               DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, PM_PWSTCTRL);
-               DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, PM_PWSTST);
+               if (cpu_is_omap24xx()) {
+                       DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN);
+                       DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN);
+                       DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST);
+                       DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
+                       DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL);
+                       DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSTCTRL);
+                       DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, RM_RSTCTRL);
+                       DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, RM_RSTST);
+                       DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, PM_PWSTCTRL);
+                       DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, PM_PWSTST);
+               }
 #endif
        } else {
                DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1);
-               DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
+               if (cpu_is_omap24xx())
+                       DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2);
                DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST);
-               DUMP_PRM_REG(OMAP24XX_PRCM_IRQSTATUS_MPU);
+               DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
 #if 1
                DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098);
                DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8);
@@ -268,7 +278,9 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
                printk("--- Going to %s %s\n", s1, s2);
 #endif
        else
-               printk("--- Woke up (slept for %u.%03u ms)\n", us / 1000, us % 1000);
+               printk("--- Woke up (slept for %u.%03u ms)\n",
+                       us / 1000, us % 1000);
+
        for (i = 0; i < reg_count; i++)
                printk("%-20s: 0x%08x\n", regs[i].name, regs[i].val);
 }
index f8d11c7e50d617e101e9b6754a2a1e0c05f10050..40a58288b06033e7073b7cb05972dc6f3556e307 100644 (file)
@@ -132,11 +132,11 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
        }
 
        irqstatus_mpu = prm_read_mod_reg(OCP_MOD,
-                                       OMAP3430_PRM_IRQSTATUS_MPU_OFFSET);
+                                       OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
        prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
-                                       OMAP3430_PRM_IRQSTATUS_MPU_OFFSET);
+                                       OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
 
-       while (prm_read_mod_reg(OCP_MOD, OMAP3430_PRM_IRQSTATUS_MPU_OFFSET));
+       while (prm_read_mod_reg(OCP_MOD, OMAP2_PRM_IRQSTATUS_MPU_OFFSET));
 
        return IRQ_HANDLED;
 }
@@ -332,7 +332,7 @@ static void __init prcm_setup_regs(void)
        /* For some reason IO doesn't generate wakeup event even if
         * it is selected to mpu wakeup goup */
        prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
-                       OCP_MOD, OMAP3430_PRM_IRQENABLE_MPU_OFFSET);
+                       OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
 }
 
 static int __init pwrdms_setup(struct powerdomain *pwrdm)
index f7dac2e3b27a0eaa6fb8b5d31233598367cb64ef..3c6418e8e71a74745944fe84120482e9148f58ce 100644 (file)
  *
  */
 
+/* Common registers for 24xx and 34xx in OCP_MOD */
+#define OMAP2_PRM_IRQSTATUS_MPU_OFFSET         0x0018
+#define OMAP2_PRM_IRQENABLE_MPU_OFFSET         0x001c
+
 /* 24xx register offsets in OCP_MOD */
-#define OMAP24XX_PRCM_REVISION_OFFSET          0x0000
-#define OMAP24XX_PRCM_SYSCONFIG_OFFSET         0x0010
-#define OMAP24XX_PRCM_IRQSTATUS_MPU_OFFSET     0x0018
-#define OMAP24XX_PRCM_IRQENABLE_MPU_OFFSET     0x001c
+#define OMAP24XX_PRM_REVISION_OFFSET           0x0000
+#define OMAP24XX_PRM_SYSCONFIG_OFFSET          0x0010
+
+/* 34xx register offsets in OCP_MOD */
+#define OMAP3430_PRM_REVISION_OFFSET           0x0004
+#define OMAP3430_PRM_SYSCONFIG_OFFSET          0x0014
 
 /* 24xx register offsets in OMAP24XX_GR_MOD (Same as OCP_MOD for 24xx) */
 #define OMAP24XX_PRCM_VOLTCTRL_OFFSET          0x0050
 #define OMAP24XX_PRCM_CLKSSETUP_OFFSET         0x0094
 #define OMAP24XX_PRCM_POLCTRL_OFFSET           0x0098
 
-/* 34xx register offsets in OCP_MOD */
-#define OMAP3430_PRM_REVISION_OFFSET           0x0004
-#define OMAP3430_PRM_SYSCONFIG_OFFSET          0x0014
-#define OMAP3430_PRM_IRQSTATUS_MPU_OFFSET      0x0018
-#define OMAP3430_PRM_IRQENABLE_MPU_OFFSET      0x001c
-
 /* 34xx register offsets in GR_MOD */
 #define OMAP3_PRM_VC_SMPS_SA_OFFSET            0x0020
 #define OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET                0x0024