]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
Serial: UART driver changes for Cavium OCTEON.
authorDavid Daney <ddaney@caviumnetworks.com>
Fri, 2 Jan 2009 13:50:00 +0000 (13:50 +0000)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 2 Jan 2009 18:19:43 +0000 (10:19 -0800)
Cavium UART implementation is not covered by existing uart_configS.
Define a new uart_config (PORT_OCTEON) which is specified by OCTEON
platform device registration code.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
drivers/serial/8250.c
include/linux/serial_core.h

index 3ae497422db577e0d09c167dad39172146319df8..daa00567bc44115577ff012cac16985c2957b66f 100644 (file)
@@ -279,6 +279,13 @@ static const struct serial8250_config uart_config[] = {
                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
                .flags          = UART_CAP_FIFO,
        },
+       [PORT_OCTEON] = {
+               .name           = "OCTEON",
+               .fifo_size      = 64,
+               .tx_loadsz      = 64,
+               .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+               .flags          = UART_CAP_FIFO,
+       },
 };
 
 #if defined (CONFIG_SERIAL_8250_AU1X00)
index f155252f148caf339825648afde0073e69836fe0..b4199841f1fc92e973e1b03f2a9472b8faaac32a 100644 (file)
@@ -40,7 +40,8 @@
 #define PORT_NS16550A  14
 #define PORT_XSCALE    15
 #define PORT_RM9000    16      /* PMC-Sierra RM9xxx internal UART */
-#define PORT_MAX_8250  16      /* max port ID */
+#define PORT_OCTEON    17      /* Cavium OCTEON internal UART */
+#define PORT_MAX_8250  17      /* max port ID */
 
 /*
  * ARM specific type numbers.  These are not currently guaranteed