]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
DSP: Fix build problem with OMAP1
authorHiroshi DOYU <Hiroshi.DOYU@nokia.com>
Mon, 2 Apr 2007 12:10:16 +0000 (15:10 +0300)
committerTony Lindgren <tony@atomide.com>
Tue, 3 Apr 2007 19:24:14 +0000 (15:24 -0400)
Based on Dirk Behme's comment:

http://linux.omap.com/pipermail/linux-omap-open-source/2007-April/009461.html

Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap1/mmu.c
arch/arm/plat-omap/dsp/dsp_mem.c
arch/arm/plat-omap/dsp/mmu.h

index 789783c8a19a38d3f7388ae5eb7bcc3d88381ebf..e1e29e04fea2c29ce48835028f482662dc9c6d05 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/interrupt.h>
 #include <linux/err.h>
 #include "mmu.h"
 #include <asm/tlbflush.h>
 static void *dspvect_page;
 #define DSP_INIT_PAGE  0xfff000
 
+#define MMUFAULT_MASK (OMAP_MMU_FAULT_ST_PERM |\
+                      OMAP_MMU_FAULT_ST_TLB_MISS |\
+                      OMAP_MMU_FAULT_ST_TRANS)
+
 static unsigned int get_cam_l_va_mask(u16 pgsz)
 {
        switch (pgsz) {
@@ -267,11 +272,11 @@ static void omap1_mmu_interrupt(struct omap_mmu *mmu)
        unsigned long dp;
        unsigned long va;
 
-       status = omap_mmu_read_reg(mmu, MMU_FAULT_ST);
-       adh = omap_mmu_read_reg(mmu, MMU_FAULT_AD_H);
-       adl = omap_mmu_read_reg(mmu, MMU_FAULT_AD_L);
-       dp = adh & MMU_FAULT_AD_H_DP;
-       va = MK32(adh & MMU_FAULT_AD_H_ADR_MASK, adl);
+       status = omap_mmu_read_reg(mmu, OMAP_MMU_FAULT_ST);
+       adh = omap_mmu_read_reg(mmu, OMAP_MMU_FAULT_AD_H);
+       adl = omap_mmu_read_reg(mmu, OMAP_MMU_FAULT_AD_L);
+       dp = adh & OMAP_MMU_FAULT_AD_H_DP;
+       va = (((adh & OMAP_MMU_FAULT_AD_H_ADR_MASK) << 16) | adl);
 
        /* if the fault is masked, nothing to do */
        if ((status & MMUFAULT_MASK) == 0) {
@@ -284,42 +289,42 @@ static void omap1_mmu_interrupt(struct omap_mmu *mmu)
                 */
                if (status) {
                        pr_debug( "%s%s%s%s\n",
-                                 (status & MMU_FAULT_ST_PREF)?
+                                 (status & OMAP_MMU_FAULT_ST_PREF)?
                                  "  (prefetch err)" : "",
-                                 (status & MMU_FAULT_ST_PERM)?
+                                 (status & OMAP_MMU_FAULT_ST_PERM)?
                                  "  (permission fault)" : "",
-                                 (status & MMU_FAULT_ST_TLB_MISS)?
+                                 (status & OMAP_MMU_FAULT_ST_TLB_MISS)?
                                  "  (TLB miss)" : "",
-                                 (status & MMU_FAULT_ST_TRANS) ?
+                                 (status & OMAP_MMU_FAULT_ST_TRANS) ?
                                  "  (translation fault)": "");
-                       pr_debug( "fault address = %#08x\n", va);
+                       pr_debug( "fault address = %#08lx\n", va);
                }
                enable_irq(mmu->irq);
                return;
        }
 
        pr_info("%s%s%s%s\n",
-               (status & MMU_FAULT_ST_PREF)?
-               (MMUFAULT_MASK & MMU_FAULT_ST_PREF)?
+               (status & OMAP_MMU_FAULT_ST_PREF)?
+               (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_PREF)?
                "  prefetch err":
                "  (prefetch err)":
                "",
-               (status & MMU_FAULT_ST_PERM)?
-               (MMUFAULT_MASK & MMU_FAULT_ST_PERM)?
+               (status & OMAP_MMU_FAULT_ST_PERM)?
+               (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_PERM)?
                "  permission fault":
                "  (permission fault)":
                "",
-               (status & MMU_FAULT_ST_TLB_MISS)?
-               (MMUFAULT_MASK & MMU_FAULT_ST_TLB_MISS)?
+               (status & OMAP_MMU_FAULT_ST_TLB_MISS)?
+               (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_TLB_MISS)?
                "  TLB miss":
                "  (TLB miss)":
                "",
-               (status & MMU_FAULT_ST_TRANS)?
-               (MMUFAULT_MASK & MMU_FAULT_ST_TRANS)?
+               (status & OMAP_MMU_FAULT_ST_TRANS)?
+               (MMUFAULT_MASK & OMAP_MMU_FAULT_ST_TRANS)?
                "  translation fault":
                "  (translation fault)":
                "");
-       pr_info("fault address = %#08x\n", va);
+       pr_info("fault address = %#08lx\n", va);
 
        mmu->fault_address = va;
        schedule_work(&mmu->irq_work);
index d5a652c90bedc2e76dfaf7b408e435eb1ded13f7..eab57b531cd21709bc66187531172e2d59bed3ef 100644 (file)
@@ -344,8 +344,6 @@ static int dsp_mem_ioctl(struct inode *inode, struct file *file,
                         unsigned int cmd, unsigned long arg)
 {
        struct omap_dsp_mapinfo mapinfo;
-       dsp_long_t dspadr;
-       int ret;
        __u32 size;
 
        switch (cmd) {
@@ -370,6 +368,9 @@ static int dsp_mem_ioctl(struct inode *inode, struct file *file,
                return 0;
 #ifdef CONFIG_OMAP_DSP_FBEXPORT
        case MEM_IOCTL_FBEXPORT:
+       {
+               dsp_long_t dspadr;
+               int ret;
                if (copy_from_user(&dspadr, (void __user *)arg,
                                   sizeof(dsp_long_t)))
                        return -EFAULT;
@@ -378,6 +379,7 @@ static int dsp_mem_ioctl(struct inode *inode, struct file *file,
                                 sizeof(dsp_long_t)))
                        return -EFAULT;
                return ret;
+       }
 #endif
        case MEM_IOCTL_MMUITACK:
                return dsp_mmu_itack();
index 78189f064455724617267cf064a986be5a6f3a6a..ca47b7b92d999c4eaf951af04c5f5fa6ebeb7bb5 100644 (file)
@@ -83,7 +83,7 @@ static int dsp_mmu_itack(void)
                printk(KERN_ERR "omapdsp: DSP MMU error has not been set.\n");
                return -EINVAL;
        }
-       dspadr = dsp_fault_adr & ~(SZ_4K-1);
+       dspadr = dsp_mmu.fault_address & ~(SZ_4K-1);
        /* FIXME: reserve TLB entry for this */
        omap_mmu_exmap(&dsp_mmu, dspadr, 0, SZ_4K, EXMAP_TYPE_MEM);
        pr_info("omapdsp: falling into recovery runlevel...\n");