]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
ARM: OMAP: Undo level2 IRQ fix. Doesn't build on non-P2 platforms.
authorKevin Hilman <kevin@hilman.org>
Wed, 12 Oct 2005 22:48:14 +0000 (15:48 -0700)
committerKevin Hilman <kevin@hilman.org>
Wed, 12 Oct 2005 22:48:14 +0000 (15:48 -0700)
Signed-off-by: Kevin Hilman <kevin@hilman.org>
arch/arm/mach-omap1/irq.c
arch/arm/plat-omap/pm.c
include/asm-arm/arch-omap/irqs.h

index ed65a7d2e941cf9228658b323564925ceca3aa2c..0b4db2c022d9ee1ec198549ba85b3be15f0d2c2a 100644 (file)
@@ -47,7 +47,6 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/cpu.h>
 
 #include <asm/io.h>
 
@@ -235,11 +234,9 @@ void __init omap_init_irq(void)
        }
 
        /* Unmask level 2 handler */
-
-       if (cpu_is_omap730())
+       if (cpu_is_omap730()) {
                omap_unmask_irq(INT_730_IH2_IRQ);
-       else if (cpu_is_omap1510())
-               omap_unmask_irq(INT_1510_IH2_IRQ);
-       else if (cpu_is_omap16xx())
-               omap_unmask_irq(INT_1610_IH2_IRQ);
+       } else {
+               omap_unmask_irq(INT_IH2_IRQ);
+       }
 }
index 30144728d5e2e3efb85868a9bb88022c9d478af5..56e3441dc9772bfd6cd72d3400451cadff6d9d70 100644 (file)
@@ -121,7 +121,7 @@ void omap_pm_idle(void)
  */
 static void omap_pm_wakeup_setup(void)
 {
-       u32 level1_wake;
+       u32 level1_wake = OMAP_IRQ_BIT(INT_IH2_IRQ);
        u32 level2_wake = OMAP_IRQ_BIT(INT_UART2);
 
        /*
@@ -130,15 +130,10 @@ static void omap_pm_wakeup_setup(void)
         * drivers must still separately call omap_set_gpio_wakeup() to
         * wake up to a GPIO interrupt.
         */
-       if (cpu_is_omap730())
-               level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) |
-                       OMAP_IRQ_BIT(INT_730_IH2_IRQ);
-       else if (cpu_is_omap1510())
-               level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) | 
-                       OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
-       else if (cpu_is_omap16xx())
-               level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
-                       OMAP_IRQ_BIT(INT_1610_IH2_IRQ);
+       if (cpu_is_omap1510() || cpu_is_omap16xx())
+               level1_wake |= OMAP_IRQ_BIT(INT_GPIO_BANK1);
+       else if (cpu_is_omap730())
+               level1_wake |= OMAP_IRQ_BIT(INT_730_GPIO_BANK1);
 
        omap_writel(~level1_wake, OMAP_IH1_MIR);
 
index 20d66797172144691cbb1a0db9e47aad47ef1480..45f03dcd53be3598ef38b89f0ace941b6a6d5d39 100644 (file)
@@ -31,6 +31,7 @@
  * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
  *
  */
+#define INT_IH2_IRQ            0
 #define INT_CAMERA             1
 #define INT_FIQ                        3
 #define INT_RTDX               6
@@ -59,7 +60,6 @@
 /*
  * OMAP-1510 specific IRQ numbers for interrupt handler 1
  */
-#define INT_1510_IH2_IRQ       0
 #define INT_1510_RES2          2
 #define INT_1510_SPI_TX                4
 #define INT_1510_SPI_RX                5
@@ -71,7 +71,6 @@
 /*
  * OMAP-1610 specific IRQ numbers for interrupt handler 1
  */
-#define INT_1610_IH2_IRQ       0
 #define INT_1610_IH2_FIQ       2
 #define INT_1610_McBSP2_TX     4
 #define INT_1610_McBSP2_RX     5