]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
arch/x86/mm/pat.c: use boot_cpu_has()
authorAndrew Morton <akpm@linux-foundation.org>
Wed, 14 May 2008 23:10:39 +0000 (16:10 -0700)
committerThomas Gleixner <tglx@linutronix.de>
Sun, 25 May 2008 06:50:25 +0000 (08:50 +0200)
arch/x86/mm/pat.c: In function 'phys_mem_access_prot_allowed':
arch/x86/mm/pat.c:526: warning: passing argument 2 of 'constant_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:526: warning: passing argument 2 of 'variable_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:527: warning: passing argument 2 of 'constant_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:527: warning: passing argument 2 of 'variable_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:528: warning: passing argument 2 of 'constant_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:528: warning: passing argument 2 of 'variable_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:529: warning: passing argument 2 of 'constant_test_bit' from incompatible pointer type
arch/x86/mm/pat.c:529: warning: passing argument 2 of 'variable_test_bit' from incompatible pointer type

Don't open-code test_bit() on a __u32

Cc: Andrea Arcangeli <andrea@qumranet.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
arch/x86/mm/pat.c

index a1cbea0b79b1d858471212ad16522edf82f05514..e83b770676d5c93102a3ed3c409be41f7bfb6429 100644 (file)
@@ -536,10 +536,10 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
         * we maintain the tradition of paranoia in this code.
         */
        if (!pat_wc_enabled &&
-           ! ( test_bit(X86_FEATURE_MTRR, boot_cpu_data.x86_capability) ||
-               test_bit(X86_FEATURE_K6_MTRR, boot_cpu_data.x86_capability) ||
-               test_bit(X86_FEATURE_CYRIX_ARR, boot_cpu_data.x86_capability) ||
-               test_bit(X86_FEATURE_CENTAUR_MCR, boot_cpu_data.x86_capability)) &&
+           ! ( boot_cpu_has(X86_FEATURE_MTRR) ||
+               boot_cpu_has(X86_FEATURE_K6_MTRR) ||
+               boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||
+               boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) &&
           (pfn << PAGE_SHIFT) >= __pa(high_memory)) {
                flags = _PAGE_CACHE_UC;
        }