]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
MIPS: RB532: Use physical addresses for gpio and device controller registers
authorFlorian Fainelli <florian@openwrt.org>
Fri, 22 Aug 2008 15:01:03 +0000 (17:01 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 11 Oct 2008 15:18:45 +0000 (16:18 +0100)
This patch fixes the misuse of virtual addresses for the GPIO and third
device controller which would lead to problems while accessing ioremap'd
registers.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/rb532/gpio.c
include/asm-mips/mach-rc32434/rb.h

index 00a1c7877bf4c454e55ff41d507da678eb5f55b1..11d7127655e3e131569f389033fef6cf932a38e4 100644 (file)
@@ -47,8 +47,8 @@ struct mpmc_device dev3;
 static struct resource rb532_gpio_reg0_res[] = {
        {
                .name   = "gpio_reg0",
-               .start  = (u32)(IDT434_REG_BASE + GPIOBASE),
-               .end    = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)),
+               .start  = REGBASE + GPIOBASE,
+               .end    = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
                .flags  = IORESOURCE_MEM,
        }
 };
@@ -56,8 +56,8 @@ static struct resource rb532_gpio_reg0_res[] = {
 static struct resource rb532_dev3_ctl_res[] = {
        {
                .name   = "dev3_ctl",
-               .start  = (u32)(IDT434_REG_BASE + DEV3BASE),
-               .end    = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct dev_reg)),
+               .start  = REGBASE + DEV3BASE,
+               .end    = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
                .flags  = IORESOURCE_MEM,
        }
 };
index e0a76e3ffea834e0757de7d9c1ed5b18612afa8e..62ac73c999c4b47f94fbfbd67440617a335efff4 100644 (file)
@@ -17,7 +17,8 @@
 
 #include <linux/genhd.h>
 
-#define IDT434_REG_BASE        ((volatile void *) KSEG1ADDR(0x18000000))
+#define REGBASE                0x18000000
+#define IDT434_REG_BASE        ((volatile void *) KSEG1ADDR(REGBASE))
 #define DEV0BASE       0x010000
 #define DEV0MASK       0x010004
 #define DEV0C          0x010008