]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
Blackfin arch: rename MAX_BLACKFIN_DMA_CHANNEL to MAX_DMA_CHANNELS to match everyone...
authorMike Frysinger <vapier.adi@gmail.com>
Wed, 7 Jan 2009 15:14:39 +0000 (23:14 +0800)
committerBryan Wu <cooloney@kernel.org>
Wed, 7 Jan 2009 15:14:39 +0000 (23:14 +0800)
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
17 files changed:
arch/blackfin/include/asm/dma.h
arch/blackfin/kernel/bfin_dma_5xx.c
arch/blackfin/mach-bf518/dma.c
arch/blackfin/mach-bf518/include/mach/dma.h
arch/blackfin/mach-bf527/dma.c
arch/blackfin/mach-bf527/include/mach/dma.h
arch/blackfin/mach-bf533/dma.c
arch/blackfin/mach-bf533/include/mach/dma.h
arch/blackfin/mach-bf537/dma.c
arch/blackfin/mach-bf537/include/mach/dma.h
arch/blackfin/mach-bf538/dma.c
arch/blackfin/mach-bf538/include/mach/dma.h
arch/blackfin/mach-bf548/dma.c
arch/blackfin/mach-bf548/include/mach/dma.h
arch/blackfin/mach-bf561/dma.c
arch/blackfin/mach-bf561/include/mach/dma.h
arch/blackfin/mach-common/clocks-init.c

index 3aa4dd3e5fe80a18476b8532c5f942aa69dbba7b..7d1cfa71a9d74524083b54f01df2f986a2a47d80 100644 (file)
@@ -201,6 +201,6 @@ void *dma_memcpy(void *dest, const void *src, size_t count);
 void *safe_dma_memcpy(void *dest, const void *src, size_t count);
 
 extern int channel2irq(unsigned int channel);
-extern struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL];
+extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
 
 #endif
index 22bce17bbb0209f13e5e2a83423262f09c3cffae..ad936843ecda943dbf3975b330043516660d7594 100644 (file)
@@ -44,7 +44,7 @@
  * Global Variables
 ***************************************************************************/
 
-static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL];
+static struct dma_channel dma_ch[MAX_DMA_CHANNELS];
 
 /*------------------------------------------------------------------------------
  *       Set the Buffer Clear bit in the Configuration register of specific DMA
@@ -63,7 +63,7 @@ static int __init blackfin_dma_init(void)
 
        printk(KERN_INFO "Blackfin DMA Controller\n");
 
-       for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
+       for (i = 0; i < MAX_DMA_CHANNELS; i++) {
                dma_ch[i].chan_status = DMA_CHANNEL_FREE;
                dma_ch[i].regs = dma_io_base_addr[i];
                mutex_init(&(dma_ch[i].dmalock));
@@ -87,7 +87,7 @@ static int proc_dma_show(struct seq_file *m, void *v)
 {
        int i;
 
-       for (i = 0 ; i < MAX_BLACKFIN_DMA_CHANNEL; ++i)
+       for (i = 0 ; i < MAX_DMA_CHANNELS; ++i)
                if (dma_ch[i].chan_status != DMA_CHANNEL_FREE)
                        seq_printf(m, "%2d: %s\n", i, dma_ch[i].device_id);
 
@@ -175,7 +175,7 @@ EXPORT_SYMBOL(request_dma);
 int set_dma_callback(unsigned int channel, dma_interrupt_t callback, void *data)
 {
        BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
-              && channel < MAX_BLACKFIN_DMA_CHANNEL));
+              && channel < MAX_DMA_CHANNELS));
 
        if (callback != NULL) {
                int ret_val;
@@ -200,7 +200,7 @@ void free_dma(unsigned int channel)
 {
        pr_debug("freedma() : BEGIN \n");
        BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
-              && channel < MAX_BLACKFIN_DMA_CHANNEL));
+              && channel < MAX_DMA_CHANNELS));
 
        /* Halt the DMA */
        disable_dma(channel);
@@ -418,7 +418,7 @@ int blackfin_dma_suspend(void)
 #ifdef CONFIG_BF561    /* IMDMA channels doesn't have a PERIPHERAL_MAP */
        for (i = 0; i <= CH_MEM_STREAM3_SRC; i++) {
 #else
-       for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++) {
+       for (i = 0; i < MAX_DMA_CHANNELS; i++) {
 #endif
                if (dma_ch[i].chan_status == DMA_CHANNEL_ENABLED) {
                        printk(KERN_ERR "DMA Channel %d failed to suspend\n", i);
@@ -438,7 +438,7 @@ void blackfin_dma_resume(void)
 #ifdef CONFIG_BF561    /* IMDMA channels doesn't have a PERIPHERAL_MAP */
        for (i = 0; i <= CH_MEM_STREAM3_SRC; i++)
 #else
-       for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; i++)
+       for (i = 0; i < MAX_DMA_CHANNELS; i++)
 #endif
                dma_ch[i].regs->peripheral_map = dma_ch[i].saved_peripheral_map;
 }
index 0d06ced01cedbeb517e70ba88cfdd7e30b8ea7fb..698e88ca51049039d7d5f0544b5442e95cfd4ed6 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
index e2a71ba907e905dd95e3e4775f07b05d09940553..f46bce087015d2feec1f7031f7832c2ecfe6ab0c 100644 (file)
@@ -32,7 +32,7 @@
 #ifndef _MACH_DMA_H_
 #define _MACH_DMA_H_
 
-#define MAX_BLACKFIN_DMA_CHANNEL 16
+#define MAX_DMA_CHANNELS 16
 
 #define CH_PPI                         0       /* PPI receive/transmit */
 #define CH_EMAC_RX             1       /* Ethernet MAC receive */
index dfd080cda787cbbc33ad0e13d68027f908471817..231877578243484ce446bbe308086d4594f2fa71 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
index 49dd693223e8739c62d3422e2cffc6226f21e7d6..ab9b274312a55be7ec814fc2f5d46e274ca1eebb 100644 (file)
@@ -32,7 +32,7 @@
 #ifndef _MACH_DMA_H_
 #define _MACH_DMA_H_
 
-#define MAX_BLACKFIN_DMA_CHANNEL 16
+#define MAX_DMA_CHANNELS 16
 
 #define CH_PPI                         0       /* PPI receive/transmit or NFC */
 #define CH_EMAC_RX             1       /* Ethernet MAC receive or HOSTDP */
index 28655c1cb7dc52ecdbc24bca24f34f58ce63e243..0a6eb8f24d98f62d866d4483e5ce0d17dfe777cd 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
index bd9d5e94307d0ca7823ff50c88bf19d0f74c94f0..4ff787e3559d83e080ef494f625b8a20ba719d07 100644 (file)
@@ -36,7 +36,7 @@
 #ifndef _MACH_DMA_H_
 #define _MACH_DMA_H_
 
-#define MAX_BLACKFIN_DMA_CHANNEL 12
+#define MAX_DMA_CHANNELS 12
 
 #define CH_PPI          0
 #define CH_SPORT0_RX    1
index 4edb363ff99c041884501d6ae225abcb3397bd8d..81185051de91eeeb788662432e9173385511fe1b 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
index 7a964040870a047292f84678c3788dc2c2bff07f..4be361a7ff080cc4eebf9c47a408a92d8b6207d6 100644 (file)
@@ -32,7 +32,7 @@
 #ifndef _MACH_DMA_H_
 #define _MACH_DMA_H_
 
-#define MAX_BLACKFIN_DMA_CHANNEL 16
+#define MAX_DMA_CHANNELS 16
 
 #define CH_PPI                             0
 #define CH_EMAC_RX                 1
index 359fdaa12b8f2c4e0d2b7154c61dc7dedf684f3d..d6837fbf94ea4b22d755071b25a58f41a4193a47 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
index c2210a996e6862132305ff9b4e378a48cdc32f94..a52ec3a17b05e3c87e7ed62e36204d4b87fbfd35 100644 (file)
@@ -60,6 +60,6 @@
 #define CH_MEM_STREAM3_DEST    26
 #define CH_MEM_STREAM3_SRC     27
 
-#define MAX_BLACKFIN_DMA_CHANNEL 28
+#define MAX_DMA_CHANNELS 28
 
 #endif
index 74730eb8ae1bf41208d3da8b67b15fde18246f0c..535980652bf6acc3f7182e6a019929b96c3a4245 100644 (file)
@@ -32,7 +32,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_NEXT_DESC_PTR,
        (struct dma_register *) DMA2_NEXT_DESC_PTR,
index 36a2ef7e7849fa6dc3d40653678277d009f130a3..796c205d81771cd81e72a8bba2b9d3e7addac434 100644 (file)
@@ -71,6 +71,6 @@
 #define CH_MEM_STREAM3_DEST    30
 #define CH_MEM_STREAM3_SRC     31
 
-#define MAX_BLACKFIN_DMA_CHANNEL 32
+#define MAX_DMA_CHANNELS 32
 
 #endif
index 24415eb82698dd4961b1fddb3ac9c738aac141d0..42b0037afe611805ef11785e40678c3e23ffd1bd 100644 (file)
@@ -31,7 +31,7 @@
 #include <asm/blackfin.h>
 #include <asm/dma.h>
 
-struct dma_register *dma_io_base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
        (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
        (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
index 8bc46cd89a0238ba3949c0bd65cdc2d2778e9e15..38ce66ae6c30ddce4f8bd1960fc37da2a8576b92 100644 (file)
@@ -7,7 +7,7 @@
 #ifndef _MACH_DMA_H_
 #define _MACH_DMA_H_
 
-#define MAX_BLACKFIN_DMA_CHANNEL 36
+#define MAX_DMA_CHANNELS 36
 
 #define CH_PPI0                        0
 #define CH_PPI                 (CH_PPI0)
index 39a94b3a2ed7ae1ea3270ac3ef69af8335ff38ac..5d182abefc7bb25b2f0c361acf5ec6c8b65fa818 100644 (file)
@@ -32,7 +32,7 @@ void init_clocks(void)
         * For example, any automatic DMAs left by U-Boot for splash screens.
         */
        size_t i;
-       for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; ++i) {
+       for (i = 0; i < MAX_DMA_CHANNELS; ++i) {
                struct dma_register *dma = dma_io_base_addr[i];
                dma->cfg = 0;
        }