`-- sh
`-- cchips
`-- hd6446x
- |-- hd64461
- | `-- cchip-specific files
- `-- hd64465
+ `-- hd64461
`-- cchip-specific files
... and so on. Headers for the companion chips are treated the same way as
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_ARCH_TRACEHOOK
- select HAVE_FTRACE
+ select HAVE_FUNCTION_TRACER
config SUPERH64
def_bool y if CPU_SH5
# arch/sh/Makefile
#
# Copyright (C) 1999 Kaz Kojima
-# Copyright (C) 2002, 2003, 2004 Paul Mundt
+# Copyright (C) 2002 - 2008 Paul Mundt
# Copyright (C) 2002 M. R. Brown
#
# This file is subject to the terms and conditions of the GNU General Public
isa-$(CONFIG_CPU_SH4A) := sh4a
isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al
isa-$(CONFIG_CPU_SH5) := shmedia
-isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
-ifndef CONFIG_SH_DSP
-ifndef CONFIG_SH_FPU
-isa-y := $(isa-y)-nofpu
-endif
+ifeq ($(CONFIG_SUPERH32),y)
+isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
+isa-y := $(isa-y)-up
endif
-isa-y := $(isa-y)-up
-
cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,)
cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \
$(call cc-option,-m2a-nofpu,)
$(call cc-option,-m4a-nofpu,)
cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,)
+ifeq ($(cflags-y),)
+#
+# In the case where we are stuck with a compiler that has been uselessly
+# restricted to a particular ISA, a favourite default of newer GCCs when
+# extensive multilib targets are not provided, ensure we get the best fit
+# regarding FP generation. This is necessary to avoid references to FP
+# variants in libgcc where integer variants exist, which otherwise result
+# in link errors. This is intentionally stupid (albeit many orders of
+# magnitude less than GCC's default behaviour), as anything with a large
+# number of multilib targets better have been built correctly for
+# the target in mind.
+#
+cflags-y += $(shell $(CC) $(KBUILD_CFLAGS) -print-multi-lib | \
+ grep nofpu | sed q | sed -e 's/^/-/;s/;.*$$//')
+endif
+
cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
-R .stab -R .stabstr -S
# Give the various platforms the opportunity to set default image types
-defaultimage-$(CONFIG_SUPERH32) := zImage
+defaultimage-$(CONFIG_SUPERH32) := zImage
+defaultimage-$(CONFIG_SH_SH7785LCR) := uImage
# Set some sensible Kbuild defaults
KBUILD_DEFCONFIG := shx3_defconfig
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-ifeq ($(CONFIG_FTRACE),y)
+ifeq ($(CONFIG_FUNCTION_TRACER),y)
ORIG_CFLAGS := $(KBUILD_CFLAGS)
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
endif
Say Y if you want support for the HD64461.
Otherwise, say N.
-config HD64465
- bool "Hitachi HD64465 companion chip support"
- ---help---
- The Hitachi HD64465 provides an interface for
- the SH7750 CPU, supporting a LCD controller,
- CRT color controller, IrDA, USB, PCMCIA,
- keyboard controller, and a printer interface.
-
- More information is available at
- <http://global.hitachi.com/New/cnews/E/1998/981019B.html>.
-
- Say Y if you want support for the HD64465.
- Otherwise, say N.
-
endchoice
# These will also be split into the Kconfig's below
via the HD64461 companion chip.
Otherwise, say N.
-config HD64465_IOBASE
- hex "HD64465 start address"
- depends on HD64465
- default "0xb0000000"
- help
- The default setting of the HD64465 IO base address is 0xb0000000.
-
- Do not change this unless you know what you are doing.
-
-config HD64465_IRQ
- int "HD64465 IRQ"
- depends on HD64465
- default "5"
- help
- The default setting of the HD64465 IRQ is 5.
-
- Do not change this unless you know what you are doing.
-
endmenu
-
obj-$(CONFIG_HD64461) += hd64461.o
-obj-$(CONFIG_HD64465) += hd64465/
EXTRA_CFLAGS += -Werror
+++ /dev/null
-#
-# Makefile for the HD64465
-#
-
-obj-y := setup.o io.o gpio.o
-
+++ /dev/null
-/*
- * $Id: gpio.c,v 1.4 2003/05/19 22:24:18 lethal Exp $
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc
- *
- * GPIO pin support for HD64465 companion chip.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/hd64465/gpio.h>
-
-#define _PORTOF(portpin) (((portpin)>>3)&0x7)
-#define _PINOF(portpin) ((portpin)&0x7)
-
-/* Register addresses parametrised on port */
-#define GPIO_CR(port) (HD64465_REG_GPACR+((port)<<1))
-#define GPIO_DR(port) (HD64465_REG_GPADR+((port)<<1))
-#define GPIO_ICR(port) (HD64465_REG_GPAICR+((port)<<1))
-#define GPIO_ISR(port) (HD64465_REG_GPAISR+((port)<<1))
-
-#define GPIO_NPORTS 5
-
-#define MODNAME "hd64465_gpio"
-
-EXPORT_SYMBOL(hd64465_gpio_configure);
-EXPORT_SYMBOL(hd64465_gpio_get_pin);
-EXPORT_SYMBOL(hd64465_gpio_get_port);
-EXPORT_SYMBOL(hd64465_gpio_register_irq);
-EXPORT_SYMBOL(hd64465_gpio_set_pin);
-EXPORT_SYMBOL(hd64465_gpio_set_port);
-EXPORT_SYMBOL(hd64465_gpio_unregister_irq);
-
-/* TODO: each port should be protected with a spinlock */
-
-
-void hd64465_gpio_configure(int portpin, int direction)
-{
- unsigned short cr;
- unsigned int shift = (_PINOF(portpin)<<1);
-
- cr = inw(GPIO_CR(_PORTOF(portpin)));
- cr &= ~(3<<shift);
- cr |= direction<<shift;
- outw(cr, GPIO_CR(_PORTOF(portpin)));
-}
-
-void hd64465_gpio_set_pin(int portpin, unsigned int value)
-{
- unsigned short d;
- unsigned short mask = 1<<(_PINOF(portpin));
-
- d = inw(GPIO_DR(_PORTOF(portpin)));
- if (value)
- d |= mask;
- else
- d &= ~mask;
- outw(d, GPIO_DR(_PORTOF(portpin)));
-}
-
-unsigned int hd64465_gpio_get_pin(int portpin)
-{
- return inw(GPIO_DR(_PORTOF(portpin))) & (1<<(_PINOF(portpin)));
-}
-
-/* TODO: for cleaner atomicity semantics, add a mask to this routine */
-
-void hd64465_gpio_set_port(int port, unsigned int value)
-{
- outw(value, GPIO_DR(port));
-}
-
-unsigned int hd64465_gpio_get_port(int port)
-{
- return inw(GPIO_DR(port));
-}
-
-
-static struct {
- void (*func)(int portpin, void *dev);
- void *dev;
-} handlers[GPIO_NPORTS * 8];
-
-static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev)
-{
- unsigned short port, pin, isr, mask, portpin;
-
- for (port=0 ; port<GPIO_NPORTS ; port++) {
- isr = inw(GPIO_ISR(port));
-
- for (pin=0 ; pin<8 ; pin++) {
- mask = 1<<pin;
- if (isr & mask) {
- portpin = (port<<3)|pin;
- if (handlers[portpin].func != 0)
- handlers[portpin].func(portpin, handlers[portpin].dev);
- else
- printk(KERN_NOTICE "unexpected GPIO interrupt, pin %c%d\n",
- port+'A', (int)pin);
- }
- }
-
- /* Write 1s back to ISR to clear it? That's what the manual says.. */
- outw(isr, GPIO_ISR(port));
- }
-
- return IRQ_HANDLED;
-}
-
-void hd64465_gpio_register_irq(int portpin, int mode,
- void (*handler)(int portpin, void *dev), void *dev)
-{
- unsigned long flags;
- unsigned short icr, mask;
-
- if (handler == 0)
- return;
-
- local_irq_save(flags);
-
- handlers[portpin].func = handler;
- handlers[portpin].dev = dev;
-
- /*
- * Configure Interrupt Control Register
- */
- icr = inw(GPIO_ICR(_PORTOF(portpin)));
- mask = (1<<_PINOF(portpin));
-
- /* unmask interrupt */
- icr &= ~mask;
-
- /* set TS bit */
- mask <<= 8;
- icr &= ~mask;
- if (mode == HD64465_GPIO_RISING)
- icr |= mask;
-
- outw(icr, GPIO_ICR(_PORTOF(portpin)));
-
- local_irq_restore(flags);
-}
-
-void hd64465_gpio_unregister_irq(int portpin)
-{
- unsigned long flags;
- unsigned short icr;
-
- local_irq_save(flags);
-
- /*
- * Configure Interrupt Control Register
- */
- icr = inw(GPIO_ICR(_PORTOF(portpin)));
- icr |= (1<<_PINOF(portpin)); /* mask interrupt */
- outw(icr, GPIO_ICR(_PORTOF(portpin)));
-
- handlers[portpin].func = 0;
- handlers[portpin].dev = 0;
-
- local_irq_restore(flags);
-}
-
-static int __init hd64465_gpio_init(void)
-{
- if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME))
- return -EBUSY;
- if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt,
- IRQF_DISABLED, MODNAME, 0))
- goto out_irqfailed;
-
- printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO);
-
- return 0;
-
-out_irqfailed:
- release_region(HD64465_REG_GPACR, 0x1000);
-
- return -EINVAL;
-}
-
-static void __exit hd64465_gpio_exit(void)
-{
- release_region(HD64465_REG_GPACR, 0x1000);
- free_irq(HD64465_IRQ_GPIO, 0);
-}
-
-module_init(hd64465_gpio_init);
-module_exit(hd64465_gpio_exit);
-
-MODULE_LICENSE("GPL");
-
+++ /dev/null
-/*
- * $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc
- *
- * Derived from io_hd64461.c, which bore the message:
- * Copyright (C) 2000 YAEGASHI Takeshi
- *
- * Typical I/O routines for HD64465 system.
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <asm/io.h>
-#include <asm/hd64465/hd64465.h>
-
-
-#define HD64465_DEBUG 0
-
-#if HD64465_DEBUG
-#define DPRINTK(args...) printk(args)
-#define DIPRINTK(n, args...) if (hd64465_io_debug>(n)) printk(args)
-#else
-#define DPRINTK(args...)
-#define DIPRINTK(n, args...)
-#endif
-
-
-
-/* This is a hack suitable only for debugging IO port problems */
-int hd64465_io_debug;
-EXPORT_SYMBOL(hd64465_io_debug);
-
-/* Low iomap maps port 0-1K to addresses in 8byte chunks */
-#define HD64465_IOMAP_LO_THRESH 0x400
-#define HD64465_IOMAP_LO_SHIFT 3
-#define HD64465_IOMAP_LO_MASK ((1<<HD64465_IOMAP_LO_SHIFT)-1)
-#define HD64465_IOMAP_LO_NMAP (HD64465_IOMAP_LO_THRESH>>HD64465_IOMAP_LO_SHIFT)
-static unsigned long hd64465_iomap_lo[HD64465_IOMAP_LO_NMAP];
-static unsigned char hd64465_iomap_lo_shift[HD64465_IOMAP_LO_NMAP];
-
-/* High iomap maps port 1K-64K to addresses in 1K chunks */
-#define HD64465_IOMAP_HI_THRESH 0x10000
-#define HD64465_IOMAP_HI_SHIFT 10
-#define HD64465_IOMAP_HI_MASK ((1<<HD64465_IOMAP_HI_SHIFT)-1)
-#define HD64465_IOMAP_HI_NMAP (HD64465_IOMAP_HI_THRESH>>HD64465_IOMAP_HI_SHIFT)
-static unsigned long hd64465_iomap_hi[HD64465_IOMAP_HI_NMAP];
-static unsigned char hd64465_iomap_hi_shift[HD64465_IOMAP_HI_NMAP];
-
-#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
-
-void hd64465_port_map(unsigned short baseport, unsigned int nports,
- unsigned long addr, unsigned char shift)
-{
- unsigned int port, endport = baseport + nports;
-
- DPRINTK("hd64465_port_map(base=0x%04hx, n=0x%04hx, addr=0x%08lx,endport=0x%04x)\n",
- baseport, nports, addr,endport);
-
- for (port = baseport ;
- port < endport && port < HD64465_IOMAP_LO_THRESH ;
- port += (1<<HD64465_IOMAP_LO_SHIFT)) {
- DPRINTK(" maplo[0x%x] = 0x%08lx\n", port, addr);
- hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = addr;
- hd64465_iomap_lo_shift[port>>HD64465_IOMAP_LO_SHIFT] = shift;
- addr += (1<<(HD64465_IOMAP_LO_SHIFT));
- }
-
- for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH);
- port < endport && port < HD64465_IOMAP_HI_THRESH ;
- port += (1<<HD64465_IOMAP_HI_SHIFT)) {
- DPRINTK(" maphi[0x%x] = 0x%08lx\n", port, addr);
- hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = addr;
- hd64465_iomap_hi_shift[port>>HD64465_IOMAP_HI_SHIFT] = shift;
- addr += (1<<(HD64465_IOMAP_HI_SHIFT));
- }
-}
-EXPORT_SYMBOL(hd64465_port_map);
-
-void hd64465_port_unmap(unsigned short baseport, unsigned int nports)
-{
- unsigned int port, endport = baseport + nports;
-
- DPRINTK("hd64465_port_unmap(base=0x%04hx, n=0x%04hx)\n",
- baseport, nports);
-
- for (port = baseport ;
- port < endport && port < HD64465_IOMAP_LO_THRESH ;
- port += (1<<HD64465_IOMAP_LO_SHIFT)) {
- hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = 0;
- }
-
- for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH);
- port < endport && port < HD64465_IOMAP_HI_THRESH ;
- port += (1<<HD64465_IOMAP_HI_SHIFT)) {
- hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = 0;
- }
-}
-EXPORT_SYMBOL(hd64465_port_unmap);
-
-unsigned long hd64465_isa_port2addr(unsigned long port)
-{
- unsigned long addr = 0;
- unsigned char shift;
-
- /* handle remapping of low IO ports */
- if (port < HD64465_IOMAP_LO_THRESH) {
- addr = hd64465_iomap_lo[port >> HD64465_IOMAP_LO_SHIFT];
- shift = hd64465_iomap_lo_shift[port >> HD64465_IOMAP_LO_SHIFT];
- if (addr != 0)
- addr += (port & HD64465_IOMAP_LO_MASK) << shift;
- else
- printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
- } else if (port < HD64465_IOMAP_HI_THRESH) {
- addr = hd64465_iomap_hi[port >> HD64465_IOMAP_HI_SHIFT];
- shift = hd64465_iomap_hi_shift[port >> HD64465_IOMAP_HI_SHIFT];
- if (addr != 0)
- addr += (port & HD64465_IOMAP_HI_MASK) << shift;
- else
- printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
- }
-
- /* HD64465 internal devices (0xb0000000) */
- else if (port < 0x20000)
- addr = CONFIG_HD64465_IOBASE + port - 0x10000;
-
- /* Whole physical address space (0xa0000000) */
- else
- addr = P2SEGADDR(port);
-
- DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr);
-
- return addr;
-}
-
-static inline void delay(void)
-{
- ctrl_inw(0xa0000000);
-}
-
-unsigned char hd64465_inb(unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
-
- DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b);
- return b;
-}
-
-unsigned char hd64465_inb_p(unsigned long port)
-{
- unsigned long v;
- unsigned long addr = PORT2ADDR(port);
-
- v = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
- delay();
- DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v);
- return v;
-}
-
-unsigned short hd64465_inw(unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr);
- DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b);
- return b;
-}
-
-unsigned int hd64465_inl(unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr);
- DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b);
- return b;
-}
-
-void hd64465_outb(unsigned char b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
-
- DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr);
- if (addr != 0)
- *(volatile unsigned char*)addr = b;
-}
-
-void hd64465_outb_p(unsigned char b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
-
- DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr);
- if (addr != 0)
- *(volatile unsigned char*)addr = b;
- delay();
-}
-
-void hd64465_outw(unsigned short b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr);
- if (addr != 0)
- *(volatile unsigned short*)addr = b;
-}
-
-void hd64465_outl(unsigned int b, unsigned long port)
-{
- unsigned long addr = PORT2ADDR(port);
- DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr);
- if (addr != 0)
- *(volatile unsigned long*)addr = b;
-}
-
+++ /dev/null
-/*
- * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
- *
- * Setup and IRQ handling code for the HD64465 companion chip.
- * by Greg Banks <gbanks@pocketpenguins.com>
- * Copyright (c) 2000 PocketPenguins Inc
- *
- * Derived from setup_hd64461.c which bore the message:
- * Copyright (C) 2000 YAEGASHI Takeshi
- */
-
-#include <linux/sched.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/hd64465/hd64465.h>
-
-static void disable_hd64465_irq(unsigned int irq)
-{
- unsigned short nimr;
- unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
-
- pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
- nimr = inw(HD64465_REG_NIMR);
- nimr |= mask;
- outw(nimr, HD64465_REG_NIMR);
-}
-
-static void enable_hd64465_irq(unsigned int irq)
-{
- unsigned short nimr;
- unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
-
- pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
- nimr = inw(HD64465_REG_NIMR);
- nimr &= ~mask;
- outw(nimr, HD64465_REG_NIMR);
-}
-
-static void mask_and_ack_hd64465(unsigned int irq)
-{
- disable_hd64465_irq(irq);
-}
-
-static void end_hd64465_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_hd64465_irq(irq);
-}
-
-static unsigned int startup_hd64465_irq(unsigned int irq)
-{
- enable_hd64465_irq(irq);
- return 0;
-}
-
-static void shutdown_hd64465_irq(unsigned int irq)
-{
- disable_hd64465_irq(irq);
-}
-
-static struct hw_interrupt_type hd64465_irq_type = {
- .typename = "HD64465-IRQ",
- .startup = startup_hd64465_irq,
- .shutdown = shutdown_hd64465_irq,
- .enable = enable_hd64465_irq,
- .disable = disable_hd64465_irq,
- .ack = mask_and_ack_hd64465,
- .end = end_hd64465_irq,
-};
-
-static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
-{
- printk(KERN_INFO
- "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
- inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
-
- return IRQ_NONE;
-}
-
-/*
- * Support for a secondary IRQ demux step. This is necessary
- * because the HD64465 presents a very thin interface to the
- * PCMCIA bus; a lot of features (such as remapping interrupts)
- * normally done in hardware by other PCMCIA host bridges is
- * instead done in software.
- */
-static struct {
- int (*func)(int, void *);
- void *dev;
-} hd64465_demux[HD64465_IRQ_NUM];
-
-void hd64465_register_irq_demux(int irq,
- int (*demux)(int irq, void *dev), void *dev)
-{
- hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
- hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
-}
-EXPORT_SYMBOL(hd64465_register_irq_demux);
-
-void hd64465_unregister_irq_demux(int irq)
-{
- hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
-}
-EXPORT_SYMBOL(hd64465_unregister_irq_demux);
-
-int hd64465_irq_demux(int irq)
-{
- if (irq == CONFIG_HD64465_IRQ) {
- unsigned short i, bit;
- unsigned short nirr = inw(HD64465_REG_NIRR);
- unsigned short nimr = inw(HD64465_REG_NIMR);
-
- pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
- nirr &= ~nimr;
- for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
- if (nirr & bit)
- break;
-
- if (i < HD64465_IRQ_NUM) {
- irq = HD64465_IRQ_BASE + i;
- if (hd64465_demux[i].func != 0)
- irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
- }
- }
- return irq;
-}
-
-static struct irqaction irq0 = {
- .handler = hd64465_interrupt,
- .flags = IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
- .name = "HD64465",
-};
-
-static int __init setup_hd64465(void)
-{
- int i;
- unsigned short rev;
- unsigned short smscr;
-
- if (!MACH_HD64465)
- return 0;
-
- printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
- CONFIG_HD64465_IOBASE,
- CONFIG_HD64465_IRQ,
- HD64465_IRQ_BASE,
- HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
-
- if (inw(HD64465_REG_SDID) != HD64465_SDID) {
- printk(KERN_ERR "HD64465 device ID not found, check base address\n");
- }
-
- rev = inw(HD64465_REG_SRR);
- printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
-
- outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
-
- for (i = 0; i < HD64465_IRQ_NUM ; i++) {
- irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
- }
-
- setup_irq(CONFIG_HD64465_IRQ, &irq0);
-
- /* wake up the UART from STANDBY at this point */
- smscr = inw(HD64465_REG_SMSCR);
- outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
-
- /* remap IO ports for first ISA serial port to HD64465 UART */
- hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
-
- return 0;
-}
-module_init(setup_hd64465);
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27
-# Tue Oct 21 12:57:28 2008
+# Linux kernel version: 2.6.28-rc2
+# Fri Oct 31 15:58:06 2008
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_PCI_QUIRKS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on"
+CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on root=/dev/nfs ip=dhcp"
#
# Bus options
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
#
# Partition Types
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
-# CONFIG_CRYPTO_MANAGER is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_CRYPTD is not set
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_HW is not set
#
# Library routines
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.28-rc2
+# Tue Oct 28 17:35:17 2008
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_SYS_SUPPORTS_NUMA=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+CONFIG_DEFAULT_NOOP=y
+CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SH4AL_DSP=y
+CONFIG_CPU_SHX2=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+CONFIG_CPU_SUBTYPE_SH7366=y
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x01f00000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_NUMA=y
+CONFIG_NODES_SHIFT=1
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_HUGETLB_PAGE_SIZE_64K=y
+# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
+# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
+# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_NEED_MULTIPLE_NODES=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_MIGRATION is not set
+# CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_SH_FPU_EMU is not set
+# CONFIG_SH_DSP is not set
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_PTEA=y
+CONFIG_CPU_HAS_DSP=y
+
+#
+# Board support
+#
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+# CONFIG_PREEMPT_RCU is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=dhcp"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+CONFIG_CFG80211=y
+CONFIG_NL80211=y
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_MAC80211=y
+
+#
+# Rate control algorithm selection
+#
+CONFIG_MAC80211_RC_PID=y
+# CONFIG_MAC80211_RC_MINSTREL is not set
+CONFIG_MAC80211_RC_DEFAULT_PID=y
+# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
+CONFIG_MAC80211_RC_DEFAULT="pid"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+CONFIG_IEEE80211=m
+CONFIG_IEEE80211_DEBUG=y
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+CONFIG_PATA_PLATFORM=y
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_USB is not set
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_DEBUG=y
+# CONFIG_LIBERTAS_THINFIRM is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_RTL8187 is not set
+# CONFIG_MAC80211_HWSIM is not set
+# CONFIG_P54_COMMON is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_ZD1211RW is not set
+# CONFIG_RT2X00 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET=y
+CONFIG_USB_NET_AX8817X=y
+CONFIG_USB_NET_CDCETHER=y
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=1
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_SUPERH_ON_CHIP_R8A66597 is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FTRACE=y
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_SH_KGDB is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+CONFIG_CRYPTO_MICHAEL_MIC=y
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
#include <linux/compiler.h>
#include <linux/types.h>
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
+#ifdef __LITTLE_ENDIAN__
+# define __LITTLE_ENDIAN
+#else
+# define __BIG_ENDIAN
+#endif
+
+#define __SWAB_64_THRU_32__
+
+static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
{
__asm__(
#ifdef __SH5__
return x;
}
+#define __arch_swab32 __arch_swab32
-static inline __attribute_const__ __u16 ___arch__swab16(__u16 x)
+static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
{
__asm__(
#ifdef __SH5__
return x;
}
+#define __arch_swab16 __arch_swab16
-static inline __u64 ___arch__swab64(__u64 val)
+static inline __u64 __arch_swab64(__u64 val)
{
union {
struct { __u32 a,b; } s;
__u64 u;
} v, w;
v.u = val;
- w.s.b = ___arch__swab32(v.s.a);
- w.s.a = ___arch__swab32(v.s.b);
+ w.s.b = __arch_swab32(v.s.a);
+ w.s.a = __arch_swab32(v.s.b);
return w.u;
}
+#define __arch_swab64 __arch_swab64
-#define __arch__swab64(x) ___arch__swab64(x)
-#define __arch__swab32(x) ___arch__swab32(x)
-#define __arch__swab16(x) ___arch__swab16(x)
-
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-# define __BYTEORDER_HAS_U64__
-# define __SWAB_64_THRU_32__
-#endif
-
-#ifdef __LITTLE_ENDIAN__
-#include <linux/byteorder/little_endian.h>
-#else
-#include <linux/byteorder/big_endian.h>
-#endif
+#include <linux/byteorder.h>
#endif /* __ASM_SH_BYTEORDER_H */
+++ /dev/null
-#ifndef _ASM_SH_HD64465_GPIO_
-#define _ASM_SH_HD64465_GPIO_ 1
-/*
- * $Id: gpio.h,v 1.3 2003/05/04 19:30:14 lethal Exp $
- *
- * Hitachi HD64465 companion chip: General Purpose IO pins support.
- * This layer enables other device drivers to configure GPIO
- * pins, get and set their values, and register an interrupt
- * routine for when input pins change in hardware.
- *
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- */
-#include <asm/hd64465.h>
-
-/* Macro to construct a portpin number (used in all
- * subsequent functions) from a port letter and a pin
- * number, e.g. HD64465_GPIO_PORTPIN('A', 5).
- */
-#define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin))
-
-/* Pin configuration constants for _configure() */
-#define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */
-#define HD64465_GPIO_OUT 1 /* output */
-#define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */
-#define HD64465_GPIO_IN 3 /* input */
-
-/* Configure a pin's direction */
-extern void hd64465_gpio_configure(int portpin, int direction);
-
-/* Get, set value */
-extern void hd64465_gpio_set_pin(int portpin, unsigned int value);
-extern unsigned int hd64465_gpio_get_pin(int portpin);
-extern void hd64465_gpio_set_port(int port, unsigned int value);
-extern unsigned int hd64465_gpio_get_port(int port);
-
-/* mode constants for _register_irq() */
-#define HD64465_GPIO_FALLING 0
-#define HD64465_GPIO_RISING 1
-
-/* Interrupt on external value change */
-extern void hd64465_gpio_register_irq(int portpin, int mode,
- void (*handler)(int portpin, void *dev), void *dev);
-extern void hd64465_gpio_unregister_irq(int portpin);
-
-#endif /* _ASM_SH_HD64465_GPIO_ */
+++ /dev/null
-#ifndef _ASM_SH_HD64465_
-#define _ASM_SH_HD64465_ 1
-/*
- * $Id: hd64465.h,v 1.3 2003/05/04 19:30:15 lethal Exp $
- *
- * Hitachi HD64465 companion chip support
- *
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- *
- * Derived from <asm/hd64461.h> which bore the message:
- * Copyright (C) 2000 YAEGASHI Takeshi
- */
-#include <asm/io.h>
-#include <asm/irq.h>
-
-/*
- * Note that registers are defined here as virtual port numbers,
- * which have no meaning except to get translated by hd64465_isa_port2addr()
- * to an address in the range 0xb0000000-0xb3ffffff. Note that
- * this translation happens to consist of adding the lower 16 bits
- * of the virtual port number to 0xb0000000. Note also that the manual
- * shows addresses as absolute physical addresses starting at 0x10000000,
- * so e.g. the NIRR register is listed as 0x15000 here, 0x10005000 in the
- * manual, and accessed using address 0xb0005000 - Greg.
- */
-
-/* System registers */
-#define HD64465_REG_SRR 0x1000c /* System Revision Register */
-#define HD64465_REG_SDID 0x10010 /* System Device ID Reg */
-#define HD64465_SDID 0x8122 /* 64465 device ID */
-
-/* Power Management registers */
-#define HD64465_REG_SMSCR 0x10000 /* System Module Standby Control Reg */
-#define HD64465_SMSCR_PS2ST 0x4000 /* PS/2 Standby */
-#define HD64465_SMSCR_ADCST 0x1000 /* ADC Standby */
-#define HD64465_SMSCR_UARTST 0x0800 /* UART Standby */
-#define HD64465_SMSCR_SCDIST 0x0200 /* Serial Codec Standby */
-#define HD64465_SMSCR_PPST 0x0100 /* Parallel Port Standby */
-#define HD64465_SMSCR_PC0ST 0x0040 /* PCMCIA0 Standby */
-#define HD64465_SMSCR_PC1ST 0x0020 /* PCMCIA1 Standby */
-#define HD64465_SMSCR_AFEST 0x0010 /* AFE Standby */
-#define HD64465_SMSCR_TM0ST 0x0008 /* Timer0 Standby */
-#define HD64465_SMSCR_TM1ST 0x0004 /* Timer1 Standby */
-#define HD64465_SMSCR_IRDAST 0x0002 /* IRDA Standby */
-#define HD64465_SMSCR_KBCST 0x0001 /* Keyboard Controller Standby */
-
-/* Interrupt Controller registers */
-#define HD64465_REG_NIRR 0x15000 /* Interrupt Request Register */
-#define HD64465_REG_NIMR 0x15002 /* Interrupt Mask Register */
-#define HD64465_REG_NITR 0x15004 /* Interrupt Trigger Mode Register */
-
-/* Timer registers */
-#define HD64465_REG_TCVR1 0x16000 /* Timer 1 constant value register */
-#define HD64465_REG_TCVR0 0x16002 /* Timer 0 constant value register */
-#define HD64465_REG_TRVR1 0x16004 /* Timer 1 read value register */
-#define HD64465_REG_TRVR0 0x16006 /* Timer 0 read value register */
-#define HD64465_REG_TCR1 0x16008 /* Timer 1 control register */
-#define HD64465_REG_TCR0 0x1600A /* Timer 0 control register */
-#define HD64465_TCR_EADT 0x10 /* Enable ADTRIG# signal */
-#define HD64465_TCR_ETMO 0x08 /* Enable TMO signal */
-#define HD64465_TCR_PST_MASK 0x06 /* Clock Prescale */
-#define HD64465_TCR_PST_1 0x06 /* 1:1 */
-#define HD64465_TCR_PST_4 0x04 /* 1:4 */
-#define HD64465_TCR_PST_8 0x02 /* 1:8 */
-#define HD64465_TCR_PST_16 0x00 /* 1:16 */
-#define HD64465_TCR_TSTP 0x01 /* Start/Stop timer */
-#define HD64465_REG_TIRR 0x1600C /* Timer interrupt request register */
-#define HD64465_REG_TIDR 0x1600E /* Timer interrupt disable register */
-#define HD64465_REG_PWM1CS 0x16010 /* PWM 1 clock scale register */
-#define HD64465_REG_PWM1LPC 0x16012 /* PWM 1 low pulse width counter register */
-#define HD64465_REG_PWM1HPC 0x16014 /* PWM 1 high pulse width counter register */
-#define HD64465_REG_PWM0CS 0x16018 /* PWM 0 clock scale register */
-#define HD64465_REG_PWM0LPC 0x1601A /* PWM 0 low pulse width counter register */
-#define HD64465_REG_PWM0HPC 0x1601C /* PWM 0 high pulse width counter register */
-
-/* Analog/Digital Converter registers */
-#define HD64465_REG_ADDRA 0x1E000 /* A/D data register A */
-#define HD64465_REG_ADDRB 0x1E002 /* A/D data register B */
-#define HD64465_REG_ADDRC 0x1E004 /* A/D data register C */
-#define HD64465_REG_ADDRD 0x1E006 /* A/D data register D */
-#define HD64465_REG_ADCSR 0x1E008 /* A/D control/status register */
-#define HD64465_ADCSR_ADF 0x80 /* A/D End Flag */
-#define HD64465_ADCSR_ADST 0x40 /* A/D Start Flag */
-#define HD64465_ADCSR_ADIS 0x20 /* A/D Interrupt Status */
-#define HD64465_ADCSR_TRGE 0x10 /* A/D Trigger Enable */
-#define HD64465_ADCSR_ADIE 0x08 /* A/D Interrupt Enable */
-#define HD64465_ADCSR_SCAN 0x04 /* A/D Scan Mode */
-#define HD64465_ADCSR_CH_MASK 0x03 /* A/D Channel */
-#define HD64465_REG_ADCALCR 0x1E00A /* A/D calibration sample control */
-#define HD64465_REG_ADCAL 0x1E00C /* A/D calibration data register */
-
-
-/* General Purpose I/O ports registers */
-#define HD64465_REG_GPACR 0x14000 /* Port A Control Register */
-#define HD64465_REG_GPBCR 0x14002 /* Port B Control Register */
-#define HD64465_REG_GPCCR 0x14004 /* Port C Control Register */
-#define HD64465_REG_GPDCR 0x14006 /* Port D Control Register */
-#define HD64465_REG_GPECR 0x14008 /* Port E Control Register */
-#define HD64465_REG_GPADR 0x14010 /* Port A Data Register */
-#define HD64465_REG_GPBDR 0x14012 /* Port B Data Register */
-#define HD64465_REG_GPCDR 0x14014 /* Port C Data Register */
-#define HD64465_REG_GPDDR 0x14016 /* Port D Data Register */
-#define HD64465_REG_GPEDR 0x14018 /* Port E Data Register */
-#define HD64465_REG_GPAICR 0x14020 /* Port A Interrupt Control Register */
-#define HD64465_REG_GPBICR 0x14022 /* Port B Interrupt Control Register */
-#define HD64465_REG_GPCICR 0x14024 /* Port C Interrupt Control Register */
-#define HD64465_REG_GPDICR 0x14026 /* Port D Interrupt Control Register */
-#define HD64465_REG_GPEICR 0x14028 /* Port E Interrupt Control Register */
-#define HD64465_REG_GPAISR 0x14040 /* Port A Interrupt Status Register */
-#define HD64465_REG_GPBISR 0x14042 /* Port B Interrupt Status Register */
-#define HD64465_REG_GPCISR 0x14044 /* Port C Interrupt Status Register */
-#define HD64465_REG_GPDISR 0x14046 /* Port D Interrupt Status Register */
-#define HD64465_REG_GPEISR 0x14048 /* Port E Interrupt Status Register */
-
-/* PCMCIA bridge interface */
-#define HD64465_REG_PCC0ISR 0x12000 /* socket 0 interface status */
-#define HD64465_PCCISR_PREADY 0x80 /* mem card ready / io card IREQ */
-#define HD64465_PCCISR_PIREQ 0x80
-#define HD64465_PCCISR_PMWP 0x40 /* mem card write-protected */
-#define HD64465_PCCISR_PVS2 0x20 /* voltage select pin 2 */
-#define HD64465_PCCISR_PVS1 0x10 /* voltage select pin 1 */
-#define HD64465_PCCISR_PCD_MASK 0x0c /* card detect */
-#define HD64465_PCCISR_PBVD_MASK 0x03 /* battery voltage */
-#define HD64465_PCCISR_PBVD_BATGOOD 0x03 /* battery good */
-#define HD64465_PCCISR_PBVD_BATWARN 0x01 /* battery low warning */
-#define HD64465_PCCISR_PBVD_BATDEAD1 0x02 /* battery dead */
-#define HD64465_PCCISR_PBVD_BATDEAD2 0x00 /* battery dead */
-#define HD64465_REG_PCC0GCR 0x12002 /* socket 0 general control */
-#define HD64465_PCCGCR_PDRV 0x80 /* output drive */
-#define HD64465_PCCGCR_PCCR 0x40 /* PC card reset */
-#define HD64465_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */
-#define HD64465_PCCGCR_PVCC0 0x10 /* voltage control pin VCC0SEL0 */
-#define HD64465_PCCGCR_PMMOD 0x08 /* memory mode */
-#define HD64465_PCCGCR_PPA25 0x04 /* pin A25 */
-#define HD64465_PCCGCR_PPA24 0x02 /* pin A24 */
-#define HD64465_PCCGCR_PREG 0x01 /* ping PCC0REG# */
-#define HD64465_REG_PCC0CSCR 0x12004 /* socket 0 card status change */
-#define HD64465_PCCCSCR_PSCDI 0x80 /* sw card detect intr */
-#define HD64465_PCCCSCR_PSWSEL 0x40 /* power select */
-#define HD64465_PCCCSCR_PIREQ 0x20 /* IREQ intr req */
-#define HD64465_PCCCSCR_PSC 0x10 /* STSCHG (status change) pin */
-#define HD64465_PCCCSCR_PCDC 0x08 /* CD (card detect) change */
-#define HD64465_PCCCSCR_PRC 0x04 /* ready change */
-#define HD64465_PCCCSCR_PBW 0x02 /* battery warning change */
-#define HD64465_PCCCSCR_PBD 0x01 /* battery dead change */
-#define HD64465_REG_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */
-#define HD64465_PCCCSCIER_PCRE 0x80 /* change reset enable */
-#define HD64465_PCCCSCIER_PIREQE_MASK 0x60 /* IREQ enable */
-#define HD64465_PCCCSCIER_PIREQE_DISABLED 0x00 /* IREQ disabled */
-#define HD64465_PCCCSCIER_PIREQE_LEVEL 0x20 /* IREQ level-triggered */
-#define HD64465_PCCCSCIER_PIREQE_FALLING 0x40 /* IREQ falling-edge-trig */
-#define HD64465_PCCCSCIER_PIREQE_RISING 0x60 /* IREQ rising-edge-trig */
-#define HD64465_PCCCSCIER_PSCE 0x10 /* status change enable */
-#define HD64465_PCCCSCIER_PCDE 0x08 /* card detect change enable */
-#define HD64465_PCCCSCIER_PRE 0x04 /* ready change enable */
-#define HD64465_PCCCSCIER_PBWE 0x02 /* battery warn change enable */
-#define HD64465_PCCCSCIER_PBDE 0x01 /* battery dead change enable*/
-#define HD64465_REG_PCC0SCR 0x12008 /* socket 0 software control */
-#define HD64465_PCCSCR_SHDN 0x10 /* TPS2206 SHutDowN pin */
-#define HD64465_PCCSCR_SWP 0x01 /* write protect */
-#define HD64465_REG_PCCPSR 0x1200A /* serial power switch control */
-#define HD64465_REG_PCC1ISR 0x12010 /* socket 1 interface status */
-#define HD64465_REG_PCC1GCR 0x12012 /* socket 1 general control */
-#define HD64465_REG_PCC1CSCR 0x12014 /* socket 1 card status change */
-#define HD64465_REG_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */
-#define HD64465_REG_PCC1SCR 0x12018 /* socket 1 software control */
-
-
-/* PS/2 Keyboard and mouse controller -- *not* register compatible */
-#define HD64465_REG_KBCSR 0x1dc00 /* Keyboard Control/Status reg */
-#define HD64465_KBCSR_KBCIE 0x8000 /* KBCK Input Enable */
-#define HD64465_KBCSR_KBCOE 0x4000 /* KBCK Output Enable */
-#define HD64465_KBCSR_KBDOE 0x2000 /* KB DATA Output Enable */
-#define HD64465_KBCSR_KBCD 0x1000 /* KBCK Driven */
-#define HD64465_KBCSR_KBDD 0x0800 /* KB DATA Driven */
-#define HD64465_KBCSR_KBCS 0x0400 /* KBCK pin Status */
-#define HD64465_KBCSR_KBDS 0x0200 /* KB DATA pin Status */
-#define HD64465_KBCSR_KBDP 0x0100 /* KB DATA Parity bit */
-#define HD64465_KBCSR_KBD_MASK 0x00ff /* KD DATA shift reg */
-#define HD64465_REG_KBISR 0x1dc04 /* Keyboard Interrupt Status reg */
-#define HD64465_KBISR_KBRDF 0x0001 /* KB Received Data Full */
-#define HD64465_REG_MSCSR 0x1dc10 /* Mouse Control/Status reg */
-#define HD64465_REG_MSISR 0x1dc14 /* Mouse Interrupt Status reg */
-
-
-/*
- * Logical address at which the HD64465 is mapped. Note that this
- * should always be in the P2 segment (uncached and untranslated).
- */
-#ifndef CONFIG_HD64465_IOBASE
-#define CONFIG_HD64465_IOBASE 0xb0000000
-#endif
-/*
- * The HD64465 multiplexes all its modules' interrupts onto
- * this single interrupt.
- */
-#ifndef CONFIG_HD64465_IRQ
-#define CONFIG_HD64465_IRQ 5
-#endif
-
-
-#define _HD64465_IO_MASK 0xf8000000
-#define is_hd64465_addr(addr) \
- ((addr & _HD64465_IO_MASK) == (CONFIG_HD64465_IOBASE & _HD64465_IO_MASK))
-
-/*
- * A range of 16 virtual interrupts generated by
- * demuxing the HD64465 muxed interrupt.
- */
-#define HD64465_IRQ_BASE OFFCHIP_IRQ_BASE
-#define HD64465_IRQ_NUM 16
-#define HD64465_IRQ_ADC (HD64465_IRQ_BASE+0)
-#define HD64465_IRQ_USB (HD64465_IRQ_BASE+1)
-#define HD64465_IRQ_SCDI (HD64465_IRQ_BASE+2)
-#define HD64465_IRQ_PARALLEL (HD64465_IRQ_BASE+3)
-/* bit 4 is reserved */
-#define HD64465_IRQ_UART (HD64465_IRQ_BASE+5)
-#define HD64465_IRQ_IRDA (HD64465_IRQ_BASE+6)
-#define HD64465_IRQ_PS2MOUSE (HD64465_IRQ_BASE+7)
-#define HD64465_IRQ_KBC (HD64465_IRQ_BASE+8)
-#define HD64465_IRQ_TIMER1 (HD64465_IRQ_BASE+9)
-#define HD64465_IRQ_TIMER0 (HD64465_IRQ_BASE+10)
-#define HD64465_IRQ_GPIO (HD64465_IRQ_BASE+11)
-#define HD64465_IRQ_AFE (HD64465_IRQ_BASE+12)
-#define HD64465_IRQ_PCMCIA1 (HD64465_IRQ_BASE+13)
-#define HD64465_IRQ_PCMCIA0 (HD64465_IRQ_BASE+14)
-#define HD64465_IRQ_PS2KBD (HD64465_IRQ_BASE+15)
-
-/* Constants for PCMCIA mappings */
-#define HD64465_PCC_WINDOW 0x01000000
-
-#define HD64465_PCC0_BASE 0xb8000000 /* area 6 */
-#define HD64465_PCC0_ATTR (HD64465_PCC0_BASE)
-#define HD64465_PCC0_COMM (HD64465_PCC0_BASE+HD64465_PCC_WINDOW)
-#define HD64465_PCC0_IO (HD64465_PCC0_BASE+2*HD64465_PCC_WINDOW)
-
-#define HD64465_PCC1_BASE 0xb4000000 /* area 5 */
-#define HD64465_PCC1_ATTR (HD64465_PCC1_BASE)
-#define HD64465_PCC1_COMM (HD64465_PCC1_BASE+HD64465_PCC_WINDOW)
-#define HD64465_PCC1_IO (HD64465_PCC1_BASE+2*HD64465_PCC_WINDOW)
-
-/*
- * Base of USB controller interface (as memory)
- */
-#define HD64465_USB_BASE (CONFIG_HD64465_IOBASE+0xb000)
-#define HD64465_USB_LEN 0x1000
-/*
- * Base of embedded SRAM, used for USB controller.
- */
-#define HD64465_SRAM_BASE (CONFIG_HD64465_IOBASE+0x9000)
-#define HD64465_SRAM_LEN 0x1000
-
-
-
-#endif /* _ASM_SH_HD64465_ */
+++ /dev/null
-/*
- * include/asm-sh/hd64465/io.h
- *
- * By Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc.
- *
- * Derived from io_hd64461.h, which bore the message:
- * Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
- *
- * May be copied or modified under the terms of the GNU General Public
- * License. See linux/COPYING for more information.
- *
- * IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller".
- */
-
-#ifndef _ASM_SH_IO_HD64465_H
-#define _ASM_SH_IO_HD64465_H
-
-extern unsigned char hd64465_inb(unsigned long port);
-extern unsigned short hd64465_inw(unsigned long port);
-extern unsigned int hd64465_inl(unsigned long port);
-
-extern void hd64465_outb(unsigned char value, unsigned long port);
-extern void hd64465_outw(unsigned short value, unsigned long port);
-extern void hd64465_outl(unsigned int value, unsigned long port);
-
-extern unsigned char hd64465_inb_p(unsigned long port);
-extern void hd64465_outb_p(unsigned char value, unsigned long port);
-
-extern unsigned long hd64465_isa_port2addr(unsigned long offset);
-extern int hd64465_irq_demux(int irq);
-/* Provision for generic secondary demux step -- used by PCMCIA code */
-extern void hd64465_register_irq_demux(int irq,
- int (*demux)(int irq, void *dev), void *dev);
-extern void hd64465_unregister_irq_demux(int irq);
-/* Set this variable to 1 to see port traffic */
-extern int hd64465_io_debug;
-/* Map a range of ports to a range of kernel virtual memory.
- */
-extern void hd64465_port_map(unsigned short baseport, unsigned int nports,
- unsigned long addr, unsigned char shift);
-extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports);
-
-#endif /* _ASM_SH_IO_HD64465_H */
#ifndef _ASM_SERIAL_H
#define _ASM_SERIAL_H
-#include <linux/kernel.h>
-
/*
* This assumes you have a 1.8432 MHz clock for your UART.
*
*/
#define BASE_BAUD ( 1843200 / 16 )
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#ifdef CONFIG_HD64465
-#include <asm/hd64465/hd64465.h>
-
-#define SERIAL_PORT_DFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
-
-#else
-
-#define SERIAL_PORT_DFNS
-
-#endif
-
#endif /* _ASM_SERIAL_H */
#ifndef __ASM_SH_CPU_SH4_RTC_H
#define __ASM_SH_CPU_SH4_RTC_H
-#ifdef CONFIG_CPU_SUBTYPE_SH7723
+#if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7723)
#define rtc_reg_size sizeof(u16)
#else
#define rtc_reg_size sizeof(u32)
.resource = iic_resources,
};
+static struct resource usb_host_resources[] = {
+ [0] = {
+ .name = "r8a66597_hcd",
+ .start = 0xa4d80000,
+ .end = 0xa4d800ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "r8a66597_hcd",
+ .start = 65,
+ .end = 65,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device usb_host_device = {
+ .name = "r8a66597_hcd",
+ .id = -1,
+ .dev = {
+ .dma_mask = NULL,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(usb_host_resources),
+ .resource = usb_host_resources,
+};
+
static struct uio_info vpu_platform_data = {
.name = "VPU5",
.version = "0",
static struct platform_device *sh7366_devices[] __initdata = {
&iic_device,
&sci_device,
+ &usb_host_device,
&vpu_device,
&veu0_device,
&veu1_device,
clk_always_enable("mstp022"); /* INTC */
clk_always_enable("mstp020"); /* SuperHyway */
clk_always_enable("mstp109"); /* I2C */
+ clk_always_enable("mstp211"); /* USB */
clk_always_enable("mstp207"); /* VEU-2 */
clk_always_enable("mstp202"); /* VEU-1 */
clk_always_enable("mstp201"); /* VPU */
/*
* SH7722 Setup
*
- * Copyright (C) 2006 - 2007 Paul Mundt
+ * Copyright (C) 2006 - 2008 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
#include <asm/clock.h>
#include <asm/mmzone.h>
+static struct resource rtc_resources[] = {
+ [0] = {
+ .start = 0xa465fec0,
+ .end = 0xa465fec0 + 0x58 - 1,
+ .flags = IORESOURCE_IO,
+ },
+ [1] = {
+ /* Period IRQ */
+ .start = 45,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ /* Carry IRQ */
+ .start = 46,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ /* Alarm IRQ */
+ .start = 44,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device rtc_device = {
+ .name = "sh-rtc",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(rtc_resources),
+ .resource = rtc_resources,
+};
+
static struct resource usbf_resources[] = {
[0] = {
.name = "m66592_udc",
};
static struct platform_device *sh7722_devices[] __initdata = {
+ &rtc_device,
&usbf_device,
&iic_device,
&sci_device,
IRDA, JPU, LCDC,
/* interrupt groups */
-
SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI,
};
7: .long do_syscall_trace_enter
8: .long do_syscall_trace_leave
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
.align 2
.globl _mcount
.type _mcount,@function
ftrace_stub:
rts
nop
-#endif /* CONFIG_FTRACE */
+#endif /* CONFIG_FUNCTION_TRACER */
EXPORT_SYMBOL(__ndelay);
EXPORT_SYMBOL(__const_udelay);
-#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
+#define DECLARE_EXPORT(name) \
+ extern void name(void);EXPORT_SYMBOL(name)
+#define MAYBE_DECLARE_EXPORT(name) \
+ extern void name(void) __weak;EXPORT_SYMBOL(name)
/* These symbols are generated by the compiler itself */
DECLARE_EXPORT(__udivsi3);
* compiler which include backported patches.
*/
DECLARE_EXPORT(__udiv_qrnnd_16);
-#if !defined(CONFIG_CPU_SH2)
-DECLARE_EXPORT(__sdivsi3_i4i);
-DECLARE_EXPORT(__udivsi3_i4i);
-#endif
+MAYBE_DECLARE_EXPORT(__sdivsi3_i4i);
+MAYBE_DECLARE_EXPORT(__udivsi3_i4i);
#endif
#else /* GCC 3.x */
DECLARE_EXPORT(__movstr_i4_even);
EXPORT_SYMBOL(clear_user_page);
#endif
-#ifdef CONFIG_FTRACE
+#ifdef CONFIG_FUNCTION_TRACER
EXPORT_SYMBOL(mcount);
#endif
EXPORT_SYMBOL(csum_partial);
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
}
back_to_cached();
local_irq_restore(flags);
/* I-cache invalidate */
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
}
#else
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_IC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_IC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
ctrl_outl((v & CACHE_PHYSADDR_MASK),
- CACHE_OC_ADDRESS_ARRAY | (v & 0x000003f0) | 0x00000008);
+ CACHE_OC_ADDRESS_ARRAY | (v & 0x000007f0) | 0x00000008);
}
#endif
back_to_cached();
return -ENODEV;
ops = &sh7750_perf_counter_ops;
- ops->cpu_type = (char *)get_cpu_subtype(¤t_cpu_data);
+ ops->cpu_type = "sh/sh7750";
- printk(KERN_INFO "oprofile: using SH-4 (%s) performance monitoring.\n",
- sh7750_perf_counter_ops.cpu_type);
+ printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n");
/* Clear the counters */
ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
void oprofile_arch_exit(void)
{
}
-
# List of companion chips / MFDs.
#
HD64461 HD64461
-HD64465 HD64465
#
# List of boards.
return cdrom_open(gd.cd_info, bdev, mode);
}
-static int gdrom_bdops_release(struct block_device *bdev, fmode_t mode)
+static int gdrom_bdops_release(struct gendisk *disk, fmode_t mode)
{
- return cdrom_release(gd.cd_info, mode);
+ cdrom_release(gd.cd_info, mode);
+ return 0;
}
static int gdrom_bdops_mediachanged(struct gendisk *disk)
This driver is also available as a module called m8xx_pcmcia.
-config HD64465_PCMCIA
- tristate "HD64465 host bridge support"
- depends on HD64465 && PCMCIA
-
config PCMCIA_AU1X00
tristate "Au1x00 pcmcia support"
depends on SOC_AU1X00 && PCMCIA
obj-$(CONFIG_I82092) += i82092.o
obj-$(CONFIG_TCIC) += tcic.o
obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
-obj-$(CONFIG_HD64465_PCMCIA) += hd64465_ss.o
obj-$(CONFIG_PCMCIA_SA1100) += sa11xx_core.o sa1100_cs.o
obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_core.o sa1111_cs.o
obj-$(CONFIG_M32R_PCC) += m32r_pcc.o
+++ /dev/null
-/*
- * Device driver for the PCMCIA controller module of the
- * Hitachi HD64465 handheld companion chip.
- *
- * Note that the HD64465 provides a very thin PCMCIA host bridge
- * layer, requiring a lot of the work of supporting cards to be
- * performed by the processor. For example: mapping of card
- * interrupts to processor IRQs is done by IRQ demuxing software;
- * IO and memory mappings are fixed; setting voltages according
- * to card Voltage Select pins etc is done in software.
- *
- * Note also that this driver uses only the simple, fixed,
- * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
- * HD64465. Larger mappings, smaller mappings, or mappings of
- * different width to the same socket, are all possible only by
- * involving the SH7750's MMU, which is considered unnecessary here.
- * The downside is that it may be possible for some drivers to
- * break because they need or expect 8-bit mappings.
- *
- * This driver currently supports only the following configuration:
- * SH7750 CPU, HD64465, TPS2206 voltage control chip.
- *
- * by Greg Banks <gbanks@pocketpenguins.com>
- * (c) 2000 PocketPenguins Inc
- */
-
-#include <linux/types.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/vmalloc.h>
-#include <asm/errno.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-
-#include <asm/io.h>
-#include <asm/hd64465/hd64465.h>
-#include <asm/hd64465/io.h>
-
-#include <pcmcia/cs_types.h>
-#include <pcmcia/cs.h>
-#include <pcmcia/cistpl.h>
-#include <pcmcia/ds.h>
-#include <pcmcia/ss.h>
-
-#define MODNAME "hd64465_ss"
-
-/* #define HD64465_DEBUG 1 */
-
-#if HD64465_DEBUG
-#define DPRINTK(args...) printk(MODNAME ": " args)
-#else
-#define DPRINTK(args...)
-#endif
-
-extern int hd64465_io_debug;
-extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
-extern void p3_iounmap(void *addr);
-
-/*============================================================*/
-
-#define HS_IO_MAP_SIZE (64*1024)
-
-typedef struct hs_socket_t
-{
- unsigned int number;
- u_int irq;
- u_long mem_base;
- void *io_base;
- u_long mem_length;
- u_int ctrl_base;
- socket_state_t state;
- pccard_io_map io_maps[MAX_IO_WIN];
- pccard_mem_map mem_maps[MAX_WIN];
- struct pcmcia_socket socket;
-} hs_socket_t;
-
-
-
-#define HS_MAX_SOCKETS 2
-static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
-
-#define hs_in(sp, r) inb((sp)->ctrl_base + (r))
-#define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
-
-
-/* translate a boolean value to a bit in a register */
-#define bool_to_regbit(sp, r, bi, bo) \
- do { \
- unsigned short v = hs_in(sp, r); \
- if (bo) \
- v |= (bi); \
- else \
- v &= ~(bi); \
- hs_out(sp, v, r); \
- } while(0)
-
-/* register offsets from HD64465_REG_PCC[01]ISR */
-#define ISR 0x0
-#define GCR 0x2
-#define CSCR 0x4
-#define CSCIER 0x6
-#define SCR 0x8
-
-
-/* Mask and values for CSCIER register */
-#define IER_MASK 0x80
-#define IER_ON 0x3f /* interrupts on */
-#define IER_OFF 0x00 /* interrupts off */
-
-/*============================================================*/
-
-#if HD64465_DEBUG > 10
-
-static void cis_hex_dump(const unsigned char *x, int len)
-{
- int i;
-
- for (i=0 ; i<len ; i++)
- {
- if (!(i & 0xf))
- printk("\n%08x", (unsigned)(x + i));
- printk(" %02x", *(volatile unsigned short*)x);
- x += 2;
- }
- printk("\n");
-}
-
-#endif
-/*============================================================*/
-
-/*
- * This code helps create the illusion that the IREQ line from
- * the PC card is mapped to one of the CPU's IRQ lines by the
- * host bridge hardware (which is how every host bridge *except*
- * the HD64465 works). In particular, it supports enabling
- * and disabling the IREQ line by code which knows nothing
- * about the host bridge (e.g. device drivers, IDE code) using
- * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
- * functions. Also, it supports sharing the mapped IRQ with
- * real hardware IRQs from the -IRL0-3 lines.
- */
-
-#define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
-static struct
-{
- /* index is mapped irq number */
- hs_socket_t *sock;
- hw_irq_controller *old_handler;
-} hs_mapped_irq[HS_NUM_MAPPED_IRQS];
-
-static void hs_socket_enable_ireq(hs_socket_t *sp)
-{
- unsigned short cscier;
-
- DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
-
- cscier = hs_in(sp, CSCIER);
- cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
- cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
- hs_out(sp, cscier, CSCIER);
-}
-
-static void hs_socket_disable_ireq(hs_socket_t *sp)
-{
- unsigned short cscier;
-
- DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
-
- cscier = hs_in(sp, CSCIER);
- cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
- hs_out(sp, cscier, CSCIER);
-}
-
-static unsigned int hs_startup_irq(unsigned int irq)
-{
- hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
- hs_mapped_irq[irq].old_handler->startup(irq);
- return 0;
-}
-
-static void hs_shutdown_irq(unsigned int irq)
-{
- hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
- hs_mapped_irq[irq].old_handler->shutdown(irq);
-}
-
-static void hs_enable_irq(unsigned int irq)
-{
- hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
- hs_mapped_irq[irq].old_handler->enable(irq);
-}
-
-static void hs_disable_irq(unsigned int irq)
-{
- hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
- hs_mapped_irq[irq].old_handler->disable(irq);
-}
-
-extern struct hw_interrupt_type no_irq_type;
-
-static void hs_mask_and_ack_irq(unsigned int irq)
-{
- hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
- /* ack_none() spuriously complains about an unexpected IRQ */
- if (hs_mapped_irq[irq].old_handler != &no_irq_type)
- hs_mapped_irq[irq].old_handler->ack(irq);
-}
-
-static void hs_end_irq(unsigned int irq)
-{
- hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
- hs_mapped_irq[irq].old_handler->end(irq);
-}
-
-
-static struct hw_interrupt_type hd64465_ss_irq_type = {
- .typename = "PCMCIA-IRQ",
- .startup = hs_startup_irq,
- .shutdown = hs_shutdown_irq,
- .enable = hs_enable_irq,
- .disable = hs_disable_irq,
- .ack = hs_mask_and_ack_irq,
- .end = hs_end_irq
-};
-
-/*
- * This function should only ever be called with interrupts disabled.
- */
-static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
-{
- struct irq_desc *desc;
-
- DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
-
- if (irq >= HS_NUM_MAPPED_IRQS)
- return;
-
- desc = irq_to_desc(irq);
- hs_mapped_irq[irq].sock = sp;
- /* insert ourselves as the irq controller */
- hs_mapped_irq[irq].old_handler = desc->chip;
- desc->chip = &hd64465_ss_irq_type;
-}
-
-
-/*
- * This function should only ever be called with interrupts disabled.
- */
-static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
-{
- struct irq_desc *desc;
-
- DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
-
- if (irq >= HS_NUM_MAPPED_IRQS)
- return;
-
- desc = irq_to_desc(irq);
- /* restore the original irq controller */
- desc->chip = hs_mapped_irq[irq].old_handler;
-}
-
-/*============================================================*/
-
-
-/*
- * Set Vpp and Vcc (in tenths of a Volt). Does not
- * support the hi-Z state.
- *
- * Note, this assumes the board uses a TPS2206 chip to control
- * the Vcc and Vpp voltages to the hs_sockets. If your board
- * uses the MIC2563 (also supported by the HD64465) then you
- * will have to modify this function.
- */
- /* 0V 3.3V 5.5V */
-static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
-static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
-
-static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
-{
- u_int psr;
- u_int vcci = 0;
- u_int sock = sp->number;
-
- DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
-
- switch (Vcc)
- {
- case 0: vcci = 0; break;
- case 33: vcci = 1; break;
- case 50: vcci = 2; break;
- default: return 0;
- }
-
- /* Note: Vpp = 120 not supported -- Greg Banks */
- if (Vpp != 0 && Vpp != Vcc)
- return 0;
-
- /* The PSR register holds 8 of the 9 bits which control
- * the TPS2206 via its serial interface.
- */
- psr = inw(HD64465_REG_PCCPSR);
- switch (sock)
- {
- case 0:
- psr &= 0x0f;
- psr |= hs_tps2206_avcc[vcci];
- psr |= (Vpp == 0 ? 0x00 : 0x02);
- break;
- case 1:
- psr &= 0xf0;
- psr |= hs_tps2206_bvcc[vcci];
- psr |= (Vpp == 0 ? 0x00 : 0x20);
- break;
- };
- outw(psr, HD64465_REG_PCCPSR);
-
- return 1;
-}
-
-
-/*============================================================*/
-
-/*
- * Drive the RESET line to the card.
- */
-static void hs_reset_socket(hs_socket_t *sp, int on)
-{
- unsigned short v;
-
- v = hs_in(sp, GCR);
- if (on)
- v |= HD64465_PCCGCR_PCCR;
- else
- v &= ~HD64465_PCCGCR_PCCR;
- hs_out(sp, v, GCR);
-}
-
-/*============================================================*/
-
-static int hs_init(struct pcmcia_socket *s)
-{
- hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
-
- DPRINTK("hs_init(%d)\n", sp->number);
-
- return 0;
-}
-
-/*============================================================*/
-
-
-static int hs_get_status(struct pcmcia_socket *s, u_int *value)
-{
- hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
- unsigned int isr;
- u_int status = 0;
-
-
- isr = hs_in(sp, ISR);
-
- /* Card is seated and powered when *both* CD pins are low */
- if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
- {
- status |= SS_DETECT; /* card present */
-
- switch (isr & HD64465_PCCISR_PBVD_MASK)
- {
- case HD64465_PCCISR_PBVD_BATGOOD:
- break;
- case HD64465_PCCISR_PBVD_BATWARN:
- status |= SS_BATWARN;
- break;
- default:
- status |= SS_BATDEAD;
- break;
- }
-
- if (isr & HD64465_PCCISR_PREADY)
- status |= SS_READY;
-
- if (isr & HD64465_PCCISR_PMWP)
- status |= SS_WRPROT;
-
- /* Voltage Select pins interpreted as per Table 4-5 of the std.
- * Assuming we have the TPS2206, the socket is a "Low Voltage
- * key, 3.3V and 5V available, no X.XV available".
- */
- switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
- {
- case HD64465_PCCISR_PVS1:
- printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
- status = 0;
- break;
- case 0:
- case HD64465_PCCISR_PVS2:
- /* 3.3V */
- status |= SS_3VCARD;
- break;
- case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
- /* 5V */
- break;
- }
-
- /* TODO: SS_POWERON */
- /* TODO: SS_STSCHG */
- }
-
- DPRINTK("hs_get_status(%d) = %x\n", sock, status);
-
- *value = status;
- return 0;
-}
-
-/*============================================================*/
-
-static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
-{
- hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
- u_long flags;
- u_int changed;
- unsigned short cscier;
-
- DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
- sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
-
- local_irq_save(flags); /* Don't want interrupts happening here */
-
- if (state->Vpp != sp->state.Vpp ||
- state->Vcc != sp->state.Vcc) {
- if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
- local_irq_restore(flags);
- return -EINVAL;
- }
- }
-
-/* hd64465_io_debug = 1; */
- /*
- * Handle changes in the Card Status Change mask,
- * by propagating to the CSCR register
- */
- changed = sp->state.csc_mask ^ state->csc_mask;
- cscier = hs_in(sp, CSCIER);
-
- if (changed & SS_DETECT) {
- if (state->csc_mask & SS_DETECT)
- cscier |= HD64465_PCCCSCIER_PCDE;
- else
- cscier &= ~HD64465_PCCCSCIER_PCDE;
- }
-
- if (changed & SS_READY) {
- if (state->csc_mask & SS_READY)
- cscier |= HD64465_PCCCSCIER_PRE;
- else
- cscier &= ~HD64465_PCCCSCIER_PRE;
- }
-
- if (changed & SS_BATDEAD) {
- if (state->csc_mask & SS_BATDEAD)
- cscier |= HD64465_PCCCSCIER_PBDE;
- else
- cscier &= ~HD64465_PCCCSCIER_PBDE;
- }
-
- if (changed & SS_BATWARN) {
- if (state->csc_mask & SS_BATWARN)
- cscier |= HD64465_PCCCSCIER_PBWE;
- else
- cscier &= ~HD64465_PCCCSCIER_PBWE;
- }
-
- if (changed & SS_STSCHG) {
- if (state->csc_mask & SS_STSCHG)
- cscier |= HD64465_PCCCSCIER_PSCE;
- else
- cscier &= ~HD64465_PCCCSCIER_PSCE;
- }
-
- hs_out(sp, cscier, CSCIER);
-
- if (sp->state.io_irq && !state->io_irq)
- hs_unmap_irq(sp, sp->state.io_irq);
- else if (!sp->state.io_irq && state->io_irq)
- hs_map_irq(sp, state->io_irq);
-
-
- /*
- * Handle changes in the flags field,
- * by propagating to config registers.
- */
- changed = sp->state.flags ^ state->flags;
-
- if (changed & SS_IOCARD) {
- DPRINTK("card type: %s\n",
- (state->flags & SS_IOCARD ? "i/o" : "memory" ));
- bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
- state->flags & SS_IOCARD);
- }
-
- if (changed & SS_RESET) {
- DPRINTK("%s reset card\n",
- (state->flags & SS_RESET ? "start" : "stop"));
- bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
- state->flags & SS_RESET);
- }
-
- if (changed & SS_OUTPUT_ENA) {
- DPRINTK("%sabling card output\n",
- (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
- bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
- state->flags & SS_OUTPUT_ENA);
- }
-
- /* TODO: SS_SPKR_ENA */
-
-/* hd64465_io_debug = 0; */
- sp->state = *state;
-
- local_irq_restore(flags);
-
-#if HD64465_DEBUG > 10
- if (state->flags & SS_OUTPUT_ENA)
- cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
-#endif
- return 0;
-}
-
-/*============================================================*/
-
-static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
-{
- hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
- int map = io->map;
- int sock = sp->number;
- struct pccard_io_map *sio;
- pgprot_t prot;
-
- DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
- sock, map, io->flags, io->speed, io->start, io->stop);
- if (map >= MAX_IO_WIN)
- return -EINVAL;
- sio = &sp->io_maps[map];
-
- /* check for null changes */
- if (io->flags == sio->flags &&
- io->start == sio->start &&
- io->stop == sio->stop)
- return 0;
-
- if (io->flags & MAP_AUTOSZ)
- prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
- else if (io->flags & MAP_16BIT)
- prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
- else
- prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
-
- /* TODO: handle MAP_USE_WAIT */
- if (io->flags & MAP_USE_WAIT)
- printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
- /* TODO: handle MAP_PREFETCH */
- if (io->flags & MAP_PREFETCH)
- printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
- /* TODO: handle MAP_WRPROT */
- if (io->flags & MAP_WRPROT)
- printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
- /* TODO: handle MAP_0WS */
- if (io->flags & MAP_0WS)
- printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
-
- if (io->flags & MAP_ACTIVE) {
- unsigned long pstart, psize, paddrbase;
-
- paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
- pstart = io->start & PAGE_MASK;
- psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
-
- /*
- * Change PTEs in only that portion of the mapping requested
- * by the caller. This means that most of the time, most of
- * the PTEs in the io_vma will be unmapped and only the bottom
- * page will be mapped. But the code allows for weird cards
- * that might want IO ports > 4K.
- */
- sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
-
- /*
- * Change the mapping used by inb() outb() etc
- */
- hd64465_port_map(io->start,
- io->stop - io->start + 1,
- (unsigned long)sp->io_base + io->start, 0);
- } else {
- hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
- p3_iounmap(sp->io_base);
- }
-
- *sio = *io;
- return 0;
-}
-
-/*============================================================*/
-
-static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
-{
- hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
- struct pccard_mem_map *smem;
- int map = mem->map;
- unsigned long paddr;
-
-#if 0
- DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
- sock, map, mem->flags, mem->card_start);
-#endif
-
- if (map >= MAX_WIN)
- return -EINVAL;
- smem = &sp->mem_maps[map];
-
- paddr = sp->mem_base; /* base of Attribute mapping */
- if (!(mem->flags & MAP_ATTRIB))
- paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
- paddr += mem->card_start;
-
- /* Because we specified SS_CAP_STATIC_MAP, we are obliged
- * at this time to report the system address corresponding
- * to the card address requested. This is how Socket Services
- * queries our fixed mapping. I wish this fact had been
- * documented - Greg Banks.
- */
- mem->static_start = paddr;
-
- *smem = *mem;
-
- return 0;
-}
-
-/* TODO: do we need to use the MMU to access Common memory ??? */
-
-/*============================================================*/
-
-/*
- * This function is registered with the HD64465 glue code to do a
- * secondary demux step on the PCMCIA interrupts. It handles
- * mapping the IREQ request from the card to a standard Linux
- * IRQ, as requested by SocketServices.
- */
-static int hs_irq_demux(int irq, void *dev)
-{
- hs_socket_t *sp = dev;
- u_int cscr;
-
- DPRINTK("hs_irq_demux(irq=%d)\n", irq);
-
- if (sp->state.io_irq &&
- (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
- cscr &= ~HD64465_PCCCSCR_PIREQ;
- hs_out(sp, cscr, CSCR);
- return sp->state.io_irq;
- }
-
- return irq;
-}
-
-/*============================================================*/
-
-/*
- * Interrupt handling routine.
- */
-
-static irqreturn_t hs_interrupt(int irq, void *dev)
-{
- hs_socket_t *sp = dev;
- u_int events = 0;
- u_int cscr;
-
- cscr = hs_in(sp, CSCR);
-
- DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
-
- /* check for bus-related changes to be reported to Socket Services */
- if (cscr & HD64465_PCCCSCR_PCDC) {
- /* double-check for a 16-bit card, as we don't support CardBus */
- if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
- printk(KERN_NOTICE MODNAME
- ": socket %d, card not a supported card type or not inserted correctly\n",
- sp->number);
- /* Don't do the rest unless a card is present */
- cscr &= ~(HD64465_PCCCSCR_PCDC|
- HD64465_PCCCSCR_PRC|
- HD64465_PCCCSCR_PBW|
- HD64465_PCCCSCR_PBD|
- HD64465_PCCCSCR_PSC);
- } else {
- cscr &= ~HD64465_PCCCSCR_PCDC;
- events |= SS_DETECT; /* card insertion or removal */
- }
- }
- if (cscr & HD64465_PCCCSCR_PRC) {
- cscr &= ~HD64465_PCCCSCR_PRC;
- events |= SS_READY; /* ready signal changed */
- }
- if (cscr & HD64465_PCCCSCR_PBW) {
- cscr &= ~HD64465_PCCCSCR_PSC;
- events |= SS_BATWARN; /* battery warning */
- }
- if (cscr & HD64465_PCCCSCR_PBD) {
- cscr &= ~HD64465_PCCCSCR_PSC;
- events |= SS_BATDEAD; /* battery dead */
- }
- if (cscr & HD64465_PCCCSCR_PSC) {
- cscr &= ~HD64465_PCCCSCR_PSC;
- events |= SS_STSCHG; /* STSCHG (status changed) signal */
- }
-
- if (cscr & HD64465_PCCCSCR_PIREQ) {
- cscr &= ~HD64465_PCCCSCR_PIREQ;
-
- /* This should have been dealt with during irq demux */
- printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
- }
-
- hs_out(sp, cscr, CSCR);
-
- if (events)
- pcmcia_parse_events(&sp->socket, events);
-
- return IRQ_HANDLED;
-}
-
-/*============================================================*/
-
-static struct pccard_operations hs_operations = {
- .init = hs_init,
- .get_status = hs_get_status,
- .set_socket = hs_set_socket,
- .set_io_map = hs_set_io_map,
- .set_mem_map = hs_set_mem_map,
-};
-
-static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
- unsigned int ctrl_base)
-{
- unsigned short v;
- int i, err;
-
- memset(sp, 0, sizeof(*sp));
- sp->irq = irq;
- sp->mem_base = mem_base;
- sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
- sp->ctrl_base = ctrl_base;
-
- for (i=0 ; i<MAX_IO_WIN ; i++)
- sp->io_maps[i].map = i;
- for (i=0 ; i<MAX_WIN ; i++)
- sp->mem_maps[i].map = i;
-
- hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
-
- if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
- return err;
- if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
- sp->mem_base = 0;
- return -ENOMEM;
- }
-
-
- /* According to section 3.2 of the PCMCIA standard, low-voltage
- * capable cards must implement cold insertion, i.e. Vpp and
- * Vcc set to 0 before card is inserted.
- */
- /*hs_set_voltages(sp, 0, 0);*/
-
- /* hi-Z the outputs to the card and set 16MB map mode */
- v = hs_in(sp, GCR);
- v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
- hs_out(sp, v, GCR);
-
- v = hs_in(sp, GCR);
- v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
- hs_out(sp, v, GCR);
-
- v = hs_in(sp, GCR);
- v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
- hs_out(sp, v, GCR);
-
- v = hs_in(sp, GCR);
- /* lowest 16MB of Common */
- v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
- hs_out(sp, v, GCR);
-
- hs_reset_socket(sp, 1);
-
- printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
- i, sp->mem_base, sp->irq);
-
- return 0;
-}
-
-static void hs_exit_socket(hs_socket_t *sp)
-{
- unsigned short cscier, gcr;
- unsigned long flags;
-
- local_irq_save(flags);
-
- /* turn off interrupts in hardware */
- cscier = hs_in(sp, CSCIER);
- cscier = (cscier & IER_MASK) | IER_OFF;
- hs_out(sp, cscier, CSCIER);
-
- /* hi-Z the outputs to the card */
- gcr = hs_in(sp, GCR);
- gcr &= HD64465_PCCGCR_PDRV;
- hs_out(sp, gcr, GCR);
-
- /* power the card down */
- hs_set_voltages(sp, 0, 0);
-
- if (sp->mem_base != 0)
- release_mem_region(sp->mem_base, sp->mem_length);
- if (sp->irq != 0) {
- free_irq(sp->irq, hs_interrupt);
- hd64465_unregister_irq_demux(sp->irq);
- }
-
- local_irq_restore(flags);
-}
-
-static struct device_driver hd64465_driver = {
- .name = "hd64465-pcmcia",
- .bus = &platform_bus_type,
- .suspend = pcmcia_socket_dev_suspend,
- .resume = pcmcia_socket_dev_resume,
-};
-
-static struct platform_device hd64465_device = {
- .name = "hd64465-pcmcia",
- .id = 0,
-};
-
-static int __init init_hs(void)
-{
- int i;
- unsigned short v;
-
-/* hd64465_io_debug = 1; */
- if (driver_register(&hd64465_driver))
- return -EINVAL;
-
- /* Wake both sockets out of STANDBY mode */
- /* TODO: wait 15ms */
- v = inw(HD64465_REG_SMSCR);
- v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
- outw(v, HD64465_REG_SMSCR);
-
- /* keep power controller out of shutdown mode */
- v = inb(HD64465_REG_PCC0SCR);
- v |= HD64465_PCCSCR_SHDN;
- outb(v, HD64465_REG_PCC0SCR);
-
- /* use serial (TPS2206) power controller */
- v = inb(HD64465_REG_PCC0CSCR);
- v |= HD64465_PCCCSCR_PSWSEL;
- outb(v, HD64465_REG_PCC0CSCR);
-
- /*
- * Setup hs_sockets[] structures and request system resources.
- * TODO: on memory allocation failure, power down the socket
- * before quitting.
- */
- for (i=0; i<HS_MAX_SOCKETS; i++) {
- hs_set_voltages(&hs_sockets[i], 0, 0);
-
- hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
- hs_sockets[i].socket.resource_ops = &pccard_static_ops;
- hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
- hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
-
- hs_sockets[i].socket.owner = THIS_MODULE;
- hs_sockets[i].socket.ss_entry = &hs_operations;
- }
-
- i = hs_init_socket(&hs_sockets[0],
- HD64465_IRQ_PCMCIA0,
- HD64465_PCC0_BASE,
- HD64465_REG_PCC0ISR);
- if (i < 0) {
- unregister_driver(&hd64465_driver);
- return i;
- }
- i = hs_init_socket(&hs_sockets[1],
- HD64465_IRQ_PCMCIA1,
- HD64465_PCC1_BASE,
- HD64465_REG_PCC1ISR);
- if (i < 0) {
- unregister_driver(&hd64465_driver);
- return i;
- }
-
-/* hd64465_io_debug = 0; */
-
- platform_device_register(&hd64465_device);
-
- for (i=0; i<HS_MAX_SOCKETS; i++) {
- unsigned int ret;
- hs_sockets[i].socket.dev.parent = &hd64465_device.dev;
- hs_sockets[i].number = i;
- ret = pcmcia_register_socket(&hs_sockets[i].socket);
- if (ret && i)
- pcmcia_unregister_socket(&hs_sockets[0].socket);
- }
-
- return 0;
-}
-
-static void __exit exit_hs(void)
-{
- int i;
-
- for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
- pcmcia_unregister_socket(&hs_sockets[i].socket);
- hs_exit_socket(&hs_sockets[i]);
- }
-
- platform_device_unregister(&hd64465_device);
- unregister_driver(&hd64465_driver);
-}
-
-module_init(init_hs);
-module_exit(exit_hs);
-
-/*============================================================*/
-/*END*/
}
#endif
-#if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
- defined(__H8300H__) || defined(__H8300S__)
+#if defined(__H8300H__) || defined(__H8300S__)
static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
{
int ch = (port->mapbase - SMR0) >> 3;
#define sci_init_pins_irda NULL
#endif
-#ifdef SCI_ONLY
-#define sci_init_pins_scif NULL
-#endif
-
-#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
{
return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
}
#endif
-#endif /* SCIF_ONLY || SCI_AND_SCIF */
static inline int sci_txroom(struct uart_port *port)
{
return;
}
-#ifndef SCI_ONLY
if (port->type == PORT_SCIF)
count = scif_txroom(port);
else
-#endif
count = sci_txroom(port);
do {
} else {
ctrl = sci_in(port, SCSCR);
-#if !defined(SCI_ONLY)
if (port->type == PORT_SCIF) {
sci_in(port, SCxSR); /* Dummy read */
sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
}
-#endif
ctrl |= SCI_CTRL_FLAGS_TIE;
sci_out(port, SCSCR, ctrl);
return;
while (1) {
-#if !defined(SCI_ONLY)
if (port->type == PORT_SCIF)
count = scif_rxroom(port);
else
-#endif
count = sci_rxroom(port);
/* Don't copy more bytes than there is room for in the buffer */
static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
{
- unsigned short ssr_status, scr_status;
- struct uart_port *port = ptr;
+ unsigned short ssr_status, scr_status;
+ struct uart_port *port = ptr;
+ irqreturn_t ret = IRQ_NONE;
ssr_status = sci_in(port,SCxSR);
scr_status = sci_in(port,SCSCR);
/* Tx Interrupt */
- if ((ssr_status & 0x0020) && (scr_status & 0x0080))
- sci_tx_interrupt(irq, ptr);
+ if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE))
+ ret = sci_tx_interrupt(irq, ptr);
/* Rx Interrupt */
- if ((ssr_status & 0x0002) && (scr_status & 0x0040))
- sci_rx_interrupt(irq, ptr);
+ if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE))
+ ret = sci_rx_interrupt(irq, ptr);
/* Error Interrupt */
- if ((ssr_status & 0x0080) && (scr_status & 0x0400))
- sci_er_interrupt(irq, ptr);
+ if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE))
+ ret = sci_er_interrupt(irq, ptr);
/* Break Interrupt */
- if ((ssr_status & 0x0010) && (scr_status & 0x0200))
- sci_br_interrupt(irq, ptr);
+ if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE))
+ ret = sci_br_interrupt(irq, ptr);
- return IRQ_HANDLED;
+ return ret;
}
#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK)
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
-#if !defined(SCI_ONLY)
if (port->type == PORT_SCIF)
sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
-#endif
smr_val = sci_in(port, SCSMR) & 3;
if ((termios->c_cflag & CSIZE) == CS7)
# define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */
# define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */
# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_AND_SCIF
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
# define SCIF0 0xA4400000
# define SCIF2 0xA4410000
* SCIF0 (0xA4400000) -> Internal clock, SCK pin as serial clock output
*/
# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721)
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCIF_ONLY
#define SCIF_ORER 0x0200 /* overrun error bit */
#elif defined(CONFIG_SH_RTS7751R2D)
+# define SCSPTR1 0xFFE0001C /* 8 bit SCIF */
# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
# define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \
0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ : \
0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ )
-# define SCI_AND_SCIF
#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
# define SCSPTR0 0xfe600024 /* 16 bit SCIF */
# define SCSPTR1 0xfe610024 /* 16 bit SCIF */
# define SCSPTR2 0xfe620024 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
# define SCSPTR0 0xA4400000 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define PACR 0xa4050100
# define PBCR 0xa4050102
# define SCSCR_INIT(port) 0x3B
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
# define SCSPTR0 0xffe00010 /* 16 bit SCIF */
# define SCSPTR1 0xffe10010 /* 16 bit SCIF */
# define SCSPTR2 0xffe20010 /* 16 bit SCIF */
# define SCSPTR3 0xffe30010 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
# define PADR 0xA4050120
# define PSDR 0xA405013e
# define PSCR 0xA405011E
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
# define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */
# define SCSPTR0 SCPDR0
# define SCSPTR5 0xa4050128
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
# define SCIF_BASE_ADDR 0x01030000
# define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR
# define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */
# define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_H83007) || defined(CONFIG_H83068)
# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_ONLY
# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
#elif defined(CONFIG_H8S2678)
# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_ONLY
# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
# define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
# define SCSPTR0 0xff923020 /* 16 bit SCIF */
# define SCSPTR1 0xff924020 /* 16 bit SCIF */
# define SCSPTR2 0xff925020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x3c /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,cke=2 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
# define SCSPTR1 0xffe10024 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
# define SCSPTR0 0xffea0024 /* 16 bit SCIF */
# define SCSPTR1 0xffeb0024 /* 16 bit SCIF */
# define SCSPTR5 0xffef0024 /* 16 bit SCIF */
# define SCIF_OPER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
defined(CONFIG_CPU_SUBTYPE_SH7206) || \
defined(CONFIG_CPU_SUBTYPE_SH7263)
# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
# define SCSPTR3 0xfffe9820 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
# define SCSPTR0 0xf8400020 /* 16 bit SCIF */
# define SCSPTR1 0xf8410020 /* 16 bit SCIF */
# define SCSPTR2 0xf8420020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
# define SCSPTR0 0xffc30020 /* 16 bit SCIF */
# define SCSPTR1 0xffc40020 /* 16 bit SCIF */
# define SCSPTR3 0xffc60020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-# define SCIF_ONLY
#else
# error CPU subtype not defined
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
defined(CONFIG_CPU_SUBTYPE_SH7091) || \
defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+ defined(CONFIG_CPU_SUBTYPE_SH7722) || \
defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
# define SCIF_TXROOM_MAX 16
#endif
-#if defined(SCI_ONLY)
-# define SCxSR_TEND(port) SCI_TEND
-# define SCxSR_ERRORS(port) SCI_ERRORS
-# define SCxSR_RDxF(port) SCI_RDRF
-# define SCxSR_TDxE(port) SCI_TDRE
-# define SCxSR_ORER(port) SCI_ORER
-# define SCxSR_FER(port) SCI_FER
-# define SCxSR_PER(port) SCI_PER
-# define SCxSR_BRK(port) 0x00
-# define SCxSR_RDxF_CLEAR(port) 0xbc
-# define SCxSR_ERROR_CLEAR(port) 0xc4
-# define SCxSR_TDxE_CLEAR(port) 0x78
-# define SCxSR_BREAK_CLEAR(port) 0xc4
-#elif defined(SCIF_ONLY)
-# define SCxSR_TEND(port) SCIF_TEND
-# define SCxSR_ERRORS(port) SCIF_ERRORS
-# define SCxSR_RDxF(port) SCIF_RDF
-# define SCxSR_TDxE(port) SCIF_TDFE
+#define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
+#define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS)
+#define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF)
+#define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE)
+#define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER)
+#define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
+#define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
+
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
-# define SCxSR_ORER(port) SCIF_ORER
+# define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER)
#else
-# define SCxSR_ORER(port) 0x0000
+# define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000)
#endif
-# define SCxSR_FER(port) SCIF_FER
-# define SCxSR_PER(port) SCIF_PER
-# define SCxSR_BRK(port) SCIF_BRK
+
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721)
-# define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc)
-# define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73)
-# define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf)
-# define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3)
-#else
-/* SH7705 can also use this, clearing is same between 7705 and 7709 */
-# define SCxSR_RDxF_CLEAR(port) 0x00fc
-# define SCxSR_ERROR_CLEAR(port) 0x0073
-# define SCxSR_TDxE_CLEAR(port) 0x00df
-# define SCxSR_BREAK_CLEAR(port) 0x00e3
-#endif
+# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
+# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
+# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
+# define SCxSR_BREAK_CLEAR(port) (sci_in(port, SCxSR) & 0xffe3)
#else
-# define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND)
-# define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS)
-# define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF)
-# define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE)
-# define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000)
-# define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER)
-# define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER)
-# define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK)
# define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc)
# define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073)
# define SCxSR_TDxE_CLEAR(port) (((port)->type == PORT_SCI) ? 0x78 : 0x00df)
defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7750S) || \
- defined(CONFIG_CPU_SUBTYPE_SH7091) || \
- defined(CONFIG_CPU_SUBTYPE_SH4_202)
+ defined(CONFIG_CPU_SUBTYPE_SH7091)
static inline int sci_rxd_in(struct uart_port *port)
{
-#ifndef SCIF_ONLY
if (port->mapbase == 0xffe00000)
return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
-#endif
-#ifndef SCI_ONLY
if (port->mapbase == 0xffe80000)
return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
-#endif
+ return 1;
+}
+#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
+static inline int sci_rxd_in(struct uart_port *port)
+{
+ if (port->mapbase == 0xffe80000)
+ return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
static inline int sci_rxd_in(struct uart_port *port)
{
- return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */
+ return sci_in(port, SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
}
#elif defined(__H8300H__) || defined(__H8300S__)
static inline int sci_rxd_in(struct uart_port *port)
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