MIPS: RB532: GPIO register offsets are relative to GPIOBASE

This patch fixes the wrong use of GPIO register offsets
in devices.c. To avoid further problems, use gpio_get_value
to return the NAND status instead of our own expanded code.

Also define the zero offset of the alternate function register to allow
consistent access.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mach-rc32434/rb.h b/arch/mips/include/asm/mach-rc32434/rb.h
index 79e8ef67d0d397eb38ce223cd27160bec0a8a548..f25a8491670329ec0298e97bb8685bea31a7a02b 100644 (file)
--- a/arch/mips/include/asm/mach-rc32434/rb.h
+++ b/arch/mips/include/asm/mach-rc32434/rb.h
@@ -40,12 +40,14 @@
 #define BTCS           0x010040
 #define BTCOMPARE      0x010044
 #define GPIOBASE       0x050000
-#define GPIOCFG                0x050004
-#define GPIOD          0x050008
-#define GPIOILEVEL     0x05000C
-#define GPIOISTAT      0x050010
-#define GPIONMIEN      0x050014
-#define IMASK6         0x038038
+/* Offsets relative to GPIOBASE */
+#define GPIOFUNC       0x00
+#define GPIOCFG                0x04
+#define GPIOD          0x08
+#define GPIOILEVEL     0x0C
+#define GPIOISTAT      0x10
+#define GPIONMIEN      0x14
+#define IMASK6         0x38
 #define LO_WPX         (1 << 0)
 #define LO_ALE         (1 << 1)
 #define LO_CLE         (1 << 2)

diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 2f22d714d5b09487c5535f49cce0018dcda4d070..c1c29181bd4641de62977a19107a4d5ad64734c0 100644 (file)
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -118,7 +118,7 @@ static struct platform_device cf_slot0 = {
 /* Resources and device for NAND */
 static int rb532_dev_ready(struct mtd_info *mtd)
 {
-       return readl(IDT434_REG_BASE + GPIOD) & GPIO_RDY;
+       return gpio_get_value(GPIO_RDY);
 }
 
 static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)