]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
OMAP:DSP: plat-omap dsp updates for 3430
authorSyed Mohammed, Khasim <x0khasim@ti.com>
Wed, 11 Jul 2007 12:26:48 +0000 (05:26 -0700)
committerTony Lindgren <tony@atomide.com>
Wed, 11 Jul 2007 12:26:48 +0000 (05:26 -0700)
plat-omap dsp updates for 3430

Signed-off-by: Syed Mohammed Khasim <x0khasim@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/dsp/dsp_common.c
arch/arm/plat-omap/dsp/hardware_dsp.h
arch/arm/plat-omap/dsp/omap2_dsp.h

index c5d634df4eb14a49b00d45ceeac854c3e51a9bd9..633592a06d2347645841ec46f0644495ffc24718 100644 (file)
@@ -39,7 +39,8 @@
 
 #if defined(CONFIG_ARCH_OMAP1)
 #define dsp_boot_config(mode)  omap_writew((mode), MPUI_DSP_BOOT_CONFIG)
-#elif defined(CONFIG_ARCH_OMAP2)
+#endif
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 #define dsp_boot_config(mode)  writel((mode), DSP_IPI_DSPBOOTCONFIG)
 #endif
 
@@ -302,6 +303,12 @@ static int omap_dsp_init(void)
                saram_base = OMAP24XX_SARAM_BASE;
                saram_size = OMAP24XX_SARAM_SIZE;
        }
+#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+       /* To be Revisited for 3430 */
+       if (cpu_is_omap34xx()) {
+               return -ENODEV;
+       }
 #endif
        if (dspmem_size == 0) {
                printk(KERN_ERR "omapdsp: unsupported omap architecture.\n");
index a15d9afa737c8c58c3b6d3418bcae701faa535e3..5af46f8b241b2e0fcd03368b516c4f4a9f257c75 100644 (file)
@@ -27,7 +27,7 @@
 #ifdef CONFIG_ARCH_OMAP1
 #include "omap1_dsp.h"
 #endif
-#ifdef CONFIG_ARCH_OMAP2
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3430)
 #include "omap2_dsp.h"
 #endif
 
index 2e908357176132b34f9e900a8ea89ec7fe974aa5..af93be204a4b944c6672b6fae1fee1f3b5a08b1c 100644 (file)
 /*
  * DSP IPI registers: mapped to 0xe1000000 -- use readX(), writeX()
  */
+#ifdef CONFIG_ARCH_OMAP24XX
 #define DSP_IPI_BASE                   DSP_IPI_24XX_VIRT
+#endif
+
+#ifdef CONFIG_ARCH_OMAP34XX
+#define DSP_IPI_BASE                   DSP_IPI_34XX_VIRT
+#endif
+
 #define DSP_IPI_REVISION               (DSP_IPI_BASE + 0x00)
 #define DSP_IPI_SYSCONFIG              (DSP_IPI_BASE + 0x10)
 #define DSP_IPI_INDEX                  (DSP_IPI_BASE + 0x40)