]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/commitdiff
[AVR32] Add nwait and tdf parameters to SMC configuration
authorHans-Christian Egtvedt <hcegtvedt@atmel.com>
Wed, 31 Jan 2007 17:01:45 +0000 (18:01 +0100)
committerHaavard Skinnemoen <hskinnemoen@atmel.com>
Fri, 27 Apr 2007 11:43:27 +0000 (13:43 +0200)
Complete the SMC configuration code by adding nwait and tdf
parameter. After this change, we support the same parameters as the
hardware.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
arch/avr32/mach-at32ap/hsmc.c
include/asm-avr32/arch-at32ap/smc.h

index 7691721928a7fd599f426175f7b003e0876cb5a3..5e22a750632b78755c24d84d05718c24822b587c 100644 (file)
@@ -75,12 +75,35 @@ int smc_set_configuration(int cs, const struct smc_config *config)
                return -EINVAL;
        }
 
+       switch (config->nwait_mode) {
+       case 0:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
+               break;
+       case 1:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
+               break;
+       case 2:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
+               break;
+       case 3:
+               mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       if (config->tdf_cycles) {
+               mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
+       }
+
        if (config->nrd_controlled)
                mode |= HSMC_BIT(READ_MODE);
        if (config->nwe_controlled)
                mode |= HSMC_BIT(WRITE_MODE);
        if (config->byte_write)
                mode |= HSMC_BIT(BAT);
+       if (config->tdf_mode)
+               mode |= HSMC_BIT(TDF_MODE);
 
        pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
                 cs, setup, pulse, cycle, mode);
index 3732b328303d57fecfba2a74511a2f5ca5cc130f..07152b7fd9c94da03f2c3d2fa1af3c9d00464b8c 100644 (file)
@@ -47,11 +47,33 @@ struct smc_config {
         */
        unsigned int    nwe_controlled:1;
 
+       /*
+        * 0: NWAIT is disabled
+        * 1: Reserved
+        * 2: NWAIT is frozen mode
+        * 3: NWAIT in ready mode
+        */
+       unsigned int    nwait_mode:2;
+
        /*
         * 0: Byte select access type
         * 1: Byte write access type
         */
        unsigned int    byte_write:1;
+
+       /*
+        * Number of clock cycles before data is released after
+        * the rising edge of the read controlling signal
+        *
+        * Total cycles from SMC is tdf_cycles + 1
+        */
+       unsigned int    tdf_cycles:4;
+
+       /*
+        * 0: TDF optimization disabled
+        * 1: TDF optimization enabled
+        */
+       unsigned int    tdf_mode:1;
 };
 
 extern int smc_set_configuration(int cs, const struct smc_config *config);