drivers/video/omap/blizzard.c

   1 /*
   2  * Epson Blizzard LCD controller driver
   3  *
   4  * Copyright (C) 2004-2005 Nokia Corporation
   5  * Authors:     Juha Yrjola   <juha.yrjola@nokia.com>
   6  *              Imre Deak     <imre.deak@nokia.com>
   7  * YUV support: Jussi Laako   <jussi.laako@nokia.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the
  11  * Free Software Foundation; either version 2 of the License, or (at your
  12  * option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License along
  20  * with this program; if not, write to the Free Software Foundation, Inc.,
  21  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  */
  23 #include <linux/module.h>
  24 #include <linux/mm.h>
  25 #include <linux/fb.h>
  26 #include <linux/delay.h>
  27 #include <linux/clk.h>
  28
  29 #include <mach/dma.h>
  30 #include <mach/omapfb.h>
  31 #include <mach/blizzard.h>
  32
  33 #include "dispc.h"
  34
  35 #define MODULE_NAME                             "blizzard"
  36
  37 #define BLIZZARD_REV_CODE                       0x00
  38 #define BLIZZARD_CONFIG                         0x02
  39 #define BLIZZARD_PLL_DIV                        0x04
  40 #define BLIZZARD_PLL_LOCK_RANGE                 0x06
  41 #define BLIZZARD_PLL_CLOCK_SYNTH_0              0x08
  42 #define BLIZZARD_PLL_CLOCK_SYNTH_1              0x0a
  43 #define BLIZZARD_PLL_MODE                       0x0c
  44 #define BLIZZARD_CLK_SRC                        0x0e
  45 #define BLIZZARD_MEM_BANK0_ACTIVATE             0x10
  46 #define BLIZZARD_MEM_BANK0_STATUS               0x14
  47 #define BLIZZARD_PANEL_CONFIGURATION            0x28
  48 #define BLIZZARD_HDISP                          0x2a
  49 #define BLIZZARD_HNDP                           0x2c
  50 #define BLIZZARD_VDISP0                         0x2e
  51 #define BLIZZARD_VDISP1                         0x30
  52 #define BLIZZARD_VNDP                           0x32
  53 #define BLIZZARD_HSW                            0x34
  54 #define BLIZZARD_VSW                            0x38
  55 #define BLIZZARD_DISPLAY_MODE                   0x68
  56 #define BLIZZARD_INPUT_WIN_X_START_0            0x6c
  57 #define BLIZZARD_DATA_SOURCE_SELECT             0x8e
  58 #define BLIZZARD_DISP_MEM_DATA_PORT             0x90
  59 #define BLIZZARD_DISP_MEM_READ_ADDR0            0x92
  60 #define BLIZZARD_POWER_SAVE                     0xE6
  61 #define BLIZZARD_NDISP_CTRL_STATUS              0xE8
  62
  63 /* Data source select */
  64 /* For S1D13745 */
  65 #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND       0x00
  66 #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE      0x01
  67 #define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE       0x04
  68 #define BLIZZARD_SRC_DISABLE_OVERLAY            0x05
  69 /* For S1D13744 */
  70 #define BLIZZARD_SRC_WRITE_LCD                  0x00
  71 #define BLIZZARD_SRC_BLT_LCD                    0x06
  72
  73 #define BLIZZARD_COLOR_RGB565                   0x01
  74 #define BLIZZARD_COLOR_YUV420                   0x09
  75
  76 #define BLIZZARD_VERSION_S1D13745               0x01    /* Hailstorm */
  77 #define BLIZZARD_VERSION_S1D13744               0x02    /* Blizzard */
  78
  79 #define BLIZZARD_AUTO_UPDATE_TIME               (HZ / 20)
  80
  81 /* Reserve 4 request slots for requests in irq context */
  82 #define REQ_POOL_SIZE                   24
  83 #define IRQ_REQ_POOL_SIZE               4
  84
  85 #define REQ_FROM_IRQ_POOL 0x01
  86
  87 #define REQ_COMPLETE    0
  88 #define REQ_PENDING     1
  89
  90 struct blizzard_reg_list {
  91         int     start;
  92         int     end;
  93 };
  94
  95 /* These need to be saved / restored separately from the rest. */
  96 static struct blizzard_reg_list blizzard_pll_regs[] = {
  97         {
  98                 .start  = 0x04,         /* Don't save PLL ctrl (0x0C) */
  99                 .end    = 0x0a,
 100         },
 101         {
 102                 .start  = 0x0e,         /* Clock configuration */
 103                 .end    = 0x0e,
 104         },
 105 };
 106
 107 static struct blizzard_reg_list blizzard_gen_regs[] = {
 108         {
 109                 .start  = 0x18,         /* SDRAM control */
 110                 .end    = 0x20,
 111         },
 112         {
 113                 .start  = 0x28,         /* LCD Panel configuration */
 114                 .end    = 0x5a,         /* HSSI interface, TV configuration */
 115         },
 116 };
 117
 118 static u8 blizzard_reg_cache[0x5a / 2];
 119
 120 struct update_param {
 121         int     plane;
 122         int     x, y, width, height;
 123         int     out_x, out_y;
 124         int     out_width, out_height;
 125         int     color_mode;
 126         int     bpp;
 127         int     flags;
 128 };
 129
 130 struct blizzard_request {
 131         struct list_head entry;
 132         unsigned int     flags;
 133
 134         int              (*handler)(struct blizzard_request *req);
 135         void             (*complete)(void *data);
 136         void             *complete_data;
 137
 138         union {
 139                 struct update_param     update;
 140                 struct completion       *sync;
 141         } par;
 142 };
 143
 144 struct plane_info {
 145         unsigned long offset;
 146         int pos_x, pos_y;
 147         int width, height;
 148         int out_width, out_height;
 149         int scr_width;
 150         int color_mode;
 151         int bpp;
 152 };
 153
 154 struct blizzard_struct {
 155         enum omapfb_update_mode update_mode;
 156         enum omapfb_update_mode update_mode_before_suspend;
 157
 158         struct timer_list       auto_update_timer;
 159         int                     stop_auto_update;
 160         struct omapfb_update_window     auto_update_window;
 161         int                     enabled_planes;
 162         int                     vid_nonstd_color;
 163         int                     vid_scaled;
 164         int                     last_color_mode;
 165         int                     zoom_on;
 166         int                     screen_width;
 167         int                     screen_height;
 168         unsigned                te_connected:1;
 169         unsigned                vsync_only:1;
 170
 171         struct plane_info       plane[OMAPFB_PLANE_NUM];
 172
 173         struct blizzard_request req_pool[REQ_POOL_SIZE];
 174         struct list_head        pending_req_list;
 175         struct list_head        free_req_list;
 176         struct semaphore        req_sema;
 177         spinlock_t              req_lock;
 178
 179         unsigned long           sys_ck_rate;
 180         struct extif_timings    reg_timings, lut_timings;
 181
 182         u32                     max_transmit_size;
 183         u32                     extif_clk_period;
 184         int                     extif_clk_div;
 185         unsigned long           pix_tx_time;
 186         unsigned long           line_upd_time;
 187
 188         struct omapfb_device    *fbdev;
 189         struct lcd_ctrl_extif   *extif;
 190         struct lcd_ctrl         *int_ctrl;
 191
 192         void                    (*power_up)(struct device *dev);
 193         void                    (*power_down)(struct device *dev);
 194
 195         int                     version;
 196 } blizzard;
 197
 198 struct lcd_ctrl blizzard_ctrl;
 199
 200 static u8 blizzard_read_reg(u8 reg)
 201 {
 202         u8 data;
 203
 204         blizzard.extif->set_bits_per_cycle(8);
 205         blizzard.extif->write_command(&reg, 1);
 206         blizzard.extif->read_data(&data, 1);
 207
 208         return data;
 209 }
 210
 211 static void blizzard_write_reg(u8 reg, u8 val)
 212 {
 213         blizzard.extif->set_bits_per_cycle(8);
 214         blizzard.extif->write_command(&reg, 1);
 215         blizzard.extif->write_data(&val, 1);
 216 }
 217
 218 static void blizzard_restart_sdram(void)
 219 {
 220         unsigned long tmo;
 221
 222         blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
 223         udelay(50);
 224         blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 1);
 225         tmo = jiffies + msecs_to_jiffies(200);
 226         while (!(blizzard_read_reg(BLIZZARD_MEM_BANK0_STATUS) & 0x01)) {
 227                 if (time_after(jiffies, tmo)) {
 228                         dev_err(blizzard.fbdev->dev,
 229                                         "s1d1374x: SDRAM not ready\n");
 230                         break;
 231                 }
 232                 msleep(1);
 233         }
 234 }
 235
 236 static void blizzard_stop_sdram(void)
 237 {
 238         blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
 239 }
 240
 241 /* Wait until the last window was completely written into the controllers
 242  * SDRAM and we can start transferring the next window.
 243  */
 244 static void blizzard_wait_line_buffer(void)
 245 {
 246         unsigned long tmo = jiffies + msecs_to_jiffies(30);
 247
 248         while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 7)) {
 249                 if (time_after(jiffies, tmo)) {
 250                         if (printk_ratelimit())
 251                                 dev_err(blizzard.fbdev->dev,
 252                                         "s1d1374x: line buffer not ready\n");
 253                         break;
 254                 }
 255         }
 256 }
 257
 258 /* Wait until the YYC color space converter is idle. */
 259 static void blizzard_wait_yyc(void)
 260 {
 261         unsigned long tmo = jiffies + msecs_to_jiffies(30);
 262
 263         while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 4)) {
 264                 if (time_after(jiffies, tmo)) {
 265                         if (printk_ratelimit())
 266                                 dev_err(blizzard.fbdev->dev,
 267                                         "s1d1374x: YYC not ready\n");
 268                         break;
 269                 }
 270         }
 271 }
 272
 273 static void disable_overlay(void)
 274 {
 275         blizzard_write_reg(BLIZZARD_DATA_SOURCE_SELECT,
 276                                 BLIZZARD_SRC_DISABLE_OVERLAY);
 277 }
 278
 279 static void set_window_regs(int x_start, int y_start, int x_end, int y_end,
 280                             int x_out_start, int y_out_start,
 281                             int x_out_end, int y_out_end, int color_mode,
 282                             int zoom_off, int flags)
 283 {
 284         u8 tmp[18];
 285         u8 cmd;
 286
 287         x_end--;
 288         y_end--;
 289         tmp[0] = x_start;
 290         tmp[1] = x_start >> 8;
 291         tmp[2] = y_start;
 292         tmp[3] = y_start >> 8;
 293         tmp[4] = x_end;
 294         tmp[5] = x_end >> 8;
 295         tmp[6] = y_end;
 296         tmp[7] = y_end >> 8;
 297
 298         x_out_end--;
 299         y_out_end--;
 300         tmp[8]  = x_out_start;
 301         tmp[9]  = x_out_start >> 8;
 302         tmp[10] = y_out_start;
 303         tmp[11] = y_out_start >> 8;
 304         tmp[12] = x_out_end;
 305         tmp[13] = x_out_end >> 8;
 306         tmp[14] = y_out_end;
 307         tmp[15] = y_out_end >> 8;
 308
 309         tmp[16] = color_mode;
 310         if (zoom_off && blizzard.version == BLIZZARD_VERSION_S1D13745)
 311                 tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
 312         else if (flags & OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY)
 313                 tmp[17] = BLIZZARD_SRC_WRITE_OVERLAY_ENABLE;
 314         else
 315                 tmp[17] = blizzard.version == BLIZZARD_VERSION_S1D13744 ?
 316                                 BLIZZARD_SRC_WRITE_LCD :
 317                                 BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
 318
 319         blizzard.extif->set_bits_per_cycle(8);
 320         cmd = BLIZZARD_INPUT_WIN_X_START_0;
 321         blizzard.extif->write_command(&cmd, 1);
 322         blizzard.extif->write_data(tmp, 18);
 323 }
 324
 325 static void enable_tearsync(int y, int width, int height, int screen_height,
 326                             int out_height, int force_vsync)
 327 {
 328         u8 b;
 329
 330         b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
 331         b |= 1 << 3;
 332         blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
 333
 334         if (likely(blizzard.vsync_only || force_vsync)) {
 335                 blizzard.extif->enable_tearsync(1, 0);
 336                 return;
 337         }
 338
 339         if (width * blizzard.pix_tx_time < blizzard.line_upd_time) {
 340                 blizzard.extif->enable_tearsync(1, 0);
 341                 return;
 342         }
 343
 344         if ((width * blizzard.pix_tx_time / 1000) * height <
 345             (y + out_height) * (blizzard.line_upd_time / 1000)) {
 346                 blizzard.extif->enable_tearsync(1, 0);
 347                 return;
 348         }
 349
 350         blizzard.extif->enable_tearsync(1, y + 1);
 351 }
 352
 353 static void disable_tearsync(void)
 354 {
 355         u8 b;
 356
 357         blizzard.extif->enable_tearsync(0, 0);
 358         b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
 359         b &= ~(1 << 3);
 360         blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
 361         b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
 362 }
 363
 364 static inline void set_extif_timings(const struct extif_timings *t);
 365
 366 static inline struct blizzard_request *alloc_req(void)
 367 {
 368         unsigned long flags;
 369         struct blizzard_request *req;
 370         int req_flags = 0;
 371
 372         if (!in_interrupt())
 373                 down(&blizzard.req_sema);
 374         else
 375                 req_flags = REQ_FROM_IRQ_POOL;
 376
 377         spin_lock_irqsave(&blizzard.req_lock, flags);
 378         BUG_ON(list_empty(&blizzard.free_req_list));
 379         req = list_entry(blizzard.free_req_list.next,
 380                          struct blizzard_request, entry);
 381         list_del(&req->entry);
 382         spin_unlock_irqrestore(&blizzard.req_lock, flags);
 383
 384         INIT_LIST_HEAD(&req->entry);
 385         req->flags = req_flags;
 386
 387         return req;
 388 }
 389
 390 static inline void free_req(struct blizzard_request *req)
 391 {
 392         unsigned long flags;
 393
 394         spin_lock_irqsave(&blizzard.req_lock, flags);
 395
 396         list_del(&req->entry);
 397         list_add(&req->entry, &blizzard.free_req_list);
 398         if (!(req->flags & REQ_FROM_IRQ_POOL))
 399                 up(&blizzard.req_sema);
 400
 401         spin_unlock_irqrestore(&blizzard.req_lock, flags);
 402 }
 403
 404 static void process_pending_requests(void)
 405 {
 406         unsigned long flags;
 407
 408         spin_lock_irqsave(&blizzard.req_lock, flags);
 409
 410         while (!list_empty(&blizzard.pending_req_list)) {
 411                 struct blizzard_request *req;
 412                 void (*complete)(void *);
 413                 void *complete_data;
 414
 415                 req = list_entry(blizzard.pending_req_list.next,
 416                                  struct blizzard_request, entry);
 417                 spin_unlock_irqrestore(&blizzard.req_lock, flags);
 418
 419                 if (req->handler(req) == REQ_PENDING)
 420                         return;
 421
 422                 complete = req->complete;
 423                 complete_data = req->complete_data;
 424                 free_req(req);
 425
 426                 if (complete)
 427                         complete(complete_data);
 428
 429                 spin_lock_irqsave(&blizzard.req_lock, flags);
 430         }
 431
 432         spin_unlock_irqrestore(&blizzard.req_lock, flags);
 433 }
 434
 435 static void submit_req_list(struct list_head *head)
 436 {
 437         unsigned long flags;
 438         int process = 1;
 439
 440         spin_lock_irqsave(&blizzard.req_lock, flags);
 441         if (likely(!list_empty(&blizzard.pending_req_list)))
 442                 process = 0;
 443         list_splice_init(head, blizzard.pending_req_list.prev);
 444         spin_unlock_irqrestore(&blizzard.req_lock, flags);
 445
 446         if (process)
 447                 process_pending_requests();
 448 }
 449
 450 static void request_complete(void *data)
 451 {
 452         struct blizzard_request *req = (struct blizzard_request *)data;
 453         void                    (*complete)(void *);
 454         void                    *complete_data;
 455
 456         complete = req->complete;
 457         complete_data = req->complete_data;
 458
 459         free_req(req);
 460
 461         if (complete)
 462                 complete(complete_data);
 463
 464         process_pending_requests();
 465 }
 466
 467
 468 static int do_full_screen_update(struct blizzard_request *req)
 469 {
 470         int i;
 471         int flags;
 472
 473         for (i = 0; i < 3; i++) {
 474                 struct plane_info *p = &blizzard.plane[i];
 475                 if (!(blizzard.enabled_planes & (1 << i))) {
 476                         blizzard.int_ctrl->enable_plane(i, 0);
 477                         continue;
 478                 }
 479                 dev_dbg(blizzard.fbdev->dev, "pw %d ph %d\n",
 480                         p->width, p->height);
 481                 blizzard.int_ctrl->setup_plane(i,
 482                                 OMAPFB_CHANNEL_OUT_LCD, p->offset,
 483                                 p->scr_width, p->pos_x, p->pos_y,
 484                                 p->width, p->height,
 485                                 p->color_mode);
 486                 blizzard.int_ctrl->enable_plane(i, 1);
 487         }
 488
 489         dev_dbg(blizzard.fbdev->dev, "sw %d sh %d\n",
 490                 blizzard.screen_width, blizzard.screen_height);
 491         blizzard_wait_line_buffer();
 492         flags = req->par.update.flags;
 493         if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
 494                 enable_tearsync(0, blizzard.screen_width,
 495                                 blizzard.screen_height,
 496                                 blizzard.screen_height,
 497                                 blizzard.screen_height,
 498                                 flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
 499         else
 500                 disable_tearsync();
 501
 502         set_window_regs(0, 0, blizzard.screen_width, blizzard.screen_height,
 503                         0, 0, blizzard.screen_width, blizzard.screen_height,
 504                         BLIZZARD_COLOR_RGB565, blizzard.zoom_on, flags);
 505         blizzard.zoom_on = 0;
 506
 507         blizzard.extif->set_bits_per_cycle(16);
 508         /* set_window_regs has left the register index at the right
 509          * place, so no need to set it here.
 510          */
 511         blizzard.extif->transfer_area(blizzard.screen_width,
 512                                       blizzard.screen_height,
 513                                       request_complete, req);
 514         return REQ_PENDING;
 515 }
 516
 517 /* Setup all planes with an overlapping area with the update window. */
 518 static int do_partial_update(struct blizzard_request *req, int plane,
 519                              int x, int y, int w, int h,
 520                              int x_out, int y_out, int w_out, int h_out,
 521                              int wnd_color_mode, int bpp)
 522 {
 523         int i;
 524         int gx1, gy1, gx2, gy2;
 525         int gx1_out, gy1_out, gx2_out, gy2_out;
 526         int color_mode;
 527         int flags;
 528         int zoom_off;
 529
 530         /* Global coordinates, relative to pixel 0,0 of the LCD */
 531         gx1 = x + blizzard.plane[plane].pos_x;
 532         gy1 = y + blizzard.plane[plane].pos_y;
 533         gx2 = gx1 + w;
 534         gy2 = gy1 + h;
 535
 536         flags = req->par.update.flags;
 537         if (flags & OMAPFB_FORMAT_FLAG_DOUBLE) {
 538                 gx1_out = gx1;
 539                 gy1_out = gy1;
 540                 gx2_out = gx1 + w * 2;
 541                 gy2_out = gy1 + h * 2;
 542         } else {
 543                 gx1_out = x_out + blizzard.plane[plane].pos_x;
 544                 gy1_out = y_out + blizzard.plane[plane].pos_y;
 545                 gx2_out = gx1_out + w_out;
 546                 gy2_out = gy1_out + h_out;
 547         }
 548         zoom_off = blizzard.zoom_on && gx1 == 0 && gy1 == 0 &&
 549                 w == blizzard.screen_width && h == blizzard.screen_height;
 550         blizzard.zoom_on = (!zoom_off && blizzard.zoom_on) ||
 551                            (w < w_out || h < h_out);
 552
 553         for (i = 0; i < OMAPFB_PLANE_NUM; i++) {
 554                 struct plane_info *p = &blizzard.plane[i];
 555                 int px1, py1;
 556                 int px2, py2;
 557                 int pw, ph;
 558                 int pposx, pposy;
 559                 unsigned long offset;
 560
 561                 if (!(blizzard.enabled_planes & (1 << i))  ||
 562                     (wnd_color_mode && i != plane)) {
 563                         blizzard.int_ctrl->enable_plane(i, 0);
 564                         continue;
 565                 }
 566                 /* Plane coordinates */
 567                 if (i == plane) {
 568                         /* Plane in which we are doing the update.
 569                          * Local coordinates are the one in the update
 570                          * request.
 571                          */
 572                         px1 = x;
 573                         py1 = y;
 574                         px2 = x + w;
 575                         py2 = y + h;
 576                         pposx = 0;
 577                         pposy = 0;
 578                 } else {
 579                         /* Check if this plane has an overlapping part */
 580                         px1 = gx1 - p->pos_x;
 581                         py1 = gy1 - p->pos_y;
 582                         px2 = gx2 - p->pos_x;
 583                         py2 = gy2 - p->pos_y;
 584                         if (px1 >= p->width || py1 >= p->height ||
 585                             px2 <= 0 || py2 <= 0) {
 586                                 blizzard.int_ctrl->enable_plane(i, 0);
 587                                 continue;
 588                         }
 589                         /* Calculate the coordinates for the overlapping
 590                          * part in the plane's local coordinates.
 591                          */
 592                         pposx = -px1;
 593                         pposy = -py1;
 594                         if (px1 < 0)
 595                                 px1 = 0;
 596                         if (py1 < 0)
 597                                 py1 = 0;
 598                         if (px2 > p->width)
 599                                 px2 = p->width;
 600                         if (py2 > p->height)
 601                                 py2 = p->height;
 602                         if (pposx < 0)
 603                                 pposx = 0;
 604                         if (pposy < 0)
 605                                 pposy = 0;
 606                 }
 607                 pw = px2 - px1;
 608                 ph = py2 - py1;
 609                 offset = p->offset + (p->scr_width * py1 + px1) * p->bpp / 8;
 610                 if (wnd_color_mode)
 611                         /* Window embedded in the plane with a differing
 612                          * color mode / bpp. Calculate the number of DMA
 613                          * transfer elements in terms of the plane's bpp.
 614                          */
 615                         pw = (pw + 1) * bpp / p->bpp;
 616 #ifdef VERBOSE
 617                 dev_dbg(blizzard.fbdev->dev,
 618                         "plane %d offset %#08lx pposx %d pposy %d "
 619                         "px1 %d py1 %d pw %d ph %d\n",
 620                         i, offset, pposx, pposy, px1, py1, pw, ph);
 621 #endif
 622                 blizzard.int_ctrl->setup_plane(i,
 623                                 OMAPFB_CHANNEL_OUT_LCD, offset,
 624                                 p->scr_width,
 625                                 pposx, pposy, pw, ph,
 626                                 p->color_mode);
 627
 628                 blizzard.int_ctrl->enable_plane(i, 1);
 629         }
 630
 631         switch (wnd_color_mode) {
 632         case OMAPFB_COLOR_YUV420:
 633                 color_mode = BLIZZARD_COLOR_YUV420;
 634                 /* Currently only the 16 bits/pixel cycle format is
 635                  * supported on the external interface. Adjust the number
 636                  * of transfer elements per line for 12bpp format.
 637                  */
 638                 w = (w + 1) * 3 / 4;
 639                 break;
 640         default:
 641                 color_mode = BLIZZARD_COLOR_RGB565;
 642                 break;
 643         }
 644
 645         blizzard_wait_line_buffer();
 646         if (blizzard.last_color_mode == BLIZZARD_COLOR_YUV420)
 647                 blizzard_wait_yyc();
 648         blizzard.last_color_mode = color_mode;
 649         if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
 650                 enable_tearsync(gy1, w, h,
 651                                 blizzard.screen_height,
 652                                 h_out,
 653                                 flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
 654         else
 655                 disable_tearsync();
 656
 657         set_window_regs(gx1, gy1, gx2, gy2, gx1_out, gy1_out, gx2_out, gy2_out,
 658                         color_mode, zoom_off, flags);
 659
 660         blizzard.extif->set_bits_per_cycle(16);
 661         /* set_window_regs has left the register index at the right
 662          * place, so no need to set it here.
 663          */
 664         blizzard.extif->transfer_area(w, h, request_complete, req);
 665
 666         return REQ_PENDING;
 667 }
 668
 669 static int send_frame_handler(struct blizzard_request *req)
 670 {
 671         struct update_param *par = &req->par.update;
 672         int plane = par->plane;
 673
 674 #ifdef VERBOSE
 675         dev_dbg(blizzard.fbdev->dev,
 676                 "send_frame: x %d y %d w %d h %d "
 677                 "x_out %d y_out %d w_out %d h_out %d "
 678                 "color_mode %04x flags %04x planes %01x\n",
 679                 par->x, par->y, par->width, par->height,
 680                 par->out_x, par->out_y, par->out_width, par->out_height,
 681                 par->color_mode, par->flags, blizzard.enabled_planes);
 682 #endif
 683         if (par->flags & OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY)
 684                 disable_overlay();
 685
 686         if ((blizzard.enabled_planes & blizzard.vid_nonstd_color) ||
 687              (blizzard.enabled_planes & blizzard.vid_scaled))
 688                 return do_full_screen_update(req);
 689
 690         return do_partial_update(req, plane, par->x, par->y,
 691                                  par->width, par->height,
 692                                  par->out_x, par->out_y,
 693                                  par->out_width, par->out_height,
 694                                  par->color_mode, par->bpp);
 695 }
 696
 697 static void send_frame_complete(void *data)
 698 {
 699 }
 700
 701 #define ADD_PREQ(_x, _y, _w, _h, _x_out, _y_out, _w_out, _h_out) do {   \
 702         req = alloc_req();                      \
 703         req->handler    = send_frame_handler;   \
 704         req->complete   = send_frame_complete;  \
 705         req->par.update.plane = plane_idx;      \
 706         req->par.update.x = _x;                 \
 707         req->par.update.y = _y;                 \
 708         req->par.update.width  = _w;            \
 709         req->par.update.height = _h;            \
 710         req->par.update.out_x = _x_out;         \
 711         req->par.update.out_y = _y_out;         \
 712         req->par.update.out_width = _w_out;     \
 713         req->par.update.out_height = _h_out;    \
 714         req->par.update.bpp = bpp;              \
 715         req->par.update.color_mode = color_mode;\
 716         req->par.update.flags     = flags;      \
 717         list_add_tail(&req->entry, req_head);   \
 718 } while(0)
 719
 720 static void create_req_list(int plane_idx,
 721                             struct omapfb_update_window *win,
 722                             struct list_head *req_head)
 723 {
 724         struct blizzard_request *req;
 725         int x = win->x;
 726         int y = win->y;
 727         int width = win->width;
 728         int height = win->height;
 729         int x_out = win->out_x;
 730         int y_out = win->out_y;
 731         int width_out = win->out_width;
 732         int height_out = win->out_height;
 733         int color_mode;
 734         int bpp;
 735         int flags;
 736         unsigned int ystart = y;
 737         unsigned int yspan = height;
 738         unsigned int ystart_out = y_out;
 739         unsigned int yspan_out = height_out;
 740
 741         flags = win->format & ~OMAPFB_FORMAT_MASK;
 742         color_mode = win->format & OMAPFB_FORMAT_MASK;
 743         switch (color_mode) {
 744         case OMAPFB_COLOR_YUV420:
 745                 /* Embedded window with different color mode */
 746                 bpp = 12;
 747                 /* X, Y, height must be aligned at 2, width at 4 pixels */
 748                 x &= ~1;
 749                 y &= ~1;
 750                 height = yspan = height & ~1;
 751                 width = width & ~3;
 752                 break;
 753         default:
 754                 /* Same as the plane color mode */
 755                 bpp = blizzard.plane[plane_idx].bpp;
 756                 break;
 757         }
 758         if (width * height * bpp / 8 > blizzard.max_transmit_size) {
 759                 yspan = blizzard.max_transmit_size / (width * bpp / 8);
 760                 yspan_out = yspan * height_out / height;
 761                 ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
 762                          width_out, yspan_out);
 763                 ystart += yspan;
 764                 ystart_out += yspan_out;
 765                 yspan = height - yspan;
 766                 yspan_out = height_out - yspan_out;
 767                 flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
 768         }
 769
 770         ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
 771                  width_out, yspan_out);
 772 }
 773
 774 static void auto_update_complete(void *data)
 775 {
 776         if (!blizzard.stop_auto_update)
 777                 mod_timer(&blizzard.auto_update_timer,
 778                           jiffies + BLIZZARD_AUTO_UPDATE_TIME);
 779 }
 780
 781 static void blizzard_update_window_auto(unsigned long arg)
 782 {
 783         LIST_HEAD(req_list);
 784         struct blizzard_request *last;
 785         struct omapfb_plane_struct *plane;
 786
 787         plane = blizzard.fbdev->fb_info[0]->par;
 788         create_req_list(plane->idx,
 789                         &blizzard.auto_update_window, &req_list);
 790         last = list_entry(req_list.prev, struct blizzard_request, entry);
 791
 792         last->complete = auto_update_complete;
 793         last->complete_data = NULL;
 794
 795         submit_req_list(&req_list);
 796 }
 797
 798 int blizzard_update_window_async(struct fb_info *fbi,
 799                                  struct omapfb_update_window *win,
 800                                  void (*complete_callback)(void *arg),
 801                                  void *complete_callback_data)
 802 {
 803         LIST_HEAD(req_list);
 804         struct blizzard_request *last;
 805         struct omapfb_plane_struct *plane = fbi->par;
 806
 807         if (unlikely(blizzard.update_mode != OMAPFB_MANUAL_UPDATE))
 808                 return -EINVAL;
 809         if (unlikely(!blizzard.te_connected &&
 810                      (win->format & OMAPFB_FORMAT_FLAG_TEARSYNC)))
 811                 return -EINVAL;
 812
 813         create_req_list(plane->idx, win, &req_list);
 814         last = list_entry(req_list.prev, struct blizzard_request, entry);
 815
 816         last->complete = complete_callback;
 817         last->complete_data = (void *)complete_callback_data;
 818
 819         submit_req_list(&req_list);
 820
 821         return 0;
 822 }
 823 EXPORT_SYMBOL(blizzard_update_window_async);
 824
 825 static int update_full_screen(void)
 826 {
 827         return blizzard_update_window_async(blizzard.fbdev->fb_info[0],
 828                                      &blizzard.auto_update_window, NULL, NULL);
 829
 830 }
 831
 832 static int blizzard_setup_plane(int plane, int channel_out,
 833                                   unsigned long offset, int screen_width,
 834                                   int pos_x, int pos_y, int width, int height,
 835                                   int color_mode)
 836 {
 837         struct plane_info *p;
 838
 839 #ifdef VERBOSE
 840         dev_dbg(blizzard.fbdev->dev,
 841                     "plane %d ch_out %d offset %#08lx scr_width %d "
 842                     "pos_x %d pos_y %d width %d height %d color_mode %d\n",
 843                     plane, channel_out, offset, screen_width,
 844                     pos_x, pos_y, width, height, color_mode);
 845 #endif
 846         if ((unsigned)plane > OMAPFB_PLANE_NUM)
 847                 return -EINVAL;
 848         p = &blizzard.plane[plane];
 849
 850         switch (color_mode) {
 851         case OMAPFB_COLOR_YUV422:
 852         case OMAPFB_COLOR_YUY422:
 853                 p->bpp = 16;
 854                 blizzard.vid_nonstd_color &= ~(1 << plane);
 855                 break;
 856         case OMAPFB_COLOR_YUV420:
 857                 p->bpp = 12;
 858                 blizzard.vid_nonstd_color |= 1 << plane;
 859                 break;
 860         case OMAPFB_COLOR_RGB565:
 861                 p->bpp = 16;
 862                 blizzard.vid_nonstd_color &= ~(1 << plane);
 863                 break;
 864         default:
 865                 return -EINVAL;
 866         }
 867
 868         p->offset = offset;
 869         p->pos_x = pos_x;
 870         p->pos_y = pos_y;
 871         p->width = width;
 872         p->height = height;
 873         p->scr_width = screen_width;
 874         if (!p->out_width)
 875                 p->out_width = width;
 876         if (!p->out_height)
 877                 p->out_height = height;
 878
 879         p->color_mode = color_mode;
 880
 881         return 0;
 882 }
 883
 884 static int blizzard_set_scale(int plane, int orig_w, int orig_h,
 885                               int out_w, int out_h)
 886 {
 887         struct plane_info *p = &blizzard.plane[plane];
 888         int r;
 889
 890         dev_dbg(blizzard.fbdev->dev,
 891                 "plane %d orig_w %d orig_h %d out_w %d out_h %d\n",
 892                 plane, orig_w, orig_h, out_w, out_h);
 893         if ((unsigned)plane > OMAPFB_PLANE_NUM)
 894                 return -ENODEV;
 895
 896         r = blizzard.int_ctrl->set_scale(plane, orig_w, orig_h, out_w, out_h);
 897         if (r < 0)
 898                 return r;
 899
 900         p->width = orig_w;
 901         p->height = orig_h;
 902         p->out_width = out_w;
 903         p->out_height = out_h;
 904         if (orig_w == out_w && orig_h == out_h)
 905                 blizzard.vid_scaled &= ~(1 << plane);
 906         else
 907                 blizzard.vid_scaled |= 1 << plane;
 908
 909         return 0;
 910 }
 911
 912 static int blizzard_set_rotate(int angle)
 913 {
 914         u32 l;
 915
 916         l = blizzard_read_reg(BLIZZARD_PANEL_CONFIGURATION);
 917         l &= ~0x03;
 918
 919         switch (angle) {
 920         case 0:
 921                 l = l | 0x00;
 922                 break;
 923         case 90:
 924                 l = l | 0x03;
 925                 break;
 926         case 180:
 927                 l = l | 0x02;
 928                 break;
 929         case 270:
 930                 l = l | 0x01;
 931                 break;
 932         default:
 933                 return -EINVAL;
 934         }
 935
 936         blizzard_write_reg(BLIZZARD_PANEL_CONFIGURATION, l);
 937
 938         return 0;
 939 }
 940
 941 static int blizzard_enable_plane(int plane, int enable)
 942 {
 943         if (enable)
 944                 blizzard.enabled_planes |= 1 << plane;
 945         else
 946                 blizzard.enabled_planes &= ~(1 << plane);
 947
 948         return 0;
 949 }
 950
 951 static int sync_handler(struct blizzard_request *req)
 952 {
 953         complete(req->par.sync);
 954         return REQ_COMPLETE;
 955 }
 956
 957 static void blizzard_sync(void)
 958 {
 959         LIST_HEAD(req_list);
 960         struct blizzard_request *req;
 961         struct completion comp;
 962
 963         req = alloc_req();
 964
 965         req->handler = sync_handler;
 966         req->complete = NULL;
 967         init_completion(&comp);
 968         req->par.sync = &comp;
 969
 970         list_add(&req->entry, &req_list);
 971         submit_req_list(&req_list);
 972
 973         wait_for_completion(&comp);
 974 }
 975
 976
 977 static void blizzard_bind_client(struct omapfb_notifier_block *nb)
 978 {
 979         if (blizzard.update_mode == OMAPFB_MANUAL_UPDATE) {
 980                 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
 981         }
 982 }
 983
 984 static int blizzard_set_update_mode(enum omapfb_update_mode mode)
 985 {
 986         if (unlikely(mode != OMAPFB_MANUAL_UPDATE &&
 987                      mode != OMAPFB_AUTO_UPDATE &&
 988                      mode != OMAPFB_UPDATE_DISABLED))
 989                 return -EINVAL;
 990
 991         if (mode == blizzard.update_mode)
 992                 return 0;
 993
 994         dev_info(blizzard.fbdev->dev, "s1d1374x: setting update mode to %s\n",
 995                         mode == OMAPFB_UPDATE_DISABLED ? "disabled" :
 996                         (mode == OMAPFB_AUTO_UPDATE ? "auto" : "manual"));
 997
 998         switch (blizzard.update_mode) {
 999         case OMAPFB_MANUAL_UPDATE:
1000                 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_DISABLED);
1001                 break;
1002         case OMAPFB_AUTO_UPDATE:
1003                 blizzard.stop_auto_update = 1;
1004                 del_timer_sync(&blizzard.auto_update_timer);
1005                 break;
1006         case OMAPFB_UPDATE_DISABLED:
1007                 break;
1008         }
1009
1010         blizzard.update_mode = mode;
1011         blizzard_sync();
1012         blizzard.stop_auto_update = 0;
1013
1014         switch (mode) {
1015         case OMAPFB_MANUAL_UPDATE:
1016                 omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
1017                 break;
1018         case OMAPFB_AUTO_UPDATE:
1019                 blizzard_update_window_auto(0);
1020                 break;
1021         case OMAPFB_UPDATE_DISABLED:
1022                 break;
1023         }
1024
1025         return 0;
1026 }
1027
1028 static enum omapfb_update_mode blizzard_get_update_mode(void)
1029 {
1030         return blizzard.update_mode;
1031 }
1032
1033 static inline void set_extif_timings(const struct extif_timings *t)
1034 {
1035         blizzard.extif->set_timings(t);
1036 }
1037
1038 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
1039 {
1040         int bus_tick = blizzard.extif_clk_period * div;
1041         return (ps + bus_tick - 1) / bus_tick * bus_tick;
1042 }
1043
1044 static int calc_reg_timing(unsigned long sysclk, int div)
1045 {
1046         struct extif_timings *t;
1047         unsigned long systim;
1048
1049         /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
1050          * AccessTime 2 ns + 12.2 ns (regs),
1051          * WEOffTime = WEOnTime + 1 ns,
1052          * REOffTime = REOnTime + 12 ns (regs),
1053          * CSOffTime = REOffTime + 1 ns
1054          * ReadCycle = 2ns + 2*SYSCLK  (regs),
1055          * WriteCycle = 2*SYSCLK + 2 ns,
1056          * CSPulseWidth = 10 ns */
1057
1058         systim = 1000000000 / (sysclk / 1000);
1059         dev_dbg(blizzard.fbdev->dev,
1060                   "Blizzard systim %lu ps extif_clk_period %u div %d\n",
1061                   systim, blizzard.extif_clk_period, div);
1062
1063         t = &blizzard.reg_timings;
1064         memset(t, 0, sizeof(*t));
1065
1066         t->clk_div = div;
1067
1068         t->cs_on_time = 0;
1069         t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1070         t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1071         t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div);
1072         t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
1073         t->re_off_time = round_to_extif_ticks(t->re_on_time + 13000, div);
1074         t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
1075         t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
1076         if (t->we_cycle_time < t->we_off_time)
1077                 t->we_cycle_time = t->we_off_time;
1078         t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
1079         if (t->re_cycle_time < t->re_off_time)
1080                 t->re_cycle_time = t->re_off_time;
1081         t->cs_pulse_width = 0;
1082
1083         dev_dbg(blizzard.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
1084                  t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
1085         dev_dbg(blizzard.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
1086                  t->we_on_time, t->we_off_time, t->re_cycle_time,
1087                  t->we_cycle_time);
1088         dev_dbg(blizzard.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
1089                  t->access_time, t->cs_pulse_width);
1090
1091         return blizzard.extif->convert_timings(t);
1092 }
1093
1094 static int calc_lut_timing(unsigned long sysclk, int div)
1095 {
1096         struct extif_timings *t;
1097         unsigned long systim;
1098
1099         /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
1100          * AccessTime 2 ns + 4 * SYSCLK + 26 (lut),
1101          * WEOffTime = WEOnTime + 1 ns,
1102          * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut),
1103          * CSOffTime = REOffTime + 1 ns
1104          * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut),
1105          * WriteCycle = 2*SYSCLK + 2 ns,
1106          * CSPulseWidth = 10 ns */
1107
1108         systim = 1000000000 / (sysclk / 1000);
1109         dev_dbg(blizzard.fbdev->dev,
1110                 "Blizzard systim %lu ps extif_clk_period %u div %d\n",
1111                 systim, blizzard.extif_clk_period, div);
1112
1113         t = &blizzard.lut_timings;
1114         memset(t, 0, sizeof(*t));
1115
1116         t->clk_div = div;
1117
1118         t->cs_on_time = 0;
1119         t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1120         t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
1121         t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
1122                                               26000, div);
1123         t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
1124         t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
1125                                               26000, div);
1126         t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
1127         t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
1128         if (t->we_cycle_time < t->we_off_time)
1129                 t->we_cycle_time = t->we_off_time;
1130         t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div);
1131         if (t->re_cycle_time < t->re_off_time)
1132                 t->re_cycle_time = t->re_off_time;
1133         t->cs_pulse_width = 0;
1134
1135         dev_dbg(blizzard.fbdev->dev,
1136                  "[lut]cson %d csoff %d reon %d reoff %d\n",
1137                  t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
1138         dev_dbg(blizzard.fbdev->dev,
1139                  "[lut]weon %d weoff %d recyc %d wecyc %d\n",
1140                  t->we_on_time, t->we_off_time, t->re_cycle_time,
1141                  t->we_cycle_time);
1142         dev_dbg(blizzard.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
1143                  t->access_time, t->cs_pulse_width);
1144
1145         return blizzard.extif->convert_timings(t);
1146 }
1147
1148 static int calc_extif_timings(unsigned long sysclk, int *extif_mem_div)
1149 {
1150         int max_clk_div;
1151         int div;
1152
1153         blizzard.extif->get_clk_info(&blizzard.extif_clk_period, &max_clk_div);
1154         for (div = 1; div <= max_clk_div; div++) {
1155                 if (calc_reg_timing(sysclk, div) == 0)
1156                         break;
1157         }
1158         if (div > max_clk_div) {
1159                 dev_dbg(blizzard.fbdev->dev, "reg timing failed\n");
1160                 goto err;
1161         }
1162         *extif_mem_div = div;
1163
1164         for (div = 1; div <= max_clk_div; div++) {
1165                 if (calc_lut_timing(sysclk, div) == 0)
1166                         break;
1167         }
1168
1169         if (div > max_clk_div)
1170                 goto err;
1171
1172         blizzard.extif_clk_div = div;
1173
1174         return 0;
1175 err:
1176         dev_err(blizzard.fbdev->dev, "can't setup timings\n");
1177         return -1;
1178 }
1179
1180 static void calc_blizzard_clk_rates(unsigned long ext_clk,
1181                                 unsigned long *sys_clk, unsigned long *pix_clk)
1182 {
1183         int pix_clk_src;
1184         int sys_div = 0, sys_mul = 0;
1185         int pix_div;
1186
1187         pix_clk_src = blizzard_read_reg(BLIZZARD_CLK_SRC);
1188         pix_div = ((pix_clk_src >> 3) & 0x1f) + 1;
1189         if ((pix_clk_src & (0x3 << 1)) == 0) {
1190                 /* Source is the PLL */
1191                 sys_div = (blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x3f) + 1;
1192                 sys_mul = blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_0);
1193                 sys_mul |= ((blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_1)
1194                                 & 0x0f) << 11);
1195                 *sys_clk = ext_clk * sys_mul / sys_div;
1196         } else  /* else source is ext clk, or oscillator */
1197                 *sys_clk = ext_clk;
1198
1199         *pix_clk = *sys_clk / pix_div;                  /* HZ */
1200         dev_dbg(blizzard.fbdev->dev,
1201                 "ext_clk %ld pix_src %d pix_div %d sys_div %d sys_mul %d\n",
1202                 ext_clk, pix_clk_src & (0x3 << 1), pix_div, sys_div, sys_mul);
1203         dev_dbg(blizzard.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
1204                 *sys_clk, *pix_clk);
1205 }
1206
1207 static int setup_tearsync(unsigned long pix_clk, int extif_div)
1208 {
1209         int hdisp, vdisp;
1210         int hndp, vndp;
1211         int hsw, vsw;
1212         int hs, vs;
1213         int hs_pol_inv, vs_pol_inv;
1214         int use_hsvs, use_ndp;
1215         u8  b;
1216
1217         hsw = blizzard_read_reg(BLIZZARD_HSW);
1218         vsw = blizzard_read_reg(BLIZZARD_VSW);
1219         hs_pol_inv = !(hsw & 0x80);
1220         vs_pol_inv = !(vsw & 0x80);
1221         hsw = hsw & 0x7f;
1222         vsw = vsw & 0x3f;
1223
1224         hdisp = blizzard_read_reg(BLIZZARD_HDISP) * 8;
1225         vdisp = blizzard_read_reg(BLIZZARD_VDISP0) +
1226                 ((blizzard_read_reg(BLIZZARD_VDISP1) & 0x3) << 8);
1227
1228         hndp = blizzard_read_reg(BLIZZARD_HNDP) & 0x3f;
1229         vndp = blizzard_read_reg(BLIZZARD_VNDP);
1230
1231         /* time to transfer one pixel (16bpp) in ps */
1232         blizzard.pix_tx_time = blizzard.reg_timings.we_cycle_time;
1233         if (blizzard.extif->get_max_tx_rate != NULL) {
1234                 /* The external interface might have a rate limitation,
1235                  * if so, we have to maximize our transfer rate.
1236                  */
1237                 unsigned long min_tx_time;
1238                 unsigned long max_tx_rate = blizzard.extif->get_max_tx_rate();
1239
1240                 dev_dbg(blizzard.fbdev->dev, "max_tx_rate %ld HZ\n",
1241                         max_tx_rate);
1242                 min_tx_time = 1000000000 / (max_tx_rate / 1000);  /* ps */
1243                 if (blizzard.pix_tx_time < min_tx_time)
1244                         blizzard.pix_tx_time = min_tx_time;
1245         }
1246
1247         /* time to update one line in ps */
1248         blizzard.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
1249         blizzard.line_upd_time *= 1000;
1250         if (hdisp * blizzard.pix_tx_time > blizzard.line_upd_time)
1251                 /* transfer speed too low, we might have to use both
1252                  * HS and VS */
1253                 use_hsvs = 1;
1254         else
1255                 /* decent transfer speed, we'll always use only VS */
1256                 use_hsvs = 0;
1257
1258         if (use_hsvs && (hs_pol_inv || vs_pol_inv)) {
1259                 /* HS or'ed with VS doesn't work, use the active high
1260                  * TE signal based on HNDP / VNDP */
1261                 use_ndp = 1;
1262                 hs_pol_inv = 0;
1263                 vs_pol_inv = 0;
1264                 hs = hndp;
1265                 vs = vndp;
1266         } else {
1267                 /* Use HS or'ed with VS as a TE signal if both are needed
1268                  * or VNDP if only vsync is needed. */
1269                 use_ndp = 0;
1270                 hs = hsw;
1271                 vs = vsw;
1272                 if (!use_hsvs) {
1273                         hs_pol_inv = 0;
1274                         vs_pol_inv = 0;
1275                 }
1276         }
1277
1278         hs = hs * 1000000 / (pix_clk / 1000);             /* ps */
1279         hs *= 1000;
1280
1281         vs = vs * (hdisp + hndp) * 1000000 / (pix_clk / 1000); /* ps */
1282         vs *= 1000;
1283
1284         if (vs <= hs)
1285                 return -EDOM;
1286         /* set VS to 120% of HS to minimize VS detection time */
1287         vs = hs * 12 / 10;
1288         /* minimize HS too */
1289         if (hs > 10000)
1290                 hs = 10000;
1291
1292         b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
1293         b &= ~0x3;
1294         b |= use_hsvs ? 1 : 0;
1295         b |= (use_ndp && use_hsvs) ? 0 : 2;
1296         blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
1297
1298         blizzard.vsync_only = !use_hsvs;
1299
1300         dev_dbg(blizzard.fbdev->dev,
1301                 "pix_clk %ld HZ pix_tx_time %ld ps line_upd_time %ld ps\n",
1302                 pix_clk, blizzard.pix_tx_time, blizzard.line_upd_time);
1303         dev_dbg(blizzard.fbdev->dev,
1304                 "hs %d ps vs %d ps mode %d vsync_only %d\n",
1305                 hs, vs, b & 0x3, !use_hsvs);
1306
1307         return blizzard.extif->setup_tearsync(1, hs, vs,
1308                                               hs_pol_inv, vs_pol_inv,
1309                                               extif_div);
1310 }
1311
1312 static void blizzard_get_caps(int plane, struct omapfb_caps *caps)
1313 {
1314         blizzard.int_ctrl->get_caps(plane, caps);
1315         caps->ctrl |= OMAPFB_CAPS_MANUAL_UPDATE |
1316                 OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE |
1317                 OMAPFB_CAPS_WINDOW_SCALE |
1318                 OMAPFB_CAPS_WINDOW_OVERLAY |
1319                 OMAPFB_CAPS_WINDOW_ROTATE;
1320         if (blizzard.te_connected)
1321                 caps->ctrl |= OMAPFB_CAPS_TEARSYNC;
1322         caps->wnd_color |= (1 << OMAPFB_COLOR_RGB565) |
1323                            (1 << OMAPFB_COLOR_YUV420);
1324 }
1325
1326 static void _save_regs(struct blizzard_reg_list *list, int cnt)
1327 {
1328         int i;
1329
1330         for (i = 0; i < cnt; i++, list++) {
1331                 int reg;
1332                 for (reg = list->start; reg <= list->end; reg += 2)
1333                         blizzard_reg_cache[reg / 2] = blizzard_read_reg(reg);
1334         }
1335 }
1336
1337 static void _restore_regs(struct blizzard_reg_list *list, int cnt)
1338 {
1339         int i;
1340
1341         for (i = 0; i < cnt; i++, list++) {
1342                 int reg;
1343                 for (reg = list->start; reg <= list->end; reg += 2)
1344                         blizzard_write_reg(reg, blizzard_reg_cache[reg / 2]);
1345         }
1346 }
1347
1348 static void blizzard_save_all_regs(void)
1349 {
1350         _save_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
1351         _save_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
1352 }
1353
1354 static void blizzard_restore_pll_regs(void)
1355 {
1356         _restore_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
1357 }
1358
1359 static void blizzard_restore_gen_regs(void)
1360 {
1361         _restore_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
1362 }
1363
1364 static void blizzard_suspend(void)
1365 {
1366         u32 l;
1367         unsigned long tmo;
1368
1369         if (blizzard.last_color_mode) {
1370                 update_full_screen();
1371                 blizzard_sync();
1372         }
1373         blizzard.update_mode_before_suspend = blizzard.update_mode;
1374         /* the following will disable clocks as well */
1375         blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
1376
1377         blizzard_save_all_regs();
1378
1379         blizzard_stop_sdram();
1380
1381         l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
1382         /* Standby, Sleep. We assume we use an external clock. */
1383         l |= 0x03;
1384         blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
1385
1386         tmo = jiffies + msecs_to_jiffies(100);
1387         while (!(blizzard_read_reg(BLIZZARD_PLL_MODE) & (1 << 1))) {
1388                 if (time_after(jiffies, tmo)) {
1389                         dev_err(blizzard.fbdev->dev,
1390                                 "s1d1374x: sleep timeout, stopping PLL manually\n");
1391                         l = blizzard_read_reg(BLIZZARD_PLL_MODE);
1392                         l &= ~0x03;
1393                         /* Disable PLL, counter function */
1394                         l |= 0x2;
1395                         blizzard_write_reg(BLIZZARD_PLL_MODE, l);
1396                         break;
1397                 }
1398                 msleep(1);
1399         }
1400
1401         if (blizzard.power_down != NULL)
1402                 blizzard.power_down(blizzard.fbdev->dev);
1403 }
1404
1405 static void blizzard_resume(void)
1406 {
1407         u32 l;
1408
1409         if (blizzard.power_up != NULL)
1410                 blizzard.power_up(blizzard.fbdev->dev);
1411
1412         l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
1413         /* Standby, Sleep */
1414         l &= ~0x03;
1415         blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
1416
1417         blizzard_restore_pll_regs();
1418         l = blizzard_read_reg(BLIZZARD_PLL_MODE);
1419         l &= ~0x03;
1420         /* Enable PLL, counter function */
1421         l |= 0x1;
1422         blizzard_write_reg(BLIZZARD_PLL_MODE, l);
1423
1424         while (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & (1 << 7)))
1425                 msleep(1);
1426
1427         blizzard_restart_sdram();
1428
1429         blizzard_restore_gen_regs();
1430
1431         /* Enable display */
1432         blizzard_write_reg(BLIZZARD_DISPLAY_MODE, 0x01);
1433
1434         /* the following will enable clocks as necessary */
1435         blizzard_set_update_mode(blizzard.update_mode_before_suspend);
1436
1437         /* Force a background update */
1438         blizzard.zoom_on = 1;
1439         update_full_screen();
1440         blizzard_sync();
1441 }
1442
1443 static int blizzard_init(struct omapfb_device *fbdev, int ext_mode,
1444                          struct omapfb_mem_desc *req_vram)
1445 {
1446         int r = 0, i;
1447         u8 rev, conf;
1448         unsigned long ext_clk;
1449         int extif_div;
1450         unsigned long sys_clk, pix_clk;
1451         struct omapfb_platform_data *omapfb_conf;
1452         struct blizzard_platform_data *ctrl_conf;
1453
1454         blizzard.fbdev = fbdev;
1455
1456         BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
1457
1458         blizzard.fbdev = fbdev;
1459         blizzard.extif = fbdev->ext_if;
1460         blizzard.int_ctrl = fbdev->int_ctrl;
1461
1462         omapfb_conf = fbdev->dev->platform_data;
1463         ctrl_conf = omapfb_conf->ctrl_platform_data;
1464         if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) {
1465                 dev_err(fbdev->dev, "s1d1374x: missing platform data\n");
1466                 r = -ENOENT;
1467                 goto err1;
1468         }
1469
1470         blizzard.power_down = ctrl_conf->power_down;
1471         blizzard.power_up = ctrl_conf->power_up;
1472
1473         spin_lock_init(&blizzard.req_lock);
1474
1475         if ((r = blizzard.int_ctrl->init(fbdev, 1, req_vram)) < 0)
1476                 goto err1;
1477
1478         if ((r = blizzard.extif->init(fbdev)) < 0)
1479                 goto err2;
1480
1481         blizzard_ctrl.set_color_key = blizzard.int_ctrl->set_color_key;
1482         blizzard_ctrl.get_color_key = blizzard.int_ctrl->get_color_key;
1483         blizzard_ctrl.setup_mem = blizzard.int_ctrl->setup_mem;
1484         blizzard_ctrl.mmap = blizzard.int_ctrl->mmap;
1485
1486         ext_clk = ctrl_conf->get_clock_rate(fbdev->dev);
1487         if ((r = calc_extif_timings(ext_clk, &extif_div)) < 0)
1488                 goto err3;
1489
1490         set_extif_timings(&blizzard.reg_timings);
1491
1492         if (blizzard.power_up != NULL)
1493                 blizzard.power_up(fbdev->dev);
1494
1495         calc_blizzard_clk_rates(ext_clk, &sys_clk, &pix_clk);
1496
1497         if ((r = calc_extif_timings(sys_clk, &extif_div)) < 0)
1498                 goto err3;
1499         set_extif_timings(&blizzard.reg_timings);
1500
1501         if (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x80)) {
1502                 dev_err(fbdev->dev,
1503                         "controller not initialized by the bootloader\n");
1504                 r = -ENODEV;
1505                 goto err3;
1506         }
1507
1508         if (ctrl_conf->te_connected) {
1509                 if ((r = setup_tearsync(pix_clk, extif_div)) < 0)
1510                         goto err3;
1511                 blizzard.te_connected = 1;
1512         }
1513
1514         rev = blizzard_read_reg(BLIZZARD_REV_CODE);
1515         conf = blizzard_read_reg(BLIZZARD_CONFIG);
1516
1517         switch (rev & 0xfc) {
1518         case 0x9c:
1519                 blizzard.version = BLIZZARD_VERSION_S1D13744;
1520                 pr_info("omapfb: s1d13744 LCD controller rev %d "
1521                         "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
1522                 break;
1523         case 0xa4:
1524                 blizzard.version = BLIZZARD_VERSION_S1D13745;
1525                 pr_info("omapfb: s1d13745 LCD controller rev %d "
1526                         "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
1527                 break;
1528         default:
1529                 dev_err(fbdev->dev, "invalid s1d1374x revision %02x\n",
1530                         rev);
1531                 r = -ENODEV;
1532                 goto err3;
1533         }
1534
1535         blizzard.max_transmit_size = blizzard.extif->max_transmit_size;
1536
1537         blizzard.update_mode = OMAPFB_UPDATE_DISABLED;
1538
1539         blizzard.auto_update_window.x = 0;
1540         blizzard.auto_update_window.y = 0;
1541         blizzard.auto_update_window.width = fbdev->panel->x_res;
1542         blizzard.auto_update_window.height = fbdev->panel->y_res;
1543         blizzard.auto_update_window.out_x = 0;
1544         blizzard.auto_update_window.out_x = 0;
1545         blizzard.auto_update_window.out_width = fbdev->panel->x_res;
1546         blizzard.auto_update_window.out_height = fbdev->panel->y_res;
1547         blizzard.auto_update_window.format = 0;
1548
1549         blizzard.screen_width = fbdev->panel->x_res;
1550         blizzard.screen_height = fbdev->panel->y_res;
1551
1552         init_timer(&blizzard.auto_update_timer);
1553         blizzard.auto_update_timer.function = blizzard_update_window_auto;
1554         blizzard.auto_update_timer.data = 0;
1555
1556         INIT_LIST_HEAD(&blizzard.free_req_list);
1557         INIT_LIST_HEAD(&blizzard.pending_req_list);
1558         for (i = 0; i < ARRAY_SIZE(blizzard.req_pool); i++)
1559                 list_add(&blizzard.req_pool[i].entry, &blizzard.free_req_list);
1560         BUG_ON(i <= IRQ_REQ_POOL_SIZE);
1561         sema_init(&blizzard.req_sema, i - IRQ_REQ_POOL_SIZE);
1562
1563         return 0;
1564 err3:
1565         if (blizzard.power_down != NULL)
1566                 blizzard.power_down(fbdev->dev);
1567         blizzard.extif->cleanup();
1568 err2:
1569         blizzard.int_ctrl->cleanup();
1570 err1:
1571         return r;
1572 }
1573
1574 static void blizzard_cleanup(void)
1575 {
1576         blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
1577         blizzard.extif->cleanup();
1578         blizzard.int_ctrl->cleanup();
1579         if (blizzard.power_down != NULL)
1580                 blizzard.power_down(blizzard.fbdev->dev);
1581 }
1582
1583 struct lcd_ctrl blizzard_ctrl = {
1584         .name                   = "blizzard",
1585         .init                   = blizzard_init,
1586         .cleanup                = blizzard_cleanup,
1587         .bind_client            = blizzard_bind_client,
1588         .get_caps               = blizzard_get_caps,
1589         .set_update_mode        = blizzard_set_update_mode,
1590         .get_update_mode        = blizzard_get_update_mode,
1591         .setup_plane            = blizzard_setup_plane,
1592         .set_scale              = blizzard_set_scale,
1593         .enable_plane           = blizzard_enable_plane,
1594         .set_rotate             = blizzard_set_rotate,
1595         .update_window          = blizzard_update_window_async,
1596         .sync                   = blizzard_sync,
1597         .suspend                = blizzard_suspend,
1598         .resume                 = blizzard_resume,
1599 };
1600