drivers/usb/gadget/omap_udc.c

   1 /*
   2  * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  * Copyright (C) 2004-2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #undef  DEBUG
  23 #undef  VERBOSE
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/kernel.h>
  28 #include <linux/ioport.h>
  29 #include <linux/types.h>
  30 #include <linux/errno.h>
  31 #include <linux/delay.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/init.h>
  35 #include <linux/timer.h>
  36 #include <linux/list.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/proc_fs.h>
  39 #include <linux/mm.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/platform_device.h>
  42 #include <linux/usb_ch9.h>
  43 #include <linux/usb_gadget.h>
  44 #include <linux/usb_otg.h>
  45 #include <linux/dma-mapping.h>
  46 #include <linux/clk.h>
  47
  48 #include <asm/byteorder.h>
  49 #include <asm/io.h>
  50 #include <asm/irq.h>
  51 #include <asm/system.h>
  52 #include <asm/unaligned.h>
  53 #include <asm/mach-types.h>
  54
  55 #include <asm/arch/dma.h>
  56 #include <asm/arch/usb.h>
  57
  58 #include "omap_udc.h"
  59
  60 #undef  USB_TRACE
  61
  62 /* bulk DMA seems to be behaving for both IN and OUT */
  63 #ifdef CONFIG_MACH_OMAP_H6300
  64 #undef USE_DMA
  65 #else
  66 #define USE_DMA
  67 #endif
  68
  69 /* ISO too */
  70 #define USE_ISO
  71
  72 #define DRIVER_DESC     "OMAP UDC driver"
  73 #define DRIVER_VERSION  "4 October 2004"
  74
  75 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  76
  77
  78 /*
  79  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  80  * D+ pullup to allow enumeration.  That's too early for the gadget
  81  * framework to use from usb_endpoint_enable(), which happens after
  82  * enumeration as part of activating an interface.  (But if we add an
  83  * optional new "UDC not yet running" state to the gadget driver model,
  84  * even just during driver binding, the endpoint autoconfig logic is the
  85  * natural spot to manufacture new endpoints.)
  86  *
  87  * So instead of using endpoint enable calls to control the hardware setup,
  88  * this driver defines a "fifo mode" parameter.  It's used during driver
  89  * initialization to choose among a set of pre-defined endpoint configs.
  90  * See omap_udc_setup() for available modes, or to add others.  That code
  91  * lives in an init section, so use this driver as a module if you need
  92  * to change the fifo mode after the kernel boots.
  93  *
  94  * Gadget drivers normally ignore endpoints they don't care about, and
  95  * won't include them in configuration descriptors.  That means only
  96  * misbehaving hosts would even notice they exist.
  97  */
  98 #ifdef  USE_ISO
  99 static unsigned fifo_mode = 3;
 100 #else
 101 static unsigned fifo_mode = 0;
 102 #endif
 103
 104 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
 105  * boot parameter "omap_udc:fifo_mode=42"
 106  */
 107 module_param (fifo_mode, uint, 0);
 108 MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
 109
 110 #ifdef  USE_DMA
 111 static unsigned use_dma = 1;
 112
 113 /* "modprobe omap_udc use_dma=y", or else as a kernel
 114  * boot parameter "omap_udc:use_dma=y"
 115  */
 116 module_param (use_dma, bool, 0);
 117 MODULE_PARM_DESC (use_dma, "enable/disable DMA");
 118 #else   /* !USE_DMA */
 119
 120 /* save a bit of code */
 121 #define use_dma         0
 122 #endif  /* !USE_DMA */
 123
 124
 125 static const char driver_name [] = "omap_udc";
 126 static const char driver_desc [] = DRIVER_DESC;
 127
 128 /*-------------------------------------------------------------------------*/
 129
 130 /* there's a notion of "current endpoint" for modifying endpoint
 131  * state, and PIO access to its FIFO.
 132  */
 133
 134 static void use_ep(struct omap_ep *ep, u16 select)
 135 {
 136         u16     num = ep->bEndpointAddress & 0x0f;
 137
 138         if (ep->bEndpointAddress & USB_DIR_IN)
 139                 num |= UDC_EP_DIR;
 140         UDC_EP_NUM_REG = num | select;
 141         /* when select, MUST deselect later !! */
 142 }
 143
 144 static inline void deselect_ep(void)
 145 {
 146         UDC_EP_NUM_REG &= ~UDC_EP_SEL;
 147         /* 6 wait states before TX will happen */
 148 }
 149
 150 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
 151
 152 /*-------------------------------------------------------------------------*/
 153
 154 static int omap_ep_enable(struct usb_ep *_ep,
 155                 const struct usb_endpoint_descriptor *desc)
 156 {
 157         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 158         struct omap_udc *udc;
 159         unsigned long   flags;
 160         u16             maxp;
 161
 162         /* catch various bogus parameters */
 163         if (!_ep || !desc || ep->desc
 164                         || desc->bDescriptorType != USB_DT_ENDPOINT
 165                         || ep->bEndpointAddress != desc->bEndpointAddress
 166                         || ep->maxpacket < le16_to_cpu
 167                                                 (desc->wMaxPacketSize)) {
 168                 DBG("%s, bad ep or descriptor\n", __FUNCTION__);
 169                 return -EINVAL;
 170         }
 171         maxp = le16_to_cpu (desc->wMaxPacketSize);
 172         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 173                                 && maxp != ep->maxpacket)
 174                         || le16_to_cpu(desc->wMaxPacketSize) > ep->maxpacket
 175                         || !desc->wMaxPacketSize) {
 176                 DBG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
 177                 return -ERANGE;
 178         }
 179
 180 #ifdef  USE_ISO
 181         if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
 182                                 && desc->bInterval != 1)) {
 183                 /* hardware wants period = 1; USB allows 2^(Interval-1) */
 184                 DBG("%s, unsupported ISO period %dms\n", _ep->name,
 185                                 1 << (desc->bInterval - 1));
 186                 return -EDOM;
 187         }
 188 #else
 189         if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 190                 DBG("%s, ISO nyet\n", _ep->name);
 191                 return -EDOM;
 192         }
 193 #endif
 194
 195         /* xfer types must match, except that interrupt ~= bulk */
 196         if (ep->bmAttributes != desc->bmAttributes
 197                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 198                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 199                 DBG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
 200                 return -EINVAL;
 201         }
 202
 203         udc = ep->udc;
 204         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
 205                 DBG("%s, bogus device state\n", __FUNCTION__);
 206                 return -ESHUTDOWN;
 207         }
 208
 209         spin_lock_irqsave(&udc->lock, flags);
 210
 211         ep->desc = desc;
 212         ep->irqs = 0;
 213         ep->stopped = 0;
 214         ep->ep.maxpacket = maxp;
 215
 216         /* set endpoint to initial state */
 217         ep->dma_channel = 0;
 218         ep->has_dma = 0;
 219         ep->lch = -1;
 220         use_ep(ep, UDC_EP_SEL);
 221         UDC_CTRL_REG = udc->clr_halt;
 222         ep->ackwait = 0;
 223         deselect_ep();
 224
 225         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 226                 list_add(&ep->iso, &udc->iso);
 227
 228         /* maybe assign a DMA channel to this endpoint */
 229         if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK)
 230                 /* FIXME ISO can dma, but prefers first channel */
 231                 dma_channel_claim(ep, 0);
 232
 233         /* PIO OUT may RX packets */
 234         if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
 235                         && !ep->has_dma
 236                         && !(ep->bEndpointAddress & USB_DIR_IN)) {
 237                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 238                 ep->ackwait = 1 + ep->double_buf;
 239         }
 240
 241         spin_unlock_irqrestore(&udc->lock, flags);
 242         VDBG("%s enabled\n", _ep->name);
 243         return 0;
 244 }
 245
 246 static void nuke(struct omap_ep *, int status);
 247
 248 static int omap_ep_disable(struct usb_ep *_ep)
 249 {
 250         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 251         unsigned long   flags;
 252
 253         if (!_ep || !ep->desc) {
 254                 DBG("%s, %s not enabled\n", __FUNCTION__,
 255                         _ep ? ep->ep.name : NULL);
 256                 return -EINVAL;
 257         }
 258
 259         spin_lock_irqsave(&ep->udc->lock, flags);
 260         ep->desc = NULL;
 261         nuke (ep, -ESHUTDOWN);
 262         ep->ep.maxpacket = ep->maxpacket;
 263         ep->has_dma = 0;
 264         UDC_CTRL_REG = UDC_SET_HALT;
 265         list_del_init(&ep->iso);
 266         del_timer(&ep->timer);
 267
 268         spin_unlock_irqrestore(&ep->udc->lock, flags);
 269
 270         VDBG("%s disabled\n", _ep->name);
 271         return 0;
 272 }
 273
 274 /*-------------------------------------------------------------------------*/
 275
 276 static struct usb_request *
 277 omap_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
 278 {
 279         struct omap_req *req;
 280
 281         req = kmalloc(sizeof *req, gfp_flags);
 282         if (req) {
 283                 memset (req, 0, sizeof *req);
 284                 req->req.dma = DMA_ADDR_INVALID;
 285                 INIT_LIST_HEAD (&req->queue);
 286         }
 287         return &req->req;
 288 }
 289
 290 static void
 291 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
 292 {
 293         struct omap_req *req = container_of(_req, struct omap_req, req);
 294
 295         if (_req)
 296                 kfree (req);
 297 }
 298
 299 /*-------------------------------------------------------------------------*/
 300
 301 static void *
 302 omap_alloc_buffer(
 303         struct usb_ep   *_ep,
 304         unsigned        bytes,
 305         dma_addr_t      *dma,
 306         gfp_t           gfp_flags
 307 )
 308 {
 309         void            *retval;
 310         struct omap_ep  *ep;
 311
 312         ep = container_of(_ep, struct omap_ep, ep);
 313         if (use_dma && ep->has_dma) {
 314                 static int      warned;
 315                 if (!warned && bytes < PAGE_SIZE) {
 316                         dev_warn(ep->udc->gadget.dev.parent,
 317                                 "using dma_alloc_coherent for "
 318                                 "small allocations wastes memory\n");
 319                         warned++;
 320                 }
 321                 return dma_alloc_coherent(ep->udc->gadget.dev.parent,
 322                                 bytes, dma, gfp_flags);
 323         }
 324
 325         retval = kmalloc(bytes, gfp_flags);
 326         if (retval)
 327                 *dma = virt_to_phys(retval);
 328         return retval;
 329 }
 330
 331 static void omap_free_buffer(
 332         struct usb_ep   *_ep,
 333         void            *buf,
 334         dma_addr_t      dma,
 335         unsigned        bytes
 336 )
 337 {
 338         struct omap_ep  *ep;
 339
 340         ep = container_of(_ep, struct omap_ep, ep);
 341         if (use_dma && _ep && ep->has_dma)
 342                 dma_free_coherent(ep->udc->gadget.dev.parent, bytes, buf, dma);
 343         else
 344                 kfree (buf);
 345 }
 346
 347 /*-------------------------------------------------------------------------*/
 348
 349 static void
 350 done(struct omap_ep *ep, struct omap_req *req, int status)
 351 {
 352         unsigned                stopped = ep->stopped;
 353
 354         list_del_init(&req->queue);
 355
 356         if (req->req.status == -EINPROGRESS)
 357                 req->req.status = status;
 358         else
 359                 status = req->req.status;
 360
 361         if (use_dma && ep->has_dma) {
 362                 if (req->mapped) {
 363                         dma_unmap_single(ep->udc->gadget.dev.parent,
 364                                 req->req.dma, req->req.length,
 365                                 (ep->bEndpointAddress & USB_DIR_IN)
 366                                         ? DMA_TO_DEVICE
 367                                         : DMA_FROM_DEVICE);
 368                         req->req.dma = DMA_ADDR_INVALID;
 369                         req->mapped = 0;
 370                 } else
 371                         dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 372                                 req->req.dma, req->req.length,
 373                                 (ep->bEndpointAddress & USB_DIR_IN)
 374                                         ? DMA_TO_DEVICE
 375                                         : DMA_FROM_DEVICE);
 376         }
 377
 378 #ifndef USB_TRACE
 379         if (status && status != -ESHUTDOWN)
 380 #endif
 381                 VDBG("complete %s req %p stat %d len %u/%u\n",
 382                         ep->ep.name, &req->req, status,
 383                         req->req.actual, req->req.length);
 384
 385         /* don't modify queue heads during completion callback */
 386         ep->stopped = 1;
 387         spin_unlock(&ep->udc->lock);
 388         req->req.complete(&ep->ep, &req->req);
 389         spin_lock(&ep->udc->lock);
 390         ep->stopped = stopped;
 391 }
 392
 393 /*-------------------------------------------------------------------------*/
 394
 395 #define UDC_FIFO_FULL           (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
 396 #define UDC_FIFO_UNWRITABLE     (UDC_EP_HALTED | UDC_FIFO_FULL)
 397
 398 #define FIFO_EMPTY      (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
 399 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
 400
 401 static inline int
 402 write_packet(u8 *buf, struct omap_req *req, unsigned max)
 403 {
 404         unsigned        len;
 405         u16             *wp;
 406
 407         len = min(req->req.length - req->req.actual, max);
 408         req->req.actual += len;
 409
 410         max = len;
 411         if (likely((((int)buf) & 1) == 0)) {
 412                 wp = (u16 *)buf;
 413                 while (max >= 2) {
 414                         UDC_DATA_REG = *wp++;
 415                         max -= 2;
 416                 }
 417                 buf = (u8 *)wp;
 418         }
 419         while (max--)
 420                 *(volatile u8 *)&UDC_DATA_REG = *buf++;
 421         return len;
 422 }
 423
 424 // FIXME change r/w fifo calling convention
 425
 426
 427 // return:  0 = still running, 1 = completed, negative = errno
 428 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
 429 {
 430         u8              *buf;
 431         unsigned        count;
 432         int             is_last;
 433         u16             ep_stat;
 434
 435         buf = req->req.buf + req->req.actual;
 436         prefetch(buf);
 437
 438         /* PIO-IN isn't double buffered except for iso */
 439         ep_stat = UDC_STAT_FLG_REG;
 440         if (ep_stat & UDC_FIFO_UNWRITABLE)
 441                 return 0;
 442
 443         count = ep->ep.maxpacket;
 444         count = write_packet(buf, req, count);
 445         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 446         ep->ackwait = 1;
 447
 448         /* last packet is often short (sometimes a zlp) */
 449         if (count != ep->ep.maxpacket)
 450                 is_last = 1;
 451         else if (req->req.length == req->req.actual
 452                         && !req->req.zero)
 453                 is_last = 1;
 454         else
 455                 is_last = 0;
 456
 457         /* NOTE:  requests complete when all IN data is in a
 458          * FIFO (or sometimes later, if a zlp was needed).
 459          * Use usb_ep_fifo_status() where needed.
 460          */
 461         if (is_last)
 462                 done(ep, req, 0);
 463         return is_last;
 464 }
 465
 466 static inline int
 467 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
 468 {
 469         unsigned        len;
 470         u16             *wp;
 471
 472         len = min(req->req.length - req->req.actual, avail);
 473         req->req.actual += len;
 474         avail = len;
 475
 476         if (likely((((int)buf) & 1) == 0)) {
 477                 wp = (u16 *)buf;
 478                 while (avail >= 2) {
 479                         *wp++ = UDC_DATA_REG;
 480                         avail -= 2;
 481                 }
 482                 buf = (u8 *)wp;
 483         }
 484         while (avail--)
 485                 *buf++ = *(volatile u8 *)&UDC_DATA_REG;
 486         return len;
 487 }
 488
 489 // return:  0 = still running, 1 = queue empty, negative = errno
 490 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
 491 {
 492         u8              *buf;
 493         unsigned        count, avail;
 494         int             is_last;
 495
 496         buf = req->req.buf + req->req.actual;
 497         prefetchw(buf);
 498
 499         for (;;) {
 500                 u16     ep_stat = UDC_STAT_FLG_REG;
 501
 502                 is_last = 0;
 503                 if (ep_stat & FIFO_EMPTY) {
 504                         if (!ep->double_buf)
 505                                 break;
 506                         ep->fnf = 1;
 507                 }
 508                 if (ep_stat & UDC_EP_HALTED)
 509                         break;
 510
 511                 if (ep_stat & UDC_FIFO_FULL)
 512                         avail = ep->ep.maxpacket;
 513                 else  {
 514                         avail = UDC_RXFSTAT_REG;
 515                         ep->fnf = ep->double_buf;
 516                 }
 517                 count = read_packet(buf, req, avail);
 518
 519                 /* partial packet reads may not be errors */
 520                 if (count < ep->ep.maxpacket) {
 521                         is_last = 1;
 522                         /* overflowed this request?  flush extra data */
 523                         if (count != avail) {
 524                                 req->req.status = -EOVERFLOW;
 525                                 avail -= count;
 526                                 while (avail--)
 527                                         (void) *(volatile u8 *)&UDC_DATA_REG;
 528                         }
 529                 } else if (req->req.length == req->req.actual)
 530                         is_last = 1;
 531                 else
 532                         is_last = 0;
 533
 534                 if (!ep->bEndpointAddress)
 535                         break;
 536                 if (is_last)
 537                         done(ep, req, 0);
 538                 break;
 539         }
 540         return is_last;
 541 }
 542
 543 /*-------------------------------------------------------------------------*/
 544
 545 static inline dma_addr_t dma_csac(unsigned lch)
 546 {
 547         dma_addr_t      csac;
 548
 549         /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 550          * read before the DMA controller finished disabling the channel.
 551          */
 552         csac = OMAP_DMA_CSAC_REG(lch);
 553         if (csac == 0)
 554                 csac = OMAP_DMA_CSAC_REG(lch);
 555         return csac;
 556 }
 557
 558 static inline dma_addr_t dma_cdac(unsigned lch)
 559 {
 560         dma_addr_t      cdac;
 561
 562         /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
 563          * read before the DMA controller finished disabling the channel.
 564          */
 565         cdac = OMAP_DMA_CDAC_REG(lch);
 566         if (cdac == 0)
 567                 cdac = OMAP_DMA_CDAC_REG(lch);
 568         return cdac;
 569 }
 570
 571 static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
 572 {
 573         dma_addr_t      end;
 574
 575         /* IN-DMA needs this on fault/cancel paths, so 15xx misreports
 576          * the last transfer's bytecount by more than a FIFO's worth.
 577          */
 578         if (cpu_is_omap15xx())
 579                 return 0;
 580
 581         end = dma_csac(ep->lch);
 582         if (end == ep->dma_counter)
 583                 return 0;
 584
 585         end |= start & (0xffff << 16);
 586         if (end < start)
 587                 end += 0x10000;
 588         return end - start;
 589 }
 590
 591 #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
 592                 ? OMAP_DMA_CSAC_REG(x) /* really: CPC */ \
 593                 : dma_cdac(x))
 594
 595 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
 596 {
 597         dma_addr_t      end;
 598
 599         end = DMA_DEST_LAST(ep->lch);
 600         if (end == ep->dma_counter)
 601                 return 0;
 602
 603         end |= start & (0xffff << 16);
 604         if (cpu_is_omap15xx())
 605                 end++;
 606         if (end < start)
 607                 end += 0x10000;
 608         return end - start;
 609 }
 610
 611
 612 /* Each USB transfer request using DMA maps to one or more DMA transfers.
 613  * When DMA completion isn't request completion, the UDC continues with
 614  * the next DMA transfer for that USB transfer.
 615  */
 616
 617 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
 618 {
 619         u16             txdma_ctrl;
 620         unsigned        length = req->req.length - req->req.actual;
 621         const int       sync_mode = cpu_is_omap15xx()
 622                                 ? OMAP_DMA_SYNC_FRAME
 623                                 : OMAP_DMA_SYNC_ELEMENT;
 624
 625         /* measure length in either bytes or packets */
 626         if ((cpu_is_omap16xx() && length <= UDC_TXN_TSC)
 627                         || (cpu_is_omap15xx() && length < ep->maxpacket)) {
 628                 txdma_ctrl = UDC_TXN_EOT | length;
 629                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 630                                 length, 1, sync_mode, 0, 0);
 631         } else {
 632                 length = min(length / ep->maxpacket,
 633                                 (unsigned) UDC_TXN_TSC + 1);
 634                 txdma_ctrl = length;
 635                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
 636                                 ep->ep.maxpacket >> 1, length, sync_mode,
 637                                 0, 0);
 638                 length *= ep->maxpacket;
 639         }
 640         omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 641                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
 642                 0, 0);
 643
 644         omap_start_dma(ep->lch);
 645         ep->dma_counter = dma_csac(ep->lch);
 646         UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel);
 647         UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl;
 648         req->dma_bytes = length;
 649 }
 650
 651 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
 652 {
 653         if (status == 0) {
 654                 req->req.actual += req->dma_bytes;
 655
 656                 /* return if this request needs to send data or zlp */
 657                 if (req->req.actual < req->req.length)
 658                         return;
 659                 if (req->req.zero
 660                                 && req->dma_bytes != 0
 661                                 && (req->req.actual % ep->maxpacket) == 0)
 662                         return;
 663         } else
 664                 req->req.actual += dma_src_len(ep, req->req.dma
 665                                                         + req->req.actual);
 666
 667         /* tx completion */
 668         omap_stop_dma(ep->lch);
 669         UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel);
 670         done(ep, req, status);
 671 }
 672
 673 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
 674 {
 675         unsigned packets;
 676
 677         /* NOTE:  we filtered out "short reads" before, so we know
 678          * the buffer has only whole numbers of packets.
 679          */
 680
 681         /* set up this DMA transfer, enable the fifo, start */
 682         packets = (req->req.length - req->req.actual) / ep->ep.maxpacket;
 683         packets = min(packets, (unsigned)UDC_RXN_TC + 1);
 684         req->dma_bytes = packets * ep->ep.maxpacket;
 685         omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
 686                         ep->ep.maxpacket >> 1, packets,
 687                         OMAP_DMA_SYNC_ELEMENT,
 688                         0, 0);
 689         omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 690                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
 691                 0, 0);
 692         ep->dma_counter = DMA_DEST_LAST(ep->lch);
 693
 694         UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
 695         UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel);
 696         UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf);
 697         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 698
 699         omap_start_dma(ep->lch);
 700 }
 701
 702 static void
 703 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one)
 704 {
 705         u16     count;
 706
 707         if (status == 0)
 708                 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
 709         count = dma_dest_len(ep, req->req.dma + req->req.actual);
 710         count += req->req.actual;
 711         if (one)
 712                 count--;
 713         if (count <= req->req.length)
 714                 req->req.actual = count;
 715
 716         if (count != req->dma_bytes || status)
 717                 omap_stop_dma(ep->lch);
 718
 719         /* if this wasn't short, request may need another transfer */
 720         else if (req->req.actual < req->req.length)
 721                 return;
 722
 723         /* rx completion */
 724         UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel);
 725         done(ep, req, status);
 726 }
 727
 728 static void dma_irq(struct omap_udc *udc, u16 irq_src)
 729 {
 730         u16             dman_stat = UDC_DMAN_STAT_REG;
 731         struct omap_ep  *ep;
 732         struct omap_req *req;
 733
 734         /* IN dma: tx to host */
 735         if (irq_src & UDC_TXN_DONE) {
 736                 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
 737                 ep->irqs++;
 738                 /* can see TXN_DONE after dma abort */
 739                 if (!list_empty(&ep->queue)) {
 740                         req = container_of(ep->queue.next,
 741                                                 struct omap_req, queue);
 742                         finish_in_dma(ep, req, 0);
 743                 }
 744                 UDC_IRQ_SRC_REG = UDC_TXN_DONE;
 745
 746                 if (!list_empty (&ep->queue)) {
 747                         req = container_of(ep->queue.next,
 748                                         struct omap_req, queue);
 749                         next_in_dma(ep, req);
 750                 }
 751         }
 752
 753         /* OUT dma: rx from host */
 754         if (irq_src & UDC_RXN_EOT) {
 755                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 756                 ep->irqs++;
 757                 /* can see RXN_EOT after dma abort */
 758                 if (!list_empty(&ep->queue)) {
 759                         req = container_of(ep->queue.next,
 760                                         struct omap_req, queue);
 761                         finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB);
 762                 }
 763                 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
 764
 765                 if (!list_empty (&ep->queue)) {
 766                         req = container_of(ep->queue.next,
 767                                         struct omap_req, queue);
 768                         next_out_dma(ep, req);
 769                 }
 770         }
 771
 772         if (irq_src & UDC_RXN_CNT) {
 773                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 774                 ep->irqs++;
 775                 /* omap15xx does this unasked... */
 776                 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
 777                 UDC_IRQ_SRC_REG = UDC_RXN_CNT;
 778         }
 779 }
 780
 781 static void dma_error(int lch, u16 ch_status, void *data)
 782 {
 783         struct omap_ep  *ep = data;
 784
 785         /* if ch_status & OMAP_DMA_DROP_IRQ ... */
 786         /* if ch_status & OMAP_DMA_TOUT_IRQ ... */
 787         ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
 788
 789         /* complete current transfer ... */
 790 }
 791
 792 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 793 {
 794         u16     reg;
 795         int     status, restart, is_in;
 796
 797         is_in = ep->bEndpointAddress & USB_DIR_IN;
 798         if (is_in)
 799                 reg = UDC_TXDMA_CFG_REG;
 800         else
 801                 reg = UDC_RXDMA_CFG_REG;
 802         reg |= UDC_DMA_REQ;             /* "pulse" activated */
 803
 804         ep->dma_channel = 0;
 805         ep->lch = -1;
 806         if (channel == 0 || channel > 3) {
 807                 if ((reg & 0x0f00) == 0)
 808                         channel = 3;
 809                 else if ((reg & 0x00f0) == 0)
 810                         channel = 2;
 811                 else if ((reg & 0x000f) == 0)   /* preferred for ISO */
 812                         channel = 1;
 813                 else {
 814                         status = -EMLINK;
 815                         goto just_restart;
 816                 }
 817         }
 818         reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
 819         ep->dma_channel = channel;
 820
 821         if (is_in) {
 822                 status = omap_request_dma(OMAP_DMA_USB_W2FC_TX0 - 1 + channel,
 823                         ep->ep.name, dma_error, ep, &ep->lch);
 824                 if (status == 0) {
 825                         UDC_TXDMA_CFG_REG = reg;
 826                         /* EMIFF */
 827                         omap_set_dma_src_burst_mode(ep->lch,
 828                                                 OMAP_DMA_DATA_BURST_4);
 829                         omap_set_dma_src_data_pack(ep->lch, 1);
 830                         /* TIPB */
 831                         omap_set_dma_dest_params(ep->lch,
 832                                 OMAP_DMA_PORT_TIPB,
 833                                 OMAP_DMA_AMODE_CONSTANT,
 834                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG),
 835                                 0, 0);
 836                 }
 837         } else {
 838                 status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
 839                         ep->ep.name, dma_error, ep, &ep->lch);
 840                 if (status == 0) {
 841                         UDC_RXDMA_CFG_REG = reg;
 842                         /* TIPB */
 843                         omap_set_dma_src_params(ep->lch,
 844                                 OMAP_DMA_PORT_TIPB,
 845                                 OMAP_DMA_AMODE_CONSTANT,
 846                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG),
 847                                 0, 0);
 848                         /* EMIFF */
 849                         omap_set_dma_dest_burst_mode(ep->lch,
 850                                                 OMAP_DMA_DATA_BURST_4);
 851                         omap_set_dma_dest_data_pack(ep->lch, 1);
 852                 }
 853         }
 854         if (status)
 855                 ep->dma_channel = 0;
 856         else {
 857                 ep->has_dma = 1;
 858                 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
 859
 860                 /* channel type P: hw synch (fifo) */
 861                 if (!cpu_is_omap15xx())
 862                         OMAP1_DMA_LCH_CTRL_REG(ep->lch) = 2;
 863         }
 864
 865 just_restart:
 866         /* restart any queue, even if the claim failed  */
 867         restart = !ep->stopped && !list_empty(&ep->queue);
 868
 869         if (status)
 870                 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
 871                         restart ? " (restart)" : "");
 872         else
 873                 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
 874                         is_in ? 't' : 'r',
 875                         ep->dma_channel - 1, ep->lch,
 876                         restart ? " (restart)" : "");
 877
 878         if (restart) {
 879                 struct omap_req *req;
 880                 req = container_of(ep->queue.next, struct omap_req, queue);
 881                 if (ep->has_dma)
 882                         (is_in ? next_in_dma : next_out_dma)(ep, req);
 883                 else {
 884                         use_ep(ep, UDC_EP_SEL);
 885                         (is_in ? write_fifo : read_fifo)(ep, req);
 886                         deselect_ep();
 887                         if (!is_in) {
 888                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 889                                 ep->ackwait = 1 + ep->double_buf;
 890                         }
 891                         /* IN: 6 wait states before it'll tx */
 892                 }
 893         }
 894 }
 895
 896 static void dma_channel_release(struct omap_ep *ep)
 897 {
 898         int             shift = 4 * (ep->dma_channel - 1);
 899         u16             mask = 0x0f << shift;
 900         struct omap_req *req;
 901         int             active;
 902
 903         /* abort any active usb transfer request */
 904         if (!list_empty(&ep->queue))
 905                 req = container_of(ep->queue.next, struct omap_req, queue);
 906         else
 907                 req = NULL;
 908
 909         active = ((1 << 7) & OMAP_DMA_CCR_REG(ep->lch)) != 0;
 910
 911         DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
 912                         active ? "active" : "idle",
 913                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
 914                         ep->dma_channel - 1, req);
 915
 916         /* NOTE: re-setting RX_REQ/TX_REQ because of a chip bug (before
 917          * OMAP 1710 ES2.0) where reading the DMA_CFG can clear them.
 918          */
 919
 920         /* wait till current packet DMA finishes, and fifo empties */
 921         if (ep->bEndpointAddress & USB_DIR_IN) {
 922                 UDC_TXDMA_CFG_REG = (UDC_TXDMA_CFG_REG & ~mask) | UDC_DMA_REQ;
 923
 924                 if (req) {
 925                         finish_in_dma(ep, req, -ECONNRESET);
 926
 927                         /* clear FIFO; hosts probably won't empty it */
 928                         use_ep(ep, UDC_EP_SEL);
 929                         UDC_CTRL_REG = UDC_CLR_EP;
 930                         deselect_ep();
 931                 }
 932                 while (UDC_TXDMA_CFG_REG & mask)
 933                         udelay(10);
 934         } else {
 935                 UDC_RXDMA_CFG_REG = (UDC_RXDMA_CFG_REG & ~mask) | UDC_DMA_REQ;
 936
 937                 /* dma empties the fifo */
 938                 while (UDC_RXDMA_CFG_REG & mask)
 939                         udelay(10);
 940                 if (req)
 941                         finish_out_dma(ep, req, -ECONNRESET, 0);
 942         }
 943         omap_free_dma(ep->lch);
 944         ep->dma_channel = 0;
 945         ep->lch = -1;
 946         /* has_dma still set, till endpoint is fully quiesced */
 947 }
 948
 949
 950 /*-------------------------------------------------------------------------*/
 951
 952 static int
 953 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 954 {
 955         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 956         struct omap_req *req = container_of(_req, struct omap_req, req);
 957         struct omap_udc *udc;
 958         unsigned long   flags;
 959         int             is_iso = 0;
 960
 961         /* catch various bogus parameters */
 962         if (!_req || !req->req.complete || !req->req.buf
 963                         || !list_empty(&req->queue)) {
 964                 DBG("%s, bad params\n", __FUNCTION__);
 965                 return -EINVAL;
 966         }
 967         if (!_ep || (!ep->desc && ep->bEndpointAddress)) {
 968                 DBG("%s, bad ep\n", __FUNCTION__);
 969                 return -EINVAL;
 970         }
 971         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 972                 if (req->req.length > ep->ep.maxpacket)
 973                         return -EMSGSIZE;
 974                 is_iso = 1;
 975         }
 976
 977         /* this isn't bogus, but OMAP DMA isn't the only hardware to
 978          * have a hard time with partial packet reads...  reject it.
 979          */
 980         if (use_dma
 981                         && ep->has_dma
 982                         && ep->bEndpointAddress != 0
 983                         && (ep->bEndpointAddress & USB_DIR_IN) == 0
 984                         && (req->req.length % ep->ep.maxpacket) != 0) {
 985                 DBG("%s, no partial packet OUT reads\n", __FUNCTION__);
 986                 return -EMSGSIZE;
 987         }
 988
 989         udc = ep->udc;
 990         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 991                 return -ESHUTDOWN;
 992
 993         if (use_dma && ep->has_dma) {
 994                 if (req->req.dma == DMA_ADDR_INVALID) {
 995                         req->req.dma = dma_map_single(
 996                                 ep->udc->gadget.dev.parent,
 997                                 req->req.buf,
 998                                 req->req.length,
 999                                 (ep->bEndpointAddress & USB_DIR_IN)
1000                                         ? DMA_TO_DEVICE
1001                                         : DMA_FROM_DEVICE);
1002                         req->mapped = 1;
1003                 } else {
1004                         dma_sync_single_for_device(
1005                                 ep->udc->gadget.dev.parent,
1006                                 req->req.dma, req->req.length,
1007                                 (ep->bEndpointAddress & USB_DIR_IN)
1008                                         ? DMA_TO_DEVICE
1009                                         : DMA_FROM_DEVICE);
1010                         req->mapped = 0;
1011                 }
1012         }
1013
1014         VDBG("%s queue req %p, len %d buf %p\n",
1015                 ep->ep.name, _req, _req->length, _req->buf);
1016
1017         spin_lock_irqsave(&udc->lock, flags);
1018
1019         req->req.status = -EINPROGRESS;
1020         req->req.actual = 0;
1021
1022         /* maybe kickstart non-iso i/o queues */
1023         if (is_iso)
1024                 UDC_IRQ_EN_REG |= UDC_SOF_IE;
1025         else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
1026                 int     is_in;
1027
1028                 if (ep->bEndpointAddress == 0) {
1029                         if (!udc->ep0_pending || !list_empty (&ep->queue)) {
1030                                 spin_unlock_irqrestore(&udc->lock, flags);
1031                                 return -EL2HLT;
1032                         }
1033
1034                         /* empty DATA stage? */
1035                         is_in = udc->ep0_in;
1036                         if (!req->req.length) {
1037
1038                                 /* chip became CONFIGURED or ADDRESSED
1039                                  * earlier; drivers may already have queued
1040                                  * requests to non-control endpoints
1041                                  */
1042                                 if (udc->ep0_set_config) {
1043                                         u16     irq_en = UDC_IRQ_EN_REG;
1044
1045                                         irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
1046                                         if (!udc->ep0_reset_config)
1047                                                 irq_en |= UDC_EPN_RX_IE
1048                                                         | UDC_EPN_TX_IE;
1049                                         UDC_IRQ_EN_REG = irq_en;
1050                                 }
1051
1052                                 /* STATUS for zero length DATA stages is
1053                                  * always an IN ... even for IN transfers,
1054                                  * a wierd case which seem to stall OMAP.
1055                                  */
1056                                 UDC_EP_NUM_REG = (UDC_EP_SEL|UDC_EP_DIR);
1057                                 UDC_CTRL_REG = UDC_CLR_EP;
1058                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1059                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1060
1061                                 /* cleanup */
1062                                 udc->ep0_pending = 0;
1063                                 done(ep, req, 0);
1064                                 req = NULL;
1065
1066                         /* non-empty DATA stage */
1067                         } else if (is_in) {
1068                                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1069                         } else {
1070                                 if (udc->ep0_setup)
1071                                         goto irq_wait;
1072                                 UDC_EP_NUM_REG = UDC_EP_SEL;
1073                         }
1074                 } else {
1075                         is_in = ep->bEndpointAddress & USB_DIR_IN;
1076                         if (!ep->has_dma)
1077                                 use_ep(ep, UDC_EP_SEL);
1078                         /* if ISO: SOF IRQs must be enabled/disabled! */
1079                 }
1080
1081                 if (ep->has_dma)
1082                         (is_in ? next_in_dma : next_out_dma)(ep, req);
1083                 else if (req) {
1084                         if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
1085                                 req = NULL;
1086                         deselect_ep();
1087                         if (!is_in) {
1088                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1089                                 ep->ackwait = 1 + ep->double_buf;
1090                         }
1091                         /* IN: 6 wait states before it'll tx */
1092                 }
1093         }
1094
1095 irq_wait:
1096         /* irq handler advances the queue */
1097         if (req != NULL)
1098                 list_add_tail(&req->queue, &ep->queue);
1099         spin_unlock_irqrestore(&udc->lock, flags);
1100
1101         return 0;
1102 }
1103
1104 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1105 {
1106         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1107         struct omap_req *req;
1108         unsigned long   flags;
1109
1110         if (!_ep || !_req)
1111                 return -EINVAL;
1112
1113         spin_lock_irqsave(&ep->udc->lock, flags);
1114
1115         /* make sure it's actually queued on this endpoint */
1116         list_for_each_entry (req, &ep->queue, queue) {
1117                 if (&req->req == _req)
1118                         break;
1119         }
1120         if (&req->req != _req) {
1121                 spin_unlock_irqrestore(&ep->udc->lock, flags);
1122                 return -EINVAL;
1123         }
1124
1125         if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1126                 int channel = ep->dma_channel;
1127
1128                 /* releasing the channel cancels the request,
1129                  * reclaiming the channel restarts the queue
1130                  */
1131                 dma_channel_release(ep);
1132                 dma_channel_claim(ep, channel);
1133         } else
1134                 done(ep, req, -ECONNRESET);
1135         spin_unlock_irqrestore(&ep->udc->lock, flags);
1136         return 0;
1137 }
1138
1139 /*-------------------------------------------------------------------------*/
1140
1141 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1142 {
1143         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1144         unsigned long   flags;
1145         int             status = -EOPNOTSUPP;
1146
1147         spin_lock_irqsave(&ep->udc->lock, flags);
1148
1149         /* just use protocol stalls for ep0; real halts are annoying */
1150         if (ep->bEndpointAddress == 0) {
1151                 if (!ep->udc->ep0_pending)
1152                         status = -EINVAL;
1153                 else if (value) {
1154                         if (ep->udc->ep0_set_config) {
1155                                 WARN("error changing config?\n");
1156                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1157                         }
1158                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1159                         ep->udc->ep0_pending = 0;
1160                         status = 0;
1161                 } else /* NOP */
1162                         status = 0;
1163
1164         /* otherwise, all active non-ISO endpoints can halt */
1165         } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->desc) {
1166
1167                 /* IN endpoints must already be idle */
1168                 if ((ep->bEndpointAddress & USB_DIR_IN)
1169                                 && !list_empty(&ep->queue)) {
1170                         status = -EAGAIN;
1171                         goto done;
1172                 }
1173
1174                 if (value) {
1175                         int     channel;
1176
1177                         if (use_dma && ep->dma_channel
1178                                         && !list_empty(&ep->queue)) {
1179                                 channel = ep->dma_channel;
1180                                 dma_channel_release(ep);
1181                         } else
1182                                 channel = 0;
1183
1184                         use_ep(ep, UDC_EP_SEL);
1185                         if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) {
1186                                 UDC_CTRL_REG = UDC_SET_HALT;
1187                                 status = 0;
1188                         } else
1189                                 status = -EAGAIN;
1190                         deselect_ep();
1191
1192                         if (channel)
1193                                 dma_channel_claim(ep, channel);
1194                 } else {
1195                         use_ep(ep, 0);
1196                         UDC_CTRL_REG = ep->udc->clr_halt;
1197                         ep->ackwait = 0;
1198                         if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1199                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1200                                 ep->ackwait = 1 + ep->double_buf;
1201                         }
1202                 }
1203         }
1204 done:
1205         VDBG("%s %s halt stat %d\n", ep->ep.name,
1206                 value ? "set" : "clear", status);
1207
1208         spin_unlock_irqrestore(&ep->udc->lock, flags);
1209         return status;
1210 }
1211
1212 static struct usb_ep_ops omap_ep_ops = {
1213         .enable         = omap_ep_enable,
1214         .disable        = omap_ep_disable,
1215
1216         .alloc_request  = omap_alloc_request,
1217         .free_request   = omap_free_request,
1218
1219         .alloc_buffer   = omap_alloc_buffer,
1220         .free_buffer    = omap_free_buffer,
1221
1222         .queue          = omap_ep_queue,
1223         .dequeue        = omap_ep_dequeue,
1224
1225         .set_halt       = omap_ep_set_halt,
1226         // fifo_status ... report bytes in fifo
1227         // fifo_flush ... flush fifo
1228 };
1229
1230 /*-------------------------------------------------------------------------*/
1231
1232 static int omap_get_frame(struct usb_gadget *gadget)
1233 {
1234         u16     sof = UDC_SOF_REG;
1235         return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1236 }
1237
1238 static int omap_wakeup(struct usb_gadget *gadget)
1239 {
1240         struct omap_udc *udc;
1241         unsigned long   flags;
1242         int             retval = -EHOSTUNREACH;
1243
1244         udc = container_of(gadget, struct omap_udc, gadget);
1245
1246         spin_lock_irqsave(&udc->lock, flags);
1247         if (udc->devstat & UDC_SUS) {
1248                 /* NOTE:  OTG spec erratum says that OTG devices may
1249                  * issue wakeups without host enable.
1250                  */
1251                 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1252                         DBG("remote wakeup...\n");
1253                         UDC_SYSCON2_REG = UDC_RMT_WKP;
1254                         retval = 0;
1255                 }
1256
1257         /* NOTE:  non-OTG systems may use SRP TOO... */
1258         } else if (!(udc->devstat & UDC_ATT)) {
1259                 if (udc->transceiver)
1260                         retval = otg_start_srp(udc->transceiver);
1261         }
1262         spin_unlock_irqrestore(&udc->lock, flags);
1263
1264         return retval;
1265 }
1266
1267 static int
1268 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1269 {
1270         struct omap_udc *udc;
1271         unsigned long   flags;
1272         u16             syscon1;
1273
1274         udc = container_of(gadget, struct omap_udc, gadget);
1275         spin_lock_irqsave(&udc->lock, flags);
1276         syscon1 = UDC_SYSCON1_REG;
1277         if (is_selfpowered)
1278                 syscon1 |= UDC_SELF_PWR;
1279         else
1280                 syscon1 &= ~UDC_SELF_PWR;
1281         UDC_SYSCON1_REG = syscon1;
1282         spin_unlock_irqrestore(&udc->lock, flags);
1283
1284         return 0;
1285 }
1286
1287 static int can_pullup(struct omap_udc *udc)
1288 {
1289         return udc->driver && udc->softconnect && udc->vbus_active;
1290 }
1291
1292 static void pullup_enable(struct omap_udc *udc)
1293 {
1294         udc->gadget.dev.parent->power.power_state = PMSG_ON;
1295         udc->gadget.dev.power.power_state = PMSG_ON;
1296         UDC_SYSCON1_REG |= UDC_PULLUP_EN;
1297 #ifndef CONFIG_USB_OTG
1298         if (!cpu_is_omap15xx())
1299                 OTG_CTRL_REG |= OTG_BSESSVLD;
1300 #endif
1301         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1302 }
1303
1304 static void pullup_disable(struct omap_udc *udc)
1305 {
1306 #ifndef CONFIG_USB_OTG
1307         if (!cpu_is_omap15xx())
1308                 OTG_CTRL_REG &= ~OTG_BSESSVLD;
1309 #endif
1310         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1311         UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
1312 }
1313
1314 static struct omap_udc *udc;
1315
1316 static void omap_udc_enable_clock(int enable)
1317 {
1318         if (udc == NULL || udc->dc_clk == NULL || udc->hhc_clk == NULL)
1319                 return;
1320
1321         if (enable) {
1322                 clk_enable(udc->dc_clk);
1323                 clk_enable(udc->hhc_clk);
1324                 udelay(100);
1325         } else {
1326                 clk_disable(udc->hhc_clk);
1327                 clk_disable(udc->dc_clk);
1328         }
1329 }
1330
1331 /*
1332  * Called by whatever detects VBUS sessions:  external transceiver
1333  * driver, or maybe GPIO0 VBUS IRQ.  May request 48 MHz clock.
1334  */
1335 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1336 {
1337         struct omap_udc *udc;
1338         unsigned long   flags;
1339
1340         udc = container_of(gadget, struct omap_udc, gadget);
1341         spin_lock_irqsave(&udc->lock, flags);
1342         VDBG("VBUS %s\n", is_active ? "on" : "off");
1343         udc->vbus_active = (is_active != 0);
1344         if (cpu_is_omap15xx()) {
1345                 /* "software" detect, ignored if !VBUS_MODE_1510 */
1346                 if (is_active)
1347                         FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510;
1348                 else
1349                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
1350         }
1351         if (udc->dc_clk != NULL && is_active) {
1352                 if (!udc->clk_requested) {
1353                         omap_udc_enable_clock(1);
1354                         udc->clk_requested = 1;
1355                 }
1356         }
1357         if (can_pullup(udc))
1358                 pullup_enable(udc);
1359         else
1360                 pullup_disable(udc);
1361         if (udc->dc_clk != NULL && !is_active) {
1362                 if (udc->clk_requested) {
1363                         omap_udc_enable_clock(0);
1364                         udc->clk_requested = 0;
1365                 }
1366         }
1367         spin_unlock_irqrestore(&udc->lock, flags);
1368         return 0;
1369 }
1370
1371 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1372 {
1373         struct omap_udc *udc;
1374
1375         udc = container_of(gadget, struct omap_udc, gadget);
1376         if (udc->transceiver)
1377                 return otg_set_power(udc->transceiver, mA);
1378         return -EOPNOTSUPP;
1379 }
1380
1381 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1382 {
1383         struct omap_udc *udc;
1384         unsigned long   flags;
1385
1386         udc = container_of(gadget, struct omap_udc, gadget);
1387         spin_lock_irqsave(&udc->lock, flags);
1388         udc->softconnect = (is_on != 0);
1389         if (can_pullup(udc))
1390                 pullup_enable(udc);
1391         else
1392                 pullup_disable(udc);
1393         spin_unlock_irqrestore(&udc->lock, flags);
1394         return 0;
1395 }
1396
1397 static struct usb_gadget_ops omap_gadget_ops = {
1398         .get_frame              = omap_get_frame,
1399         .wakeup                 = omap_wakeup,
1400         .set_selfpowered        = omap_set_selfpowered,
1401         .vbus_session           = omap_vbus_session,
1402         .vbus_draw              = omap_vbus_draw,
1403         .pullup                 = omap_pullup,
1404 };
1405
1406 /*-------------------------------------------------------------------------*/
1407
1408 /* dequeue ALL requests; caller holds udc->lock */
1409 static void nuke(struct omap_ep *ep, int status)
1410 {
1411         struct omap_req *req;
1412
1413         ep->stopped = 1;
1414
1415         if (use_dma && ep->dma_channel)
1416                 dma_channel_release(ep);
1417
1418         use_ep(ep, 0);
1419         UDC_CTRL_REG = UDC_CLR_EP;
1420         if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1421                 UDC_CTRL_REG = UDC_SET_HALT;
1422
1423         while (!list_empty(&ep->queue)) {
1424                 req = list_entry(ep->queue.next, struct omap_req, queue);
1425                 done(ep, req, status);
1426         }
1427 }
1428
1429 /* caller holds udc->lock */
1430 static void udc_quiesce(struct omap_udc *udc)
1431 {
1432         struct omap_ep  *ep;
1433
1434         udc->gadget.speed = USB_SPEED_UNKNOWN;
1435         nuke(&udc->ep[0], -ESHUTDOWN);
1436         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list)
1437                 nuke(ep, -ESHUTDOWN);
1438 }
1439
1440 /*-------------------------------------------------------------------------*/
1441
1442 static void update_otg(struct omap_udc *udc)
1443 {
1444         u16     devstat;
1445
1446         if (!udc->gadget.is_otg)
1447                 return;
1448
1449         if (OTG_CTRL_REG & OTG_ID)
1450                 devstat = UDC_DEVSTAT_REG;
1451         else
1452                 devstat = 0;
1453
1454         udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1455         udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1456         udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1457
1458         /* Enable HNP early, avoiding races on suspend irq path.
1459          * ASSUMES OTG state machine B_BUS_REQ input is true.
1460          */
1461         if (udc->gadget.b_hnp_enable)
1462                 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ)
1463                                 & ~OTG_PULLUP;
1464 }
1465
1466 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1467 {
1468         struct omap_ep  *ep0 = &udc->ep[0];
1469         struct omap_req *req = NULL;
1470
1471         ep0->irqs++;
1472
1473         /* Clear any pending requests and then scrub any rx/tx state
1474          * before starting to handle the SETUP request.
1475          */
1476         if (irq_src & UDC_SETUP) {
1477                 u16     ack = irq_src & (UDC_EP0_TX|UDC_EP0_RX);
1478
1479                 nuke(ep0, 0);
1480                 if (ack) {
1481                         UDC_IRQ_SRC_REG = ack;
1482                         irq_src = UDC_SETUP;
1483                 }
1484         }
1485
1486         /* IN/OUT packets mean we're in the DATA or STATUS stage.
1487          * This driver uses only uses protocol stalls (ep0 never halts),
1488          * and if we got this far the gadget driver already had a
1489          * chance to stall.  Tries to be forgiving of host oddities.
1490          *
1491          * NOTE:  the last chance gadget drivers have to stall control
1492          * requests is during their request completion callback.
1493          */
1494         if (!list_empty(&ep0->queue))
1495                 req = container_of(ep0->queue.next, struct omap_req, queue);
1496
1497         /* IN == TX to host */
1498         if (irq_src & UDC_EP0_TX) {
1499                 int     stat;
1500
1501                 UDC_IRQ_SRC_REG = UDC_EP0_TX;
1502                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1503                 stat = UDC_STAT_FLG_REG;
1504                 if (stat & UDC_ACK) {
1505                         if (udc->ep0_in) {
1506                                 /* write next IN packet from response,
1507                                  * or set up the status stage.
1508                                  */
1509                                 if (req)
1510                                         stat = write_fifo(ep0, req);
1511                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1512                                 if (!req && udc->ep0_pending) {
1513                                         UDC_EP_NUM_REG = UDC_EP_SEL;
1514                                         UDC_CTRL_REG = UDC_CLR_EP;
1515                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1516                                         UDC_EP_NUM_REG = 0;
1517                                         udc->ep0_pending = 0;
1518                                 } /* else:  6 wait states before it'll tx */
1519                         } else {
1520                                 /* ack status stage of OUT transfer */
1521                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1522                                 if (req)
1523                                         done(ep0, req, 0);
1524                         }
1525                         req = NULL;
1526                 } else if (stat & UDC_STALL) {
1527                         UDC_CTRL_REG = UDC_CLR_HALT;
1528                         UDC_EP_NUM_REG = UDC_EP_DIR;
1529                 } else {
1530                         UDC_EP_NUM_REG = UDC_EP_DIR;
1531                 }
1532         }
1533
1534         /* OUT == RX from host */
1535         if (irq_src & UDC_EP0_RX) {
1536                 int     stat;
1537
1538                 UDC_IRQ_SRC_REG = UDC_EP0_RX;
1539                 UDC_EP_NUM_REG = UDC_EP_SEL;
1540                 stat = UDC_STAT_FLG_REG;
1541                 if (stat & UDC_ACK) {
1542                         if (!udc->ep0_in) {
1543                                 stat = 0;
1544                                 /* read next OUT packet of request, maybe
1545                                  * reactiviting the fifo; stall on errors.
1546                                  */
1547                                 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1548                                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1549                                         udc->ep0_pending = 0;
1550                                         stat = 0;
1551                                 } else if (stat == 0)
1552                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1553                                 UDC_EP_NUM_REG = 0;
1554
1555                                 /* activate status stage */
1556                                 if (stat == 1) {
1557                                         done(ep0, req, 0);
1558                                         /* that may have STALLed ep0... */
1559                                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1560                                         UDC_CTRL_REG = UDC_CLR_EP;
1561                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1562                                         UDC_EP_NUM_REG = UDC_EP_DIR;
1563                                         udc->ep0_pending = 0;
1564                                 }
1565                         } else {
1566                                 /* ack status stage of IN transfer */
1567                                 UDC_EP_NUM_REG = 0;
1568                                 if (req)
1569                                         done(ep0, req, 0);
1570                         }
1571                 } else if (stat & UDC_STALL) {
1572                         UDC_CTRL_REG = UDC_CLR_HALT;
1573                         UDC_EP_NUM_REG = 0;
1574                 } else {
1575                         UDC_EP_NUM_REG = 0;
1576                 }
1577         }
1578
1579         /* SETUP starts all control transfers */
1580         if (irq_src & UDC_SETUP) {
1581                 union u {
1582                         u16                     word[4];
1583                         struct usb_ctrlrequest  r;
1584                 } u;
1585                 int                     status = -EINVAL;
1586                 struct omap_ep          *ep;
1587
1588                 /* read the (latest) SETUP message */
1589                 do {
1590                         UDC_EP_NUM_REG = UDC_SETUP_SEL;
1591                         /* two bytes at a time */
1592                         u.word[0] = UDC_DATA_REG;
1593                         u.word[1] = UDC_DATA_REG;
1594                         u.word[2] = UDC_DATA_REG;
1595                         u.word[3] = UDC_DATA_REG;
1596                         UDC_EP_NUM_REG = 0;
1597                 } while (UDC_IRQ_SRC_REG & UDC_SETUP);
1598
1599 #define w_value         le16_to_cpup (&u.r.wValue)
1600 #define w_index         le16_to_cpup (&u.r.wIndex)
1601 #define w_length        le16_to_cpup (&u.r.wLength)
1602
1603                 /* Delegate almost all control requests to the gadget driver,
1604                  * except for a handful of ch9 status/feature requests that
1605                  * hardware doesn't autodecode _and_ the gadget API hides.
1606                  */
1607                 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1608                 udc->ep0_set_config = 0;
1609                 udc->ep0_pending = 1;
1610                 ep0->stopped = 0;
1611                 ep0->ackwait = 0;
1612                 switch (u.r.bRequest) {
1613                 case USB_REQ_SET_CONFIGURATION:
1614                         /* udc needs to know when ep != 0 is valid */
1615                         if (u.r.bRequestType != USB_RECIP_DEVICE)
1616                                 goto delegate;
1617                         if (w_length != 0)
1618                                 goto do_stall;
1619                         udc->ep0_set_config = 1;
1620                         udc->ep0_reset_config = (w_value == 0);
1621                         VDBG("set config %d\n", w_value);
1622
1623                         /* update udc NOW since gadget driver may start
1624                          * queueing requests immediately; clear config
1625                          * later if it fails the request.
1626                          */
1627                         if (udc->ep0_reset_config)
1628                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1629                         else
1630                                 UDC_SYSCON2_REG = UDC_DEV_CFG;
1631                         update_otg(udc);
1632                         goto delegate;
1633                 case USB_REQ_CLEAR_FEATURE:
1634                         /* clear endpoint halt */
1635                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1636                                 goto delegate;
1637                         if (w_value != USB_ENDPOINT_HALT
1638                                         || w_length != 0)
1639                                 goto do_stall;
1640                         ep = &udc->ep[w_index & 0xf];
1641                         if (ep != ep0) {
1642                                 if (w_index & USB_DIR_IN)
1643                                         ep += 16;
1644                                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1645                                                 || !ep->desc)
1646                                         goto do_stall;
1647                                 use_ep(ep, 0);
1648                                 UDC_CTRL_REG = udc->clr_halt;
1649                                 ep->ackwait = 0;
1650                                 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1651                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1652                                         ep->ackwait = 1 + ep->double_buf;
1653                                 }
1654                                 /* NOTE:  assumes the host behaves sanely,
1655                                  * only clearing real halts.  Else we may
1656                                  * need to kill pending transfers and then
1657                                  * restart the queue... very messy for DMA!
1658                                  */
1659                         }
1660                         VDBG("%s halt cleared by host\n", ep->name);
1661                         goto ep0out_status_stage;
1662                 case USB_REQ_SET_FEATURE:
1663                         /* set endpoint halt */
1664                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1665                                 goto delegate;
1666                         if (w_value != USB_ENDPOINT_HALT
1667                                         || w_length != 0)
1668                                 goto do_stall;
1669                         ep = &udc->ep[w_index & 0xf];
1670                         if (w_index & USB_DIR_IN)
1671                                 ep += 16;
1672                         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1673                                         || ep == ep0 || !ep->desc)
1674                                 goto do_stall;
1675                         if (use_dma && ep->has_dma) {
1676                                 /* this has rude side-effects (aborts) and
1677                                  * can't really work if DMA-IN is active
1678                                  */
1679                                 DBG("%s host set_halt, NYET \n", ep->name);
1680                                 goto do_stall;
1681                         }
1682                         use_ep(ep, 0);
1683                         /* can't halt if fifo isn't empty... */
1684                         UDC_CTRL_REG = UDC_CLR_EP;
1685                         UDC_CTRL_REG = UDC_SET_HALT;
1686                         VDBG("%s halted by host\n", ep->name);
1687 ep0out_status_stage:
1688                         status = 0;
1689                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1690                         UDC_CTRL_REG = UDC_CLR_EP;
1691                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1692                         UDC_EP_NUM_REG = UDC_EP_DIR;
1693                         udc->ep0_pending = 0;
1694                         break;
1695                 case USB_REQ_GET_STATUS:
1696                         /* return interface status.  if we were pedantic,
1697                          * we'd detect non-existent interfaces, and stall.
1698                          */
1699                         if (u.r.bRequestType
1700                                         != (USB_DIR_IN|USB_RECIP_INTERFACE))
1701                                 goto delegate;
1702                         /* return two zero bytes */
1703                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1704                         UDC_DATA_REG = 0;
1705                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1706                         UDC_EP_NUM_REG = UDC_EP_DIR;
1707                         status = 0;
1708                         VDBG("GET_STATUS, interface %d\n", w_index);
1709                         /* next, status stage */
1710                         break;
1711                 default:
1712 delegate:
1713                         /* activate the ep0out fifo right away */
1714                         if (!udc->ep0_in && w_length) {
1715                                 UDC_EP_NUM_REG = 0;
1716                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1717                         }
1718
1719                         /* gadget drivers see class/vendor specific requests,
1720                          * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1721                          * and more
1722                          */
1723                         VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1724                                 u.r.bRequestType, u.r.bRequest,
1725                                 w_value, w_index, w_length);
1726
1727 #undef  w_value
1728 #undef  w_index
1729 #undef  w_length
1730
1731                         /* The gadget driver may return an error here,
1732                          * causing an immediate protocol stall.
1733                          *
1734                          * Else it must issue a response, either queueing a
1735                          * response buffer for the DATA stage, or halting ep0
1736                          * (causing a protocol stall, not a real halt).  A
1737                          * zero length buffer means no DATA stage.
1738                          *
1739                          * It's fine to issue that response after the setup()
1740                          * call returns, and this IRQ was handled.
1741                          */
1742                         udc->ep0_setup = 1;
1743                         spin_unlock(&udc->lock);
1744                         status = udc->driver->setup (&udc->gadget, &u.r);
1745                         spin_lock(&udc->lock);
1746                         udc->ep0_setup = 0;
1747                 }
1748
1749                 if (status < 0) {
1750 do_stall:
1751                         VDBG("req %02x.%02x protocol STALL; stat %d\n",
1752                                         u.r.bRequestType, u.r.bRequest, status);
1753                         if (udc->ep0_set_config) {
1754                                 if (udc->ep0_reset_config)
1755                                         WARN("error resetting config?\n");
1756                                 else
1757                                         UDC_SYSCON2_REG = UDC_CLR_CFG;
1758                         }
1759                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1760                         udc->ep0_pending = 0;
1761                 }
1762         }
1763 }
1764
1765 /*-------------------------------------------------------------------------*/
1766
1767 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1768
1769 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1770 {
1771         u16     devstat, change;
1772
1773         devstat = UDC_DEVSTAT_REG;
1774         change = devstat ^ udc->devstat;
1775         udc->devstat = devstat;
1776
1777         if (change & (UDC_USB_RESET|UDC_ATT)) {
1778                 udc_quiesce(udc);
1779
1780                 if (change & UDC_ATT) {
1781                         /* driver for any external transceiver will
1782                          * have called omap_vbus_session() already
1783                          */
1784                         if (devstat & UDC_ATT) {
1785                                 udc->gadget.speed = USB_SPEED_FULL;
1786                                 VDBG("connect\n");
1787                                 if (!udc->transceiver)
1788                                         pullup_enable(udc);
1789                                 // if (driver->connect) call it
1790                         } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1791                                 udc->gadget.speed = USB_SPEED_UNKNOWN;
1792                                 if (!udc->transceiver)
1793                                         pullup_disable(udc);
1794                                 DBG("disconnect, gadget %s\n",
1795                                         udc->driver->driver.name);
1796                                 if (udc->driver->disconnect) {
1797                                         spin_unlock(&udc->lock);
1798                                         udc->driver->disconnect(&udc->gadget);
1799                                         spin_lock(&udc->lock);
1800                                 }
1801                         }
1802                         change &= ~UDC_ATT;
1803                 }
1804
1805                 if (change & UDC_USB_RESET) {
1806                         if (devstat & UDC_USB_RESET) {
1807                                 VDBG("RESET=1\n");
1808                         } else {
1809                                 udc->gadget.speed = USB_SPEED_FULL;
1810                                 INFO("USB reset done, gadget %s\n",
1811                                         udc->driver->driver.name);
1812                                 /* ep0 traffic is legal from now on */
1813                                 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE;
1814                         }
1815                         change &= ~UDC_USB_RESET;
1816                 }
1817         }
1818         if (change & UDC_SUS) {
1819                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1820                         // FIXME tell isp1301 to suspend/resume (?)
1821                         if (devstat & UDC_SUS) {
1822                                 VDBG("suspend\n");
1823                                 update_otg(udc);
1824                                 /* HNP could be under way already */
1825                                 if (udc->gadget.speed == USB_SPEED_FULL
1826                                                 && udc->driver->suspend) {
1827                                         spin_unlock(&udc->lock);
1828                                         udc->driver->suspend(&udc->gadget);
1829                                         spin_lock(&udc->lock);
1830                                 }
1831                                 if (udc->transceiver)
1832                                         otg_set_suspend(udc->transceiver, 1);
1833                         } else {
1834                                 VDBG("resume\n");
1835                                 if (udc->transceiver)
1836                                         otg_set_suspend(udc->transceiver, 0);
1837                                 if (udc->gadget.speed == USB_SPEED_FULL
1838                                                 && udc->driver->resume) {
1839                                         spin_unlock(&udc->lock);
1840                                         udc->driver->resume(&udc->gadget);
1841                                         spin_lock(&udc->lock);
1842                                 }
1843                         }
1844                 }
1845                 change &= ~UDC_SUS;
1846         }
1847         if (!cpu_is_omap15xx() && (change & OTG_FLAGS)) {
1848                 update_otg(udc);
1849                 change &= ~OTG_FLAGS;
1850         }
1851
1852         change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1853         if (change)
1854                 VDBG("devstat %03x, ignore change %03x\n",
1855                         devstat,  change);
1856
1857         UDC_IRQ_SRC_REG = UDC_DS_CHG;
1858 }
1859
1860 static irqreturn_t
1861 omap_udc_irq(int irq, void *_udc, struct pt_regs *r)
1862 {
1863         struct omap_udc *udc = _udc;
1864         u16             irq_src;
1865         irqreturn_t     status = IRQ_NONE;
1866         unsigned long   flags;
1867
1868         spin_lock_irqsave(&udc->lock, flags);
1869         irq_src = UDC_IRQ_SRC_REG;
1870
1871         /* Device state change (usb ch9 stuff) */
1872         if (irq_src & UDC_DS_CHG) {
1873                 devstate_irq(_udc, irq_src);
1874                 status = IRQ_HANDLED;
1875                 irq_src &= ~UDC_DS_CHG;
1876         }
1877
1878         /* EP0 control transfers */
1879         if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1880                 ep0_irq(_udc, irq_src);
1881                 status = IRQ_HANDLED;
1882                 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1883         }
1884
1885         /* DMA transfer completion */
1886         if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1887                 dma_irq(_udc, irq_src);
1888                 status = IRQ_HANDLED;
1889                 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1890         }
1891
1892         irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX);
1893         if (irq_src)
1894                 DBG("udc_irq, unhandled %03x\n", irq_src);
1895         spin_unlock_irqrestore(&udc->lock, flags);
1896
1897         return status;
1898 }
1899
1900 /* workaround for seemingly-lost IRQs for RX ACKs... */
1901 #define PIO_OUT_TIMEOUT (jiffies + HZ/3)
1902 #define HALF_FULL(f)    (!((f)&(UDC_NON_ISO_FIFO_FULL|UDC_NON_ISO_FIFO_EMPTY)))
1903
1904 static void pio_out_timer(unsigned long _ep)
1905 {
1906         struct omap_ep  *ep = (void *) _ep;
1907         unsigned long   flags;
1908         u16             stat_flg;
1909
1910         spin_lock_irqsave(&ep->udc->lock, flags);
1911         if (!list_empty(&ep->queue) && ep->ackwait) {
1912                 use_ep(ep, UDC_EP_SEL);
1913                 stat_flg = UDC_STAT_FLG_REG;
1914
1915                 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1916                                 || (ep->double_buf && HALF_FULL(stat_flg)))) {
1917                         struct omap_req *req;
1918
1919                         VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
1920                         req = container_of(ep->queue.next,
1921                                         struct omap_req, queue);
1922                         (void) read_fifo(ep, req);
1923                         UDC_EP_NUM_REG = ep->bEndpointAddress;
1924                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1925                         ep->ackwait = 1 + ep->double_buf;
1926                 }
1927                 else {
1928                     deselect_ep();
1929                 }
1930         }
1931         mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1932         spin_unlock_irqrestore(&ep->udc->lock, flags);
1933 }
1934
1935 static irqreturn_t
1936 omap_udc_pio_irq(int irq, void *_dev, struct pt_regs *r)
1937 {
1938         u16             epn_stat, irq_src;
1939         irqreturn_t     status = IRQ_NONE;
1940         struct omap_ep  *ep;
1941         int             epnum;
1942         struct omap_udc *udc = _dev;
1943         struct omap_req *req;
1944         unsigned long   flags;
1945
1946         spin_lock_irqsave(&udc->lock, flags);
1947         epn_stat = UDC_EPN_STAT_REG;
1948         irq_src = UDC_IRQ_SRC_REG;
1949
1950         /* handle OUT first, to avoid some wasteful NAKs */
1951         if (irq_src & UDC_EPN_RX) {
1952                 epnum = (epn_stat >> 8) & 0x0f;
1953                 UDC_IRQ_SRC_REG = UDC_EPN_RX;
1954                 status = IRQ_HANDLED;
1955                 ep = &udc->ep[epnum];
1956                 ep->irqs++;
1957
1958                 UDC_EP_NUM_REG = epnum | UDC_EP_SEL;
1959                 ep->fnf = 0;
1960                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1961                         ep->ackwait--;
1962                         if (!list_empty(&ep->queue)) {
1963                                 int stat;
1964                                 req = container_of(ep->queue.next,
1965                                                 struct omap_req, queue);
1966                                 stat = read_fifo(ep, req);
1967                                 if (!ep->double_buf)
1968                                         ep->fnf = 1;
1969                         }
1970                 }
1971                 /* min 6 clock delay before clearing EP_SEL ... */
1972                 epn_stat = UDC_EPN_STAT_REG;
1973                 epn_stat = UDC_EPN_STAT_REG;
1974                 UDC_EP_NUM_REG = epnum;
1975
1976                 /* enabling fifo _after_ clearing ACK, contrary to docs,
1977                  * reduces lossage; timer still needed though (sigh).
1978                  */
1979                 if (ep->fnf) {
1980                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1981                         ep->ackwait = 1 + ep->double_buf;
1982                 }
1983                 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1984         }
1985
1986         /* then IN transfers */
1987         else if (irq_src & UDC_EPN_TX) {
1988                 epnum = epn_stat & 0x0f;
1989                 UDC_IRQ_SRC_REG = UDC_EPN_TX;
1990                 status = IRQ_HANDLED;
1991                 ep = &udc->ep[16 + epnum];
1992                 ep->irqs++;
1993
1994                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL;
1995                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1996                         ep->ackwait = 0;
1997                         if (!list_empty(&ep->queue)) {
1998                                 req = container_of(ep->queue.next,
1999                                                 struct omap_req, queue);
2000                                 (void) write_fifo(ep, req);
2001                         }
2002                 }
2003                 /* min 6 clock delay before clearing EP_SEL ... */
2004                 epn_stat = UDC_EPN_STAT_REG;
2005                 epn_stat = UDC_EPN_STAT_REG;
2006                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR;
2007                 /* then 6 clocks before it'd tx */
2008         }
2009
2010         spin_unlock_irqrestore(&udc->lock, flags);
2011         return status;
2012 }
2013
2014 #ifdef  USE_ISO
2015 static irqreturn_t
2016 omap_udc_iso_irq(int irq, void *_dev, struct pt_regs *r)
2017 {
2018         struct omap_udc *udc = _dev;
2019         struct omap_ep  *ep;
2020         int             pending = 0;
2021         unsigned long   flags;
2022
2023         spin_lock_irqsave(&udc->lock, flags);
2024
2025         /* handle all non-DMA ISO transfers */
2026         list_for_each_entry (ep, &udc->iso, iso) {
2027                 u16             stat;
2028                 struct omap_req *req;
2029
2030                 if (ep->has_dma || list_empty(&ep->queue))
2031                         continue;
2032                 req = list_entry(ep->queue.next, struct omap_req, queue);
2033
2034                 use_ep(ep, UDC_EP_SEL);
2035                 stat = UDC_STAT_FLG_REG;
2036
2037                 /* NOTE: like the other controller drivers, this isn't
2038                  * currently reporting lost or damaged frames.
2039                  */
2040                 if (ep->bEndpointAddress & USB_DIR_IN) {
2041                         if (stat & UDC_MISS_IN)
2042                                 /* done(ep, req, -EPROTO) */;
2043                         else
2044                                 write_fifo(ep, req);
2045                 } else {
2046                         int     status = 0;
2047
2048                         if (stat & UDC_NO_RXPACKET)
2049                                 status = -EREMOTEIO;
2050                         else if (stat & UDC_ISO_ERR)
2051                                 status = -EILSEQ;
2052                         else if (stat & UDC_DATA_FLUSH)
2053                                 status = -ENOSR;
2054
2055                         if (status)
2056                                 /* done(ep, req, status) */;
2057                         else
2058                                 read_fifo(ep, req);
2059                 }
2060                 deselect_ep();
2061                 /* 6 wait states before next EP */
2062
2063                 ep->irqs++;
2064                 if (!list_empty(&ep->queue))
2065                         pending = 1;
2066         }
2067         if (!pending)
2068                 UDC_IRQ_EN_REG &= ~UDC_SOF_IE;
2069         UDC_IRQ_SRC_REG = UDC_SOF;
2070
2071         spin_unlock_irqrestore(&udc->lock, flags);
2072         return IRQ_HANDLED;
2073 }
2074 #endif
2075
2076 /*-------------------------------------------------------------------------*/
2077
2078
2079 int usb_gadget_register_driver (struct usb_gadget_driver *driver)
2080 {
2081         int             status = -ENODEV;
2082         struct omap_ep  *ep;
2083         unsigned long   flags;
2084
2085         /* basic sanity tests */
2086         if (!udc)
2087                 return -ENODEV;
2088         if (!driver
2089                         // FIXME if otg, check:  driver->is_otg
2090                         || driver->speed < USB_SPEED_FULL
2091                         || !driver->bind
2092                         || !driver->unbind
2093                         || !driver->setup)
2094                 return -EINVAL;
2095
2096         spin_lock_irqsave(&udc->lock, flags);
2097         if (udc->driver) {
2098                 spin_unlock_irqrestore(&udc->lock, flags);
2099                 return -EBUSY;
2100         }
2101
2102         /* reset state */
2103         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
2104                 ep->irqs = 0;
2105                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2106                         continue;
2107                 use_ep(ep, 0);
2108                 UDC_CTRL_REG = UDC_SET_HALT;
2109         }
2110         udc->ep0_pending = 0;
2111         udc->ep[0].irqs = 0;
2112         udc->softconnect = 1;
2113
2114         /* hook up the driver */
2115         driver->driver.bus = NULL;
2116         udc->driver = driver;
2117         udc->gadget.dev.driver = &driver->driver;
2118         spin_unlock_irqrestore(&udc->lock, flags);
2119
2120         if (udc->dc_clk != NULL)
2121                 omap_udc_enable_clock(1);
2122
2123         status = driver->bind (&udc->gadget);
2124         if (status) {
2125                 DBG("bind to %s --> %d\n", driver->driver.name, status);
2126                 udc->gadget.dev.driver = NULL;
2127                 udc->driver = NULL;
2128                 goto done;
2129         }
2130         DBG("bound to driver %s\n", driver->driver.name);
2131
2132         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2133
2134         /* connect to bus through transceiver */
2135         if (udc->transceiver) {
2136                 status = otg_set_peripheral(udc->transceiver, &udc->gadget);
2137                 if (status < 0) {
2138                         ERR("can't bind to transceiver\n");
2139                         driver->unbind (&udc->gadget);
2140                         udc->gadget.dev.driver = NULL;
2141                         udc->driver = NULL;
2142                         goto done;
2143                 }
2144         } else {
2145                 if (can_pullup(udc))
2146                         pullup_enable (udc);
2147                 else
2148                         pullup_disable (udc);
2149         }
2150
2151         /* boards that don't have VBUS sensing can't autogate 48MHz;
2152          * can't enter deep sleep while a gadget driver is active.
2153          */
2154         if (machine_is_omap_innovator() || machine_is_omap_osk() || machine_is_omap_h6300())
2155                 omap_vbus_session(&udc->gadget, 1);
2156
2157 done:
2158         if (udc->dc_clk != NULL)
2159                 omap_udc_enable_clock(0);
2160         return status;
2161 }
2162 EXPORT_SYMBOL(usb_gadget_register_driver);
2163
2164 int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
2165 {
2166         unsigned long   flags;
2167         int             status = -ENODEV;
2168
2169         if (!udc)
2170                 return -ENODEV;
2171         if (!driver || driver != udc->driver)
2172                 return -EINVAL;
2173
2174         if (udc->dc_clk != NULL)
2175                 omap_udc_enable_clock(1);
2176
2177         if (machine_is_omap_innovator() || machine_is_omap_osk() || machine_is_omap_h6300())
2178                 omap_vbus_session(&udc->gadget, 0);
2179
2180         if (udc->transceiver)
2181                 (void) otg_set_peripheral(udc->transceiver, NULL);
2182         else
2183                 pullup_disable(udc);
2184
2185         spin_lock_irqsave(&udc->lock, flags);
2186         udc_quiesce(udc);
2187         spin_unlock_irqrestore(&udc->lock, flags);
2188
2189         driver->unbind(&udc->gadget);
2190         udc->gadget.dev.driver = NULL;
2191         udc->driver = NULL;
2192
2193         if (udc->dc_clk != NULL)
2194                 omap_udc_enable_clock(0);
2195         DBG("unregistered driver '%s'\n", driver->driver.name);
2196         return status;
2197 }
2198 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2199
2200
2201 /*-------------------------------------------------------------------------*/
2202
2203 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2204
2205 #include <linux/seq_file.h>
2206
2207 static const char proc_filename[] = "driver/udc";
2208
2209 #define FOURBITS "%s%s%s%s"
2210 #define EIGHTBITS FOURBITS FOURBITS
2211
2212 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2213 {
2214         u16             stat_flg;
2215         struct omap_req *req;
2216         char            buf[20];
2217
2218         use_ep(ep, 0);
2219
2220         if (use_dma && ep->has_dma)
2221                 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
2222                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
2223                         ep->dma_channel - 1, ep->lch);
2224         else
2225                 buf[0] = 0;
2226
2227         stat_flg = UDC_STAT_FLG_REG;
2228         seq_printf(s,
2229                 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2230                 ep->name, buf,
2231                 ep->double_buf ? "dbuf " : "",
2232                 ({char *s; switch(ep->ackwait){
2233                 case 0: s = ""; break;
2234                 case 1: s = "(ackw) "; break;
2235                 case 2: s = "(ackw2) "; break;
2236                 default: s = "(?) "; break;
2237                 } s;}),
2238                 ep->irqs, stat_flg,
2239                 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2240                 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2241                 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2242                 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2243                 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2244                 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2245                 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2246                 (stat_flg & UDC_STALL) ? "STALL " : "",
2247                 (stat_flg & UDC_NAK) ? "NAK " : "",
2248                 (stat_flg & UDC_ACK) ? "ACK " : "",
2249                 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2250                 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2251                 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2252
2253         if (list_empty (&ep->queue))
2254                 seq_printf(s, "\t(queue empty)\n");
2255         else
2256                 list_for_each_entry (req, &ep->queue, queue) {
2257                         unsigned        length = req->req.actual;
2258
2259                         if (use_dma && buf[0]) {
2260                                 length += ((ep->bEndpointAddress & USB_DIR_IN)
2261                                                 ? dma_src_len : dma_dest_len)
2262                                         (ep, req->req.dma + length);
2263                                 buf[0] = 0;
2264                         }
2265                         seq_printf(s, "\treq %p len %d/%d buf %p\n",
2266                                         &req->req, length,
2267                                         req->req.length, req->req.buf);
2268                 }
2269 }
2270
2271 static char *trx_mode(unsigned m, int enabled)
2272 {
2273         switch (m) {
2274         case 0:         return enabled ? "*6wire" : "unused";
2275         case 1:         return "4wire";
2276         case 2:         return "3wire";
2277         case 3:         return "6wire";
2278         default:        return "unknown";
2279         }
2280 }
2281
2282 static int proc_otg_show(struct seq_file *s)
2283 {
2284         u32             tmp;
2285         u32             trans;
2286
2287         tmp = OTG_REV_REG;
2288         trans = USB_TRANSCEIVER_CTRL_REG;
2289         seq_printf(s, "\nOTG rev %d.%d, transceiver_ctrl %05x\n",
2290                 tmp >> 4, tmp & 0xf, trans);
2291         tmp = OTG_SYSCON_1_REG;
2292         seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2293                         FOURBITS "\n", tmp,
2294                 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2295                 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2296                 (USB0_TRX_MODE(tmp) == 0 && !cpu_is_omap1710())
2297                         ? "internal"
2298                         : trx_mode(USB0_TRX_MODE(tmp), 1),
2299                 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2300                 (tmp & HST_IDLE_EN) ? " !host" : "",
2301                 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2302                 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2303         tmp = OTG_SYSCON_2_REG;
2304         seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2305                         " b_ase_brst=%d hmc=%d\n", tmp,
2306                 (tmp & OTG_EN) ? " otg_en" : "",
2307                 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2308                 // much more SRP stuff
2309                 (tmp & SRP_DATA) ? " srp_data" : "",
2310                 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2311                 (tmp & OTG_PADEN) ? " otg_paden" : "",
2312                 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2313                 (tmp & UHOST_EN) ? " uhost_en" : "",
2314                 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2315                 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2316                 B_ASE_BRST(tmp),
2317                 OTG_HMC(tmp));
2318         tmp = OTG_CTRL_REG;
2319         seq_printf(s, "otg_ctrl    %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2320                 (tmp & OTG_ASESSVLD) ? " asess" : "",
2321                 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2322                 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2323                 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2324                 (tmp & OTG_ID) ? " id" : "",
2325                 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2326                 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2327                 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2328                 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2329                 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2330                 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2331                 (tmp & OTG_PULLDOWN) ? " down" : "",
2332                 (tmp & OTG_PULLUP) ? " up" : "",
2333                 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2334                 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2335                 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2336                 (tmp & OTG_PU_ID) ? " pu_id" : ""
2337                 );
2338         tmp = OTG_IRQ_EN_REG;
2339         seq_printf(s, "otg_irq_en  %04x" "\n", tmp);
2340         tmp = OTG_IRQ_SRC_REG;
2341         seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2342         tmp = OTG_OUTCTRL_REG;
2343         seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2344         tmp = OTG_TEST_REG;
2345         seq_printf(s, "otg_test    %04x" "\n", tmp);
2346         return 0;
2347 }
2348
2349 static int proc_udc_show(struct seq_file *s, void *_)
2350 {
2351         u32             tmp;
2352         struct omap_ep  *ep;
2353         unsigned long   flags;
2354
2355         spin_lock_irqsave(&udc->lock, flags);
2356
2357         seq_printf(s, "%s, version: " DRIVER_VERSION
2358 #ifdef  USE_ISO
2359                 " (iso)"
2360 #endif
2361                 "%s\n",
2362                 driver_desc,
2363                 use_dma ?  " (dma)" : "");
2364
2365         tmp = UDC_REV_REG & 0xff;
2366         seq_printf(s,
2367                 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2368                 "hmc %d, transceiver %s\n",
2369                 tmp >> 4, tmp & 0xf,
2370                 fifo_mode,
2371                 udc->driver ? udc->driver->driver.name : "(none)",
2372                 HMC,
2373                 udc->transceiver ? udc->transceiver->label : "(none)");
2374         seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2375                 __REG16(ULPD_CLOCK_CTRL),
2376                 __REG16(ULPD_SOFT_REQ),
2377                 __REG16(ULPD_STATUS_REQ));
2378
2379         /* OTG controller registers */
2380         if (!cpu_is_omap15xx())
2381                 proc_otg_show(s);
2382
2383         tmp = UDC_SYSCON1_REG;
2384         seq_printf(s, "\nsyscon1     %04x" EIGHTBITS "\n", tmp,
2385                 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2386                 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2387                 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2388                 (tmp & UDC_NAK_EN) ? " nak" : "",
2389                 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2390                 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2391                 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2392                 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2393         // syscon2 is write-only
2394
2395         /* UDC controller registers */
2396         if (!(tmp & UDC_PULLUP_EN)) {
2397                 seq_printf(s, "(suspended)\n");
2398                 spin_unlock_irqrestore(&udc->lock, flags);
2399                 return 0;
2400         }
2401
2402         tmp = UDC_DEVSTAT_REG;
2403         seq_printf(s, "devstat     %04x" EIGHTBITS "%s%s\n", tmp,
2404                 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2405                 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2406                 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2407                 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2408                 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2409                 (tmp & UDC_SUS) ? " SUS" : "",
2410                 (tmp & UDC_CFG) ? " CFG" : "",
2411                 (tmp & UDC_ADD) ? " ADD" : "",
2412                 (tmp & UDC_DEF) ? " DEF" : "",
2413                 (tmp & UDC_ATT) ? " ATT" : "");
2414         seq_printf(s, "sof         %04x\n", UDC_SOF_REG);
2415         tmp = UDC_IRQ_EN_REG;
2416         seq_printf(s, "irq_en      %04x" FOURBITS "%s\n", tmp,
2417                 (tmp & UDC_SOF_IE) ? " sof" : "",
2418                 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2419                 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2420                 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2421                 (tmp & UDC_EP0_IE) ? " ep0" : "");
2422         tmp = UDC_IRQ_SRC_REG;
2423         seq_printf(s, "irq_src     %04x" EIGHTBITS "%s%s\n", tmp,
2424                 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2425                 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2426                 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2427                 (tmp & UDC_SOF) ? " sof" : "",
2428                 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2429                 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2430                 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2431                 (tmp & UDC_SETUP) ? " setup" : "",
2432                 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2433                 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2434         if (use_dma) {
2435                 unsigned i;
2436
2437                 tmp = UDC_DMA_IRQ_EN_REG;
2438                 seq_printf(s, "dma_irq_en  %04x%s" EIGHTBITS "\n", tmp,
2439                         (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2440                         (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2441                         (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2442
2443                         (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2444                         (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2445                         (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2446
2447                         (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2448                         (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2449                         (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2450
2451                 tmp = UDC_RXDMA_CFG_REG;
2452                 seq_printf(s, "rxdma_cfg   %04x\n", tmp);
2453                 if (tmp) {
2454                         for (i = 0; i < 3; i++) {
2455                                 if ((tmp & (0x0f << (i * 4))) == 0)
2456                                         continue;
2457                                 seq_printf(s, "rxdma[%d]    %04x\n", i,
2458                                                 UDC_RXDMA_REG(i + 1));
2459                         }
2460                 }
2461                 tmp = UDC_TXDMA_CFG_REG;
2462                 seq_printf(s, "txdma_cfg   %04x\n", tmp);
2463                 if (tmp) {
2464                         for (i = 0; i < 3; i++) {
2465                                 if (!(tmp & (0x0f << (i * 4))))
2466                                         continue;
2467                                 seq_printf(s, "txdma[%d]    %04x\n", i,
2468                                                 UDC_TXDMA_REG(i + 1));
2469                         }
2470                 }
2471         }
2472
2473         tmp = UDC_DEVSTAT_REG;
2474         if (tmp & UDC_ATT) {
2475                 proc_ep_show(s, &udc->ep[0]);
2476                 if (tmp & UDC_ADD) {
2477                         list_for_each_entry (ep, &udc->gadget.ep_list,
2478                                         ep.ep_list) {
2479                                 if (ep->desc)
2480                                         proc_ep_show(s, ep);
2481                         }
2482                 }
2483         }
2484         spin_unlock_irqrestore(&udc->lock, flags);
2485         return 0;
2486 }
2487
2488 static int proc_udc_open(struct inode *inode, struct file *file)
2489 {
2490         return single_open(file, proc_udc_show, NULL);
2491 }
2492
2493 static struct file_operations proc_ops = {
2494         .open           = proc_udc_open,
2495         .read           = seq_read,
2496         .llseek         = seq_lseek,
2497         .release        = single_release,
2498 };
2499
2500 static void create_proc_file(void)
2501 {
2502         struct proc_dir_entry *pde;
2503
2504         pde = create_proc_entry (proc_filename, 0, NULL);
2505         if (pde)
2506                 pde->proc_fops = &proc_ops;
2507 }
2508
2509 static void remove_proc_file(void)
2510 {
2511         remove_proc_entry(proc_filename, NULL);
2512 }
2513
2514 #else
2515
2516 static inline void create_proc_file(void) {}
2517 static inline void remove_proc_file(void) {}
2518
2519 #endif
2520
2521 /*-------------------------------------------------------------------------*/
2522
2523 /* Before this controller can enumerate, we need to pick an endpoint
2524  * configuration, or "fifo_mode"  That involves allocating 2KB of packet
2525  * buffer space among the endpoints we'll be operating.
2526  *
2527  * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when
2528  * UDC_SYSCON_1_REG.CFG_LOCK is set can now work.  We won't use that
2529  * capability yet though.
2530  */
2531 static unsigned __init
2532 omap_ep_setup(char *name, u8 addr, u8 type,
2533                 unsigned buf, unsigned maxp, int dbuf)
2534 {
2535         struct omap_ep  *ep;
2536         u16             epn_rxtx = 0;
2537
2538         /* OUT endpoints first, then IN */
2539         ep = &udc->ep[addr & 0xf];
2540         if (addr & USB_DIR_IN)
2541                 ep += 16;
2542
2543         /* in case of ep init table bugs */
2544         BUG_ON(ep->name[0]);
2545
2546         /* chip setup ... bit values are same for IN, OUT */
2547         if (type == USB_ENDPOINT_XFER_ISOC) {
2548                 switch (maxp) {
2549                 case 8:         epn_rxtx = 0 << 12; break;
2550                 case 16:        epn_rxtx = 1 << 12; break;
2551                 case 32:        epn_rxtx = 2 << 12; break;
2552                 case 64:        epn_rxtx = 3 << 12; break;
2553                 case 128:       epn_rxtx = 4 << 12; break;
2554                 case 256:       epn_rxtx = 5 << 12; break;
2555                 case 512:       epn_rxtx = 6 << 12; break;
2556                 default:        BUG();
2557                 }
2558                 epn_rxtx |= UDC_EPN_RX_ISO;
2559                 dbuf = 1;
2560         } else {
2561                 /* double-buffering "not supported" on 15xx,
2562                  * and ignored for PIO-IN on 16xx
2563                  */
2564                 if (!use_dma || cpu_is_omap15xx())
2565                         dbuf = 0;
2566
2567                 switch (maxp) {
2568                 case 8:         epn_rxtx = 0 << 12; break;
2569                 case 16:        epn_rxtx = 1 << 12; break;
2570                 case 32:        epn_rxtx = 2 << 12; break;
2571                 case 64:        epn_rxtx = 3 << 12; break;
2572                 default:        BUG();
2573                 }
2574                 if (dbuf && addr)
2575                         epn_rxtx |= UDC_EPN_RX_DB;
2576                 init_timer(&ep->timer);
2577                 ep->timer.function = pio_out_timer;
2578                 ep->timer.data = (unsigned long) ep;
2579         }
2580         if (addr)
2581                 epn_rxtx |= UDC_EPN_RX_VALID;
2582         BUG_ON(buf & 0x07);
2583         epn_rxtx |= buf >> 3;
2584
2585         DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2586                 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2587
2588         if (addr & USB_DIR_IN)
2589                 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx;
2590         else
2591                 UDC_EP_RX_REG(addr) = epn_rxtx;
2592
2593         /* next endpoint's buffer starts after this one's */
2594         buf += maxp;
2595         if (dbuf)
2596                 buf += maxp;
2597         BUG_ON(buf > 2048);
2598
2599         /* set up driver data structures */
2600         BUG_ON(strlen(name) >= sizeof ep->name);
2601         strlcpy(ep->name, name, sizeof ep->name);
2602         INIT_LIST_HEAD(&ep->queue);
2603         INIT_LIST_HEAD(&ep->iso);
2604         ep->bEndpointAddress = addr;
2605         ep->bmAttributes = type;
2606         ep->double_buf = dbuf;
2607         ep->udc = udc;
2608
2609         ep->ep.name = ep->name;
2610         ep->ep.ops = &omap_ep_ops;
2611         ep->ep.maxpacket = ep->maxpacket = maxp;
2612         list_add_tail (&ep->ep.ep_list, &udc->gadget.ep_list);
2613
2614         return buf;
2615 }
2616
2617 static void omap_udc_release(struct device *dev)
2618 {
2619         complete(udc->done);
2620         kfree (udc);
2621         udc = NULL;
2622 }
2623
2624 static int __init
2625 omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2626 {
2627         unsigned        tmp, buf;
2628
2629         /* abolish any previous hardware state */
2630         UDC_SYSCON1_REG = 0;
2631         UDC_IRQ_EN_REG = 0;
2632         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2633         UDC_DMA_IRQ_EN_REG = 0;
2634         UDC_RXDMA_CFG_REG = 0;
2635         UDC_TXDMA_CFG_REG = 0;
2636
2637         /* UDC_PULLUP_EN gates the chip clock */
2638         // OTG_SYSCON_1_REG |= DEV_IDLE_EN;
2639
2640         udc = kmalloc (sizeof *udc, SLAB_KERNEL);
2641         if (!udc)
2642                 return -ENOMEM;
2643
2644         memset(udc, 0, sizeof *udc);
2645         spin_lock_init (&udc->lock);
2646
2647         udc->gadget.ops = &omap_gadget_ops;
2648         udc->gadget.ep0 = &udc->ep[0].ep;
2649         INIT_LIST_HEAD(&udc->gadget.ep_list);
2650         INIT_LIST_HEAD(&udc->iso);
2651         udc->gadget.speed = USB_SPEED_UNKNOWN;
2652         udc->gadget.name = driver_name;
2653
2654         device_initialize(&udc->gadget.dev);
2655         strcpy (udc->gadget.dev.bus_id, "gadget");
2656         udc->gadget.dev.release = omap_udc_release;
2657         udc->gadget.dev.parent = &odev->dev;
2658         if (use_dma)
2659                 udc->gadget.dev.dma_mask = odev->dev.dma_mask;
2660
2661         udc->transceiver = xceiv;
2662
2663         /* ep0 is special; put it right after the SETUP buffer */
2664         buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2665                         8 /* after SETUP */, 64 /* maxpacket */, 0);
2666         list_del_init(&udc->ep[0].ep.ep_list);
2667
2668         /* initially disable all non-ep0 endpoints */
2669         for (tmp = 1; tmp < 15; tmp++) {
2670                 UDC_EP_RX_REG(tmp) = 0;
2671                 UDC_EP_TX_REG(tmp) = 0;
2672         }
2673
2674 #define OMAP_BULK_EP(name,addr) \
2675         buf = omap_ep_setup(name "-bulk", addr, \
2676                         USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2677 #define OMAP_INT_EP(name,addr, maxp) \
2678         buf = omap_ep_setup(name "-int", addr, \
2679                         USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2680 #define OMAP_ISO_EP(name,addr, maxp) \
2681         buf = omap_ep_setup(name "-iso", addr, \
2682                         USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2683
2684         switch (fifo_mode) {
2685         case 0:
2686                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2687                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2688                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2689                 break;
2690         case 1:
2691                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2692                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2693                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2694
2695                 OMAP_BULK_EP("ep3in",  USB_DIR_IN  | 3);
2696                 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2697                 OMAP_INT_EP("ep10in",  USB_DIR_IN  | 10, 16);
2698
2699                 OMAP_BULK_EP("ep5in",  USB_DIR_IN  | 5);
2700                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2701                 OMAP_INT_EP("ep11in",  USB_DIR_IN  | 11, 16);
2702
2703                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2704                 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2705                 OMAP_INT_EP("ep12in",  USB_DIR_IN  | 12, 16);
2706
2707                 OMAP_BULK_EP("ep7in",  USB_DIR_IN  | 7);
2708                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2709                 OMAP_INT_EP("ep13in",  USB_DIR_IN  | 13, 16);
2710                 OMAP_INT_EP("ep13out", USB_DIR_OUT | 13, 16);
2711
2712                 OMAP_BULK_EP("ep8in",  USB_DIR_IN  | 8);
2713                 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2714                 OMAP_INT_EP("ep14in",  USB_DIR_IN  | 14, 16);
2715                 OMAP_INT_EP("ep14out", USB_DIR_OUT | 14, 16);
2716
2717                 OMAP_BULK_EP("ep15in",  USB_DIR_IN  | 15);
2718                 OMAP_BULK_EP("ep15out", USB_DIR_OUT | 15);
2719
2720                 break;
2721
2722 #ifdef  USE_ISO
2723         case 2:                 /* mixed iso/bulk */
2724                 OMAP_ISO_EP("ep1in",   USB_DIR_IN  | 1, 256);
2725                 OMAP_ISO_EP("ep2out",  USB_DIR_OUT | 2, 256);
2726                 OMAP_ISO_EP("ep3in",   USB_DIR_IN  | 3, 128);
2727                 OMAP_ISO_EP("ep4out",  USB_DIR_OUT | 4, 128);
2728
2729                 OMAP_INT_EP("ep5in",   USB_DIR_IN  | 5, 16);
2730
2731                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2732                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2733                 OMAP_INT_EP("ep8in",   USB_DIR_IN  | 8, 16);
2734                 break;
2735         case 3:                 /* mixed bulk/iso */
2736                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2737                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2738                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2739
2740                 OMAP_BULK_EP("ep4in",  USB_DIR_IN  | 4);
2741                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2742                 OMAP_INT_EP("ep6in",   USB_DIR_IN  | 6, 16);
2743
2744                 OMAP_ISO_EP("ep7in",   USB_DIR_IN  | 7, 256);
2745                 OMAP_ISO_EP("ep8out",  USB_DIR_OUT | 8, 256);
2746                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2747                 break;
2748 #endif
2749
2750         /* add more modes as needed */
2751
2752         default:
2753                 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2754                 return -ENODEV;
2755         }
2756         UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR;
2757         INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2758         return 0;
2759 }
2760
2761 static int __init omap_udc_probe(struct platform_device *pdev)
2762 {
2763         int                     status = -ENODEV;
2764         int                     hmc;
2765         struct otg_transceiver  *xceiv = NULL;
2766         const char              *type = NULL;
2767         struct omap_usb_config  *config = pdev->dev.platform_data;
2768         struct clk              *dc_clk;
2769         struct clk              *hhc_clk;
2770
2771         /* NOTE:  "knows" the order of the resources! */
2772         if (!request_mem_region(pdev->resource[0].start,
2773                         pdev->resource[0].end - pdev->resource[0].start + 1,
2774                         driver_name)) {
2775                 DBG("request_mem_region failed\n");
2776                 return -EBUSY;
2777         }
2778
2779         if (cpu_is_omap16xx()) {
2780                 dc_clk = clk_get(&pdev->dev, "usb_dc_ck");
2781                 hhc_clk = clk_get(&pdev->dev, "usb_hhc_ck");
2782                 BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
2783                 /* can't use omap_udc_enable_clock yet */
2784                 clk_enable(dc_clk);
2785                 clk_enable(hhc_clk);
2786                 udelay(100);
2787         }
2788
2789         INFO("OMAP UDC rev %d.%d%s\n",
2790                 UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
2791                 config->otg ? ", Mini-AB" : "");
2792
2793         /* use the mode given to us by board init code */
2794         if (cpu_is_omap15xx()) {
2795                 hmc = HMC_1510;
2796                 type = "(unknown)";
2797
2798                 if (machine_is_omap_innovator() || machine_is_omap_h6300()) {
2799                         /* just set up software VBUS detect, and then
2800                          * later rig it so we always report VBUS.
2801                          * FIXME without really sensing VBUS, we can't
2802                          * know when to turn PULLUP_EN on/off; and that
2803                          * means we always "need" the 48MHz clock.
2804                          */
2805                         u32 tmp = FUNC_MUX_CTRL_0_REG;
2806
2807                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
2808                         tmp |= VBUS_MODE_1510;
2809                         tmp &= ~VBUS_CTRL_1510;
2810                         FUNC_MUX_CTRL_0_REG = tmp;
2811                 }
2812         } else {
2813                 /* The transceiver may package some GPIO logic or handle
2814                  * loopback and/or transceiverless setup; if we find one,
2815                  * use it.  Except for OTG, we don't _need_ to talk to one;
2816                  * but not having one probably means no VBUS detection.
2817                  */
2818                 xceiv = otg_get_transceiver();
2819                 if (xceiv)
2820                         type = xceiv->label;
2821                 else if (config->otg) {
2822                         DBG("OTG requires external transceiver!\n");
2823                         goto cleanup0;
2824                 }
2825
2826                 hmc = HMC_1610;
2827                 switch (hmc) {
2828                 case 0:                 /* POWERUP DEFAULT == 0 */
2829                 case 4:
2830                 case 12:
2831                 case 20:
2832                         if (!cpu_is_omap1710()) {
2833                                 type = "integrated";
2834                                 break;
2835                         }
2836                         /* FALL THROUGH */
2837                 case 3:
2838                 case 11:
2839                 case 16:
2840                 case 19:
2841                 case 25:
2842                         if (!xceiv) {
2843                                 DBG("external transceiver not registered!\n");
2844                                 type = "unknown";
2845                         }
2846                         break;
2847                 case 21:                        /* internal loopback */
2848                         type = "loopback";
2849                         break;
2850                 case 14:                        /* transceiverless */
2851                         if (cpu_is_omap1710())
2852                                 goto bad_on_1710;
2853                         /* FALL THROUGH */
2854                 case 13:
2855                 case 15:
2856                         type = "no";
2857                         break;
2858
2859                 default:
2860 bad_on_1710:
2861                         ERR("unrecognized UDC HMC mode %d\n", hmc);
2862                         goto cleanup0;
2863                 }
2864         }
2865         INFO("hmc mode %d, %s transceiver\n", hmc, type);
2866
2867         /* a "gadget" abstracts/virtualizes the controller */
2868         status = omap_udc_setup(pdev, xceiv);
2869         if (status) {
2870                 goto cleanup0;
2871         }
2872         xceiv = NULL;
2873         // "udc" is now valid
2874         pullup_disable(udc);
2875 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
2876         udc->gadget.is_otg = (config->otg != 0);
2877 #endif
2878
2879         /* starting with omap1710 es2.0, clear toggle is a separate bit */
2880         if (UDC_REV_REG >= 0x61)
2881                 udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE;
2882         else
2883                 udc->clr_halt = UDC_RESET_EP;
2884
2885         /* USB general purpose IRQ:  ep0, state changes, dma, etc */
2886         status = request_irq(pdev->resource[1].start, omap_udc_irq,
2887                         SA_SAMPLE_RANDOM, driver_name, udc);
2888         if (status != 0) {
2889                 ERR( "can't get irq %ld, err %d\n",
2890                         pdev->resource[1].start, status);
2891                 goto cleanup1;
2892         }
2893
2894         /* USB "non-iso" IRQ (PIO for all but ep0) */
2895         status = request_irq(pdev->resource[2].start, omap_udc_pio_irq,
2896                         SA_SAMPLE_RANDOM, "omap_udc pio", udc);
2897         if (status != 0) {
2898                 ERR( "can't get irq %ld, err %d\n",
2899                         pdev->resource[2].start, status);
2900                 goto cleanup2;
2901         }
2902 #ifdef  USE_ISO
2903         status = request_irq(pdev->resource[3].start, omap_udc_iso_irq,
2904                         SA_INTERRUPT, "omap_udc iso", udc);
2905         if (status != 0) {
2906                 ERR("can't get irq %ld, err %d\n",
2907                         pdev->resource[3].start, status);
2908                 goto cleanup3;
2909         }
2910 #endif
2911         if (cpu_is_omap16xx()) {
2912                 udc->dc_clk = dc_clk;
2913                 udc->hhc_clk = hhc_clk;
2914                 clk_disable(hhc_clk);
2915                 clk_disable(dc_clk);
2916         }
2917
2918         create_proc_file();
2919         device_add(&udc->gadget.dev);
2920         return 0;
2921
2922 #ifdef  USE_ISO
2923 cleanup3:
2924         free_irq(pdev->resource[2].start, udc);
2925 #endif
2926
2927 cleanup2:
2928         free_irq(pdev->resource[1].start, udc);
2929
2930 cleanup1:
2931         kfree (udc);
2932         udc = NULL;
2933
2934 cleanup0:
2935         if (xceiv)
2936                 put_device(xceiv->dev);
2937
2938         if (cpu_is_omap16xx()) {
2939                 clk_disable(hhc_clk);
2940                 clk_disable(dc_clk);
2941                 clk_put(hhc_clk);
2942                 clk_put(dc_clk);
2943         }
2944
2945         release_mem_region(pdev->resource[0].start,
2946                         pdev->resource[0].end - pdev->resource[0].start + 1);
2947
2948         return status;
2949 }
2950
2951 static int __exit omap_udc_remove(struct platform_device *pdev)
2952 {
2953         DECLARE_COMPLETION(done);
2954
2955         if (!udc)
2956                 return -ENODEV;
2957
2958         udc->done = &done;
2959
2960         pullup_disable(udc);
2961         if (udc->transceiver) {
2962                 put_device(udc->transceiver->dev);
2963                 udc->transceiver = NULL;
2964         }
2965         UDC_SYSCON1_REG = 0;
2966
2967         remove_proc_file();
2968
2969 #ifdef  USE_ISO
2970         free_irq(pdev->resource[3].start, udc);
2971 #endif
2972         free_irq(pdev->resource[2].start, udc);
2973         free_irq(pdev->resource[1].start, udc);
2974
2975         if (udc->dc_clk) {
2976                 if (udc->clk_requested)
2977                         omap_udc_enable_clock(0);
2978                 clk_put(udc->hhc_clk);
2979                 clk_put(udc->dc_clk);
2980         }
2981
2982         release_mem_region(pdev->resource[0].start,
2983                         pdev->resource[0].end - pdev->resource[0].start + 1);
2984
2985         device_unregister(&udc->gadget.dev);
2986         wait_for_completion(&done);
2987
2988         return 0;
2989 }
2990
2991 /* suspend/resume/wakeup from sysfs (echo > power/state) or when the
2992  * system is forced into deep sleep
2993  *
2994  * REVISIT we should probably reject suspend requests when there's a host
2995  * session active, rather than disconnecting, at least on boards that can
2996  * report VBUS irqs (UDC_DEVSTAT_REG.UDC_ATT).  And in any case, we need to
2997  * make host resumes and VBUS detection trigger OMAP wakeup events; that
2998  * may involve talking to an external transceiver (e.g. isp1301).
2999  */
3000
3001 static int omap_udc_suspend(struct platform_device *dev, pm_message_t message)
3002 {
3003         u32     devstat;
3004
3005         devstat = UDC_DEVSTAT_REG;
3006
3007         /* we're requesting 48 MHz clock if the pullup is enabled
3008          * (== we're attached to the host) and we're not suspended,
3009          * which would prevent entry to deep sleep...
3010          */
3011         if ((devstat & UDC_ATT) != 0 && (devstat & UDC_SUS) == 0) {
3012                 WARN("session active; suspend requires disconnect\n");
3013                 omap_pullup(&udc->gadget, 0);
3014         }
3015
3016         udc->gadget.dev.power.power_state = PMSG_SUSPEND;
3017         udc->gadget.dev.parent->power.power_state = PMSG_SUSPEND;
3018         return 0;
3019 }
3020
3021 static int omap_udc_resume(struct platform_device *dev)
3022 {
3023         DBG("resume + wakeup/SRP\n");
3024         omap_pullup(&udc->gadget, 1);
3025
3026         /* maybe the host would enumerate us if we nudged it */
3027         msleep(100);
3028         return omap_wakeup(&udc->gadget);
3029 }
3030
3031 /*-------------------------------------------------------------------------*/
3032
3033 static struct platform_driver udc_driver = {
3034         .probe          = omap_udc_probe,
3035         .remove         = __exit_p(omap_udc_remove),
3036         .suspend        = omap_udc_suspend,
3037         .resume         = omap_udc_resume,
3038         .driver         = {
3039                 .owner  = THIS_MODULE,
3040                 .name   = (char *) driver_name,
3041         },
3042 };
3043
3044 static int __init udc_init(void)
3045 {
3046         INFO("%s, version: " DRIVER_VERSION
3047 #ifdef  USE_ISO
3048                 " (iso)"
3049 #endif
3050                 "%s\n", driver_desc,
3051                 use_dma ?  " (dma)" : "");
3052         return platform_driver_register(&udc_driver);
3053 }
3054 module_init(udc_init);
3055
3056 static void __exit udc_exit(void)
3057 {
3058         platform_driver_unregister(&udc_driver);
3059 }
3060 module_exit(udc_exit);
3061
3062 MODULE_DESCRIPTION(DRIVER_DESC);
3063 MODULE_LICENSE("GPL");
3064