drivers/staging/me4000/me4000.c

   1 /* Device driver for Meilhaus ME-4000 board family.
   2  * ================================================
   3  *
   4  *  Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
   5  *
   6  *  This file is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *  Author:     Guenter Gebhardt        <g.gebhardt@meilhaus.de>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/fs.h>
  25 #include <linux/sched.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/errno.h>
  29 #include <linux/delay.h>
  30 #include <linux/mm.h>
  31 #include <linux/unistd.h>
  32 #include <linux/list.h>
  33 #include <linux/proc_fs.h>
  34 #include <linux/types.h>
  35 #include <linux/poll.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/slab.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/io.h>
  41 #include <asm/system.h>
  42 #include <asm/uaccess.h>
  43
  44 /* Include-File for the Meilhaus ME-4000 I/O board */
  45 #include "me4000.h"
  46 #include "me4000_firmware.h"
  47 #include "me4610_firmware.h"
  48
  49 /* Administrative stuff for modinfo */
  50 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
  51 MODULE_DESCRIPTION
  52     ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
  53 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
  54 MODULE_LICENSE("GPL");
  55
  56 /* Board specific data are kept in a global list */
  57 static LIST_HEAD(me4000_board_info_list);
  58
  59 /* Major Device Numbers. 0 means to get it automatically from the System */
  60 static int me4000_ao_major_driver_no;
  61 static int me4000_ai_major_driver_no;
  62 static int me4000_dio_major_driver_no;
  63 static int me4000_cnt_major_driver_no;
  64 static int me4000_ext_int_major_driver_no;
  65
  66 /* Let the user specify a custom major driver number */
  67 module_param(me4000_ao_major_driver_no, int, 0);
  68 MODULE_PARM_DESC(me4000_ao_major_driver_no,
  69                  "Major driver number for analog output (default 0)");
  70
  71 module_param(me4000_ai_major_driver_no, int, 0);
  72 MODULE_PARM_DESC(me4000_ai_major_driver_no,
  73                  "Major driver number for analog input (default 0)");
  74
  75 module_param(me4000_dio_major_driver_no, int, 0);
  76 MODULE_PARM_DESC(me4000_dio_major_driver_no,
  77                  "Major driver number digital I/O (default 0)");
  78
  79 module_param(me4000_cnt_major_driver_no, int, 0);
  80 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
  81                  "Major driver number for counter (default 0)");
  82
  83 module_param(me4000_ext_int_major_driver_no, int, 0);
  84 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
  85                  "Major driver number for external interrupt (default 0)");
  86
  87 /*-----------------------------------------------------------------------------
  88   Board detection and initialization
  89   ---------------------------------------------------------------------------*/
  90 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
  91 static int me4000_xilinx_download(struct me4000_info *);
  92 static int me4000_reset_board(struct me4000_info *);
  93
  94 static void clear_board_info_list(void);
  95 static void release_ao_contexts(struct me4000_info *board_info);
  96 /*-----------------------------------------------------------------------------
  97   Stuff used by all device parts
  98   ---------------------------------------------------------------------------*/
  99 static int me4000_open(struct inode *, struct file *);
 100 static int me4000_release(struct inode *, struct file *);
 101
 102 static int me4000_get_user_info(struct me4000_user_info *,
 103                                 struct me4000_info *board_info);
 104 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
 105
 106 /*-----------------------------------------------------------------------------
 107   Analog output stuff
 108   ---------------------------------------------------------------------------*/
 109 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
 110                                     loff_t *);
 111 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
 112                                     loff_t *);
 113 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
 114                                     loff_t *);
 115
 116 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
 117                                 unsigned long);
 118 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
 119                                 unsigned long);
 120 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
 121                                 unsigned long);
 122
 123 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
 124 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
 125
 126 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
 127 static int me4000_ao_stop(struct me4000_ao_context *);
 128 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
 129 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
 130 static int me4000_ao_preload(struct me4000_ao_context *);
 131 static int me4000_ao_preload_update(struct me4000_ao_context *);
 132 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
 133 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
 134 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
 135 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
 136 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
 137 static int me4000_ao_enable_do(struct me4000_ao_context *);
 138 static int me4000_ao_disable_do(struct me4000_ao_context *);
 139 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
 140
 141 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
 142 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
 143 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
 144 static int me4000_ao_simultaneous_update(
 145                                         struct me4000_ao_channel_list *channels,
 146                                         struct me4000_ao_context *ao_context);
 147
 148 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
 149 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
 150 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
 151
 152 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
 153                                      struct me4000_ao_context *ao_context);
 154 static int me4000_ao_get_free_buffer(unsigned long *arg,
 155                                      struct me4000_ao_context *ao_context);
 156
 157 /*-----------------------------------------------------------------------------
 158   Analog input stuff
 159   ---------------------------------------------------------------------------*/
 160 static int me4000_ai_single(struct me4000_ai_single *,
 161                                 struct me4000_ai_context *);
 162 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
 163                                 unsigned long);
 164
 165 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
 166 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
 167                               unsigned long);
 168 static unsigned int me4000_ai_poll(struct file *, poll_table *);
 169 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
 170
 171 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
 172                                unsigned long);
 173
 174 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
 175 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
 176 static int me4000_ai_config(struct me4000_ai_config *,
 177                                 struct me4000_ai_context *);
 178 static int me4000_ai_start(struct me4000_ai_context *);
 179 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
 180 static int me4000_ai_stop(struct me4000_ai_context *);
 181 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
 182 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
 183 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
 184 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
 185                                    struct me4000_ai_context *);
 186 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
 187                               struct me4000_ai_context *ai_context);
 188 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
 189 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
 190 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
 191 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
 192 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
 193 static int me4000_ai_get_count_buffer(unsigned long *arg,
 194                                       struct me4000_ai_context *ai_context);
 195
 196 /*-----------------------------------------------------------------------------
 197   EEPROM stuff
 198   ---------------------------------------------------------------------------*/
 199 static int me4000_eeprom_read(struct me4000_eeprom *arg,
 200                               struct me4000_ai_context *ai_context);
 201 static int me4000_eeprom_write(struct me4000_eeprom *arg,
 202                                struct me4000_ai_context *ai_context);
 203
 204 /*-----------------------------------------------------------------------------
 205   Digital I/O stuff
 206   ---------------------------------------------------------------------------*/
 207 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
 208                             unsigned long);
 209 static int me4000_dio_config(struct me4000_dio_config *,
 210                                 struct me4000_dio_context *);
 211 static int me4000_dio_get_byte(struct me4000_dio_byte *,
 212                                 struct me4000_dio_context *);
 213 static int me4000_dio_set_byte(struct me4000_dio_byte *,
 214                                 struct me4000_dio_context *);
 215 static int me4000_dio_reset(struct me4000_dio_context *);
 216
 217 /*-----------------------------------------------------------------------------
 218   Counter stuff
 219   ---------------------------------------------------------------------------*/
 220 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
 221                             unsigned long);
 222 static int me4000_cnt_config(struct me4000_cnt_config *,
 223                                 struct me4000_cnt_context *);
 224 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
 225 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
 226 static int me4000_cnt_reset(struct me4000_cnt_context *);
 227
 228 /*-----------------------------------------------------------------------------
 229   External interrupt routines
 230   ---------------------------------------------------------------------------*/
 231 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
 232                                 unsigned long);
 233 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
 234 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
 235 static int me4000_ext_int_count(unsigned long *arg,
 236                                 struct me4000_ext_int_context *ext_int_context);
 237 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
 238
 239 /*-----------------------------------------------------------------------------
 240   The interrupt service routines
 241   ---------------------------------------------------------------------------*/
 242 static irqreturn_t me4000_ao_isr(int, void *);
 243 static irqreturn_t me4000_ai_isr(int, void *);
 244 static irqreturn_t me4000_ext_int_isr(int, void *);
 245
 246 /*-----------------------------------------------------------------------------
 247   Inline functions
 248   ---------------------------------------------------------------------------*/
 249
 250 static int inline me4000_buf_count(struct me4000_circ_buf buf, int size)
 251 {
 252         return ((buf.head - buf.tail) & (size - 1));
 253 }
 254
 255 static int inline me4000_buf_space(struct me4000_circ_buf buf, int size)
 256 {
 257         return ((buf.tail - (buf.head + 1)) & (size - 1));
 258 }
 259
 260 static int inline me4000_values_to_end(struct me4000_circ_buf buf, int size)
 261 {
 262         int end;
 263         int n;
 264         end = size - buf.tail;
 265         n = (buf.head + end) & (size - 1);
 266         return (n < end) ? n : end;
 267 }
 268
 269 static int inline me4000_space_to_end(struct me4000_circ_buf buf, int size)
 270 {
 271         int end;
 272         int n;
 273
 274         end = size - 1 - buf.head;
 275         n = (end + buf.tail) & (size - 1);
 276         return (n <= end) ? n : (end + 1);
 277 }
 278
 279 static void inline me4000_outb(unsigned char value, unsigned long port)
 280 {
 281         PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
 282         outb(value, port);
 283 }
 284
 285 static void inline me4000_outl(unsigned long value, unsigned long port)
 286 {
 287         PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
 288         outl(value, port);
 289 }
 290
 291 static unsigned long inline me4000_inl(unsigned long port)
 292 {
 293         unsigned long value;
 294         value = inl(port);
 295         PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
 296         return value;
 297 }
 298
 299 static unsigned char inline me4000_inb(unsigned long port)
 300 {
 301         unsigned char value;
 302         value = inb(port);
 303         PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
 304         return value;
 305 }
 306
 307 static struct pci_driver me4000_driver = {
 308         .name = ME4000_NAME,
 309         .id_table = me4000_pci_table,
 310         .probe = me4000_probe
 311 };
 312
 313 static struct file_operations me4000_ao_fops_sing = {
 314       .owner = THIS_MODULE,
 315       .write = me4000_ao_write_sing,
 316       .ioctl = me4000_ao_ioctl_sing,
 317       .open = me4000_open,
 318       .release = me4000_release,
 319 };
 320
 321 static struct file_operations me4000_ao_fops_wrap = {
 322       .owner = THIS_MODULE,
 323       .write = me4000_ao_write_wrap,
 324       .ioctl = me4000_ao_ioctl_wrap,
 325       .open = me4000_open,
 326       .release = me4000_release,
 327 };
 328
 329 static struct file_operations me4000_ao_fops_cont = {
 330       .owner = THIS_MODULE,
 331       .write = me4000_ao_write_cont,
 332       .poll = me4000_ao_poll_cont,
 333       .ioctl = me4000_ao_ioctl_cont,
 334       .open = me4000_open,
 335       .release = me4000_release,
 336       .fsync = me4000_ao_fsync_cont,
 337 };
 338
 339 static struct file_operations me4000_ai_fops_sing = {
 340       .owner = THIS_MODULE,
 341       .ioctl = me4000_ai_ioctl_sing,
 342       .open = me4000_open,
 343       .release = me4000_release,
 344 };
 345
 346 static struct file_operations me4000_ai_fops_cont_sw = {
 347       .owner = THIS_MODULE,
 348       .read = me4000_ai_read,
 349       .poll = me4000_ai_poll,
 350       .ioctl = me4000_ai_ioctl_sw,
 351       .open = me4000_open,
 352       .release = me4000_release,
 353       .fasync = me4000_ai_fasync,
 354 };
 355
 356 static struct file_operations me4000_ai_fops_cont_et = {
 357       .owner = THIS_MODULE,
 358       .read = me4000_ai_read,
 359       .poll = me4000_ai_poll,
 360       .ioctl = me4000_ai_ioctl_ext,
 361       .open = me4000_open,
 362       .release = me4000_release,
 363 };
 364
 365 static struct file_operations me4000_ai_fops_cont_et_value = {
 366       .owner = THIS_MODULE,
 367       .read = me4000_ai_read,
 368       .poll = me4000_ai_poll,
 369       .ioctl = me4000_ai_ioctl_ext,
 370       .open = me4000_open,
 371       .release = me4000_release,
 372 };
 373
 374 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
 375       .owner = THIS_MODULE,
 376       .read = me4000_ai_read,
 377       .poll = me4000_ai_poll,
 378       .ioctl = me4000_ai_ioctl_ext,
 379       .open = me4000_open,
 380       .release = me4000_release,
 381 };
 382
 383 static struct file_operations me4000_dio_fops = {
 384       .owner = THIS_MODULE,
 385       .ioctl = me4000_dio_ioctl,
 386       .open = me4000_open,
 387       .release = me4000_release,
 388 };
 389
 390 static struct file_operations me4000_cnt_fops = {
 391       .owner = THIS_MODULE,
 392       .ioctl = me4000_cnt_ioctl,
 393       .open = me4000_open,
 394       .release = me4000_release,
 395 };
 396
 397 static struct file_operations me4000_ext_int_fops = {
 398       .owner = THIS_MODULE,
 399       .ioctl = me4000_ext_int_ioctl,
 400       .open = me4000_open,
 401       .release = me4000_release,
 402       .fasync = me4000_ext_int_fasync,
 403 };
 404
 405 static struct file_operations *me4000_ao_fops_array[] = {
 406         &me4000_ao_fops_sing,   // single operations
 407         &me4000_ao_fops_wrap,   // wraparound operations
 408         &me4000_ao_fops_cont,   // continous operations
 409 };
 410
 411 static struct file_operations *me4000_ai_fops_array[] = {
 412         &me4000_ai_fops_sing,   // single operations
 413         &me4000_ai_fops_cont_sw,        // continuous operations with software start
 414         &me4000_ai_fops_cont_et,        // continous operations with external trigger
 415         &me4000_ai_fops_cont_et_value,  // sample values by external trigger
 416         &me4000_ai_fops_cont_et_chanlist,       // work through one channel list by external trigger
 417 };
 418
 419 static int __init me4000_init_module(void)
 420 {
 421         int result;
 422
 423         CALL_PDEBUG("init_module() is executed\n");
 424
 425         /* Register driver capabilities */
 426         result = pci_register_driver(&me4000_driver);
 427         PDEBUG("init_module():%d devices detected\n", result);
 428         if (result < 0) {
 429                 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
 430                 goto INIT_ERROR_1;
 431         }
 432
 433         /* Allocate major number for analog output */
 434         result =
 435             register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
 436                             &me4000_ao_fops_sing);
 437         if (result < 0) {
 438                 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
 439                 goto INIT_ERROR_2;
 440         } else {
 441                 me4000_ao_major_driver_no = result;
 442         }
 443         PDEBUG("init_module():Major driver number for AO = %ld\n",
 444                me4000_ao_major_driver_no);
 445
 446         /* Allocate major number for analog input  */
 447         result =
 448             register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
 449                             &me4000_ai_fops_sing);
 450         if (result < 0) {
 451                 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
 452                 goto INIT_ERROR_3;
 453         } else {
 454                 me4000_ai_major_driver_no = result;
 455         }
 456         PDEBUG("init_module():Major driver number for AI = %ld\n",
 457                me4000_ai_major_driver_no);
 458
 459         /* Allocate major number for digital I/O */
 460         result =
 461             register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
 462                             &me4000_dio_fops);
 463         if (result < 0) {
 464                 printk(KERN_ERR
 465                        "ME4000:init_module():Can't get DIO major no\n");
 466                 goto INIT_ERROR_4;
 467         } else {
 468                 me4000_dio_major_driver_no = result;
 469         }
 470         PDEBUG("init_module():Major driver number for DIO = %ld\n",
 471                me4000_dio_major_driver_no);
 472
 473         /* Allocate major number for counter */
 474         result =
 475             register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
 476                             &me4000_cnt_fops);
 477         if (result < 0) {
 478                 printk(KERN_ERR
 479                        "ME4000:init_module():Can't get CNT major no\n");
 480                 goto INIT_ERROR_5;
 481         } else {
 482                 me4000_cnt_major_driver_no = result;
 483         }
 484         PDEBUG("init_module():Major driver number for CNT = %ld\n",
 485                me4000_cnt_major_driver_no);
 486
 487         /* Allocate major number for external interrupt */
 488         result =
 489             register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
 490                             &me4000_ext_int_fops);
 491         if (result < 0) {
 492                 printk(KERN_ERR
 493                        "ME4000:init_module():Can't get major no for external interrupt\n");
 494                 goto INIT_ERROR_6;
 495         } else {
 496                 me4000_ext_int_major_driver_no = result;
 497         }
 498         PDEBUG
 499             ("init_module():Major driver number for external interrupt = %ld\n",
 500              me4000_ext_int_major_driver_no);
 501
 502         /* Create the /proc/me4000 entry */
 503         if (!create_proc_read_entry
 504             ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
 505                 result = -ENODEV;
 506                 printk(KERN_ERR
 507                        "ME4000:init_module():Can't create proc entry\n");
 508                 goto INIT_ERROR_7;
 509         }
 510
 511         return 0;
 512
 513 INIT_ERROR_7:
 514         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
 515
 516 INIT_ERROR_6:
 517         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
 518
 519 INIT_ERROR_5:
 520         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
 521
 522 INIT_ERROR_4:
 523         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
 524
 525 INIT_ERROR_3:
 526         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
 527
 528 INIT_ERROR_2:
 529         pci_unregister_driver(&me4000_driver);
 530         clear_board_info_list();
 531
 532 INIT_ERROR_1:
 533         return result;
 534 }
 535
 536 module_init(me4000_init_module);
 537
 538 static void clear_board_info_list(void)
 539 {
 540         struct list_head *board_p;
 541         struct list_head *dac_p;
 542         struct me4000_info *board_info;
 543         struct me4000_ao_context *ao_context;
 544
 545         /* Clear context lists */
 546         for (board_p = me4000_board_info_list.next;
 547              board_p != &me4000_board_info_list; board_p = board_p->next) {
 548                 board_info = list_entry(board_p, struct me4000_info, list);
 549                 /* Clear analog output context list */
 550                 while (!list_empty(&board_info->ao_context_list)) {
 551                         dac_p = board_info->ao_context_list.next;
 552                         ao_context =
 553                             list_entry(dac_p, struct me4000_ao_context, list);
 554                         me4000_ao_reset(ao_context);
 555                         free_irq(ao_context->irq, ao_context);
 556                         if (ao_context->circ_buf.buf)
 557                                 kfree(ao_context->circ_buf.buf);
 558                         list_del(dac_p);
 559                         kfree(ao_context);
 560                 }
 561
 562                 /* Clear analog input context */
 563                 if (board_info->ai_context->circ_buf.buf)
 564                         kfree(board_info->ai_context->circ_buf.buf);
 565                 kfree(board_info->ai_context);
 566
 567                 /* Clear digital I/O context */
 568                 kfree(board_info->dio_context);
 569
 570                 /* Clear counter context */
 571                 kfree(board_info->cnt_context);
 572
 573                 /* Clear external interrupt context */
 574                 kfree(board_info->ext_int_context);
 575         }
 576
 577         /* Clear the board info list */
 578         while (!list_empty(&me4000_board_info_list)) {
 579                 board_p = me4000_board_info_list.next;
 580                 board_info = list_entry(board_p, struct me4000_info, list);
 581                 pci_release_regions(board_info->pci_dev_p);
 582                 list_del(board_p);
 583                 kfree(board_info);
 584         }
 585 }
 586
 587 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
 588 {
 589
 590         /*--------------------------- plx regbase ---------------------------------*/
 591
 592         board_info->plx_regbase = pci_resource_start(dev, 1);
 593         if (board_info->plx_regbase == 0) {
 594                 printk(KERN_ERR
 595                        "ME4000:get_registers():PCI base address 1 is not available\n");
 596                 return -ENODEV;
 597         }
 598         board_info->plx_regbase_size = pci_resource_len(dev, 1);
 599
 600         PDEBUG
 601             ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
 602              board_info->plx_regbase, board_info->plx_regbase_size);
 603
 604         /*--------------------------- me4000 regbase ------------------------------*/
 605
 606         board_info->me4000_regbase = pci_resource_start(dev, 2);
 607         if (board_info->me4000_regbase == 0) {
 608                 printk(KERN_ERR
 609                        "ME4000:get_registers():PCI base address 2 is not available\n");
 610                 return -ENODEV;
 611         }
 612         board_info->me4000_regbase_size = pci_resource_len(dev, 2);
 613
 614         PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
 615                board_info->me4000_regbase, board_info->me4000_regbase_size);
 616
 617         /*--------------------------- timer regbase ------------------------------*/
 618
 619         board_info->timer_regbase = pci_resource_start(dev, 3);
 620         if (board_info->timer_regbase == 0) {
 621                 printk(KERN_ERR
 622                        "ME4000:get_registers():PCI base address 3 is not available\n");
 623                 return -ENODEV;
 624         }
 625         board_info->timer_regbase_size = pci_resource_len(dev, 3);
 626
 627         PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
 628                board_info->timer_regbase, board_info->timer_regbase_size);
 629
 630         /*--------------------------- program regbase ------------------------------*/
 631
 632         board_info->program_regbase = pci_resource_start(dev, 5);
 633         if (board_info->program_regbase == 0) {
 634                 printk(KERN_ERR
 635                        "get_registers():ME4000:PCI base address 5 is not available\n");
 636                 return -ENODEV;
 637         }
 638         board_info->program_regbase_size = pci_resource_len(dev, 5);
 639
 640         PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
 641                board_info->program_regbase, board_info->program_regbase_size);
 642
 643         return 0;
 644 }
 645
 646 static int init_board_info(struct pci_dev *pci_dev_p,
 647                            struct me4000_info *board_info)
 648 {
 649         int i;
 650         int result;
 651         struct list_head *board_p;
 652         board_info->pci_dev_p = pci_dev_p;
 653
 654         for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
 655                 if (me4000_boards[i].device_id == pci_dev_p->device) {
 656                         board_info->board_p = &me4000_boards[i];
 657                         break;
 658                 }
 659         }
 660         if (i == ARRAY_SIZE(me4000_boards)) {
 661                 printk(KERN_ERR
 662                        "ME4000:init_board_info():Device ID not valid\n");
 663                 return -ENODEV;
 664         }
 665
 666         /* Get the index of the board in the global list */
 667         for (board_p = me4000_board_info_list.next, i = 0;
 668              board_p != &me4000_board_info_list; board_p = board_p->next, i++) {
 669                 if (board_p == &board_info->list) {
 670                         board_info->board_count = i;
 671                         break;
 672                 }
 673         }
 674         if (board_p == &me4000_board_info_list) {
 675                 printk(KERN_ERR
 676                        "ME4000:init_board_info():Cannot get index of baord\n");
 677                 return -ENODEV;
 678         }
 679
 680         /* Init list head for analog output contexts */
 681         INIT_LIST_HEAD(&board_info->ao_context_list);
 682
 683         /* Init spin locks */
 684         spin_lock_init(&board_info->preload_lock);
 685         spin_lock_init(&board_info->ai_ctrl_lock);
 686
 687         /* Get the serial number */
 688         result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
 689         if (result != PCIBIOS_SUCCESSFUL) {
 690                 printk(KERN_WARNING
 691                        "ME4000:init_board_info: Can't get serial_no\n");
 692                 return result;
 693         }
 694         PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
 695
 696         /* Get the hardware revision */
 697         result =
 698             pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
 699         if (result != PCIBIOS_SUCCESSFUL) {
 700                 printk(KERN_WARNING
 701                        "ME4000:init_board_info():Can't get hw_revision\n");
 702                 return result;
 703         }
 704         PDEBUG("init_board_info():hw_revision = 0x%x\n",
 705                board_info->hw_revision);
 706
 707         /* Get the vendor id */
 708         board_info->vendor_id = pci_dev_p->vendor;
 709         PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
 710
 711         /* Get the device id */
 712         board_info->device_id = pci_dev_p->device;
 713         PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
 714
 715         /* Get the pci device number */
 716         board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
 717         PDEBUG("init_board_info():pci_func_no = 0x%x\n",
 718                board_info->pci_func_no);
 719
 720         /* Get the pci slot number */
 721         board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
 722         PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
 723
 724         /* Get the pci bus number */
 725         board_info->pci_bus_no = pci_dev_p->bus->number;
 726         PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
 727
 728         /* Get the irq assigned to the board */
 729         board_info->irq = pci_dev_p->irq;
 730         PDEBUG("init_board_info():irq = %d\n", board_info->irq);
 731
 732         return 0;
 733 }
 734
 735 static int alloc_ao_contexts(struct me4000_info *info)
 736 {
 737         int i;
 738         int err;
 739         struct me4000_ao_context *ao_context;
 740
 741         for (i = 0; i < info->board_p->ao.count; i++) {
 742                 ao_context = kzalloc(sizeof(struct me4000_ao_context),
 743                                                                 GFP_KERNEL);
 744                 if (!ao_context) {
 745                         printk(KERN_ERR
 746                                "alloc_ao_contexts():Can't get memory for ao context\n");
 747                         release_ao_contexts(info);
 748                         return -ENOMEM;
 749                 }
 750
 751                 spin_lock_init(&ao_context->use_lock);
 752                 spin_lock_init(&ao_context->int_lock);
 753                 ao_context->irq = info->irq;
 754                 init_waitqueue_head(&ao_context->wait_queue);
 755                 ao_context->board_info = info;
 756
 757                 if (info->board_p->ao.fifo_count) {
 758                         /* Allocate circular buffer */
 759                         ao_context->circ_buf.buf =
 760                             kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
 761                         if (!ao_context->circ_buf.buf) {
 762                                 printk(KERN_ERR
 763                                        "alloc_ao_contexts():Can't get circular buffer\n");
 764                                 release_ao_contexts(info);
 765                                 return -ENOMEM;
 766                         }
 767
 768                         /* Clear the circular buffer */
 769                         ao_context->circ_buf.head = 0;
 770                         ao_context->circ_buf.tail = 0;
 771                 }
 772
 773                 switch (i) {
 774                 case 0:
 775                         ao_context->ctrl_reg =
 776                             info->me4000_regbase + ME4000_AO_00_CTRL_REG;
 777                         ao_context->status_reg =
 778                             info->me4000_regbase + ME4000_AO_00_STATUS_REG;
 779                         ao_context->fifo_reg =
 780                             info->me4000_regbase + ME4000_AO_00_FIFO_REG;
 781                         ao_context->single_reg =
 782                             info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
 783                         ao_context->timer_reg =
 784                             info->me4000_regbase + ME4000_AO_00_TIMER_REG;
 785                         ao_context->irq_status_reg =
 786                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 787                         ao_context->preload_reg =
 788                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 789                         break;
 790                 case 1:
 791                         ao_context->ctrl_reg =
 792                             info->me4000_regbase + ME4000_AO_01_CTRL_REG;
 793                         ao_context->status_reg =
 794                             info->me4000_regbase + ME4000_AO_01_STATUS_REG;
 795                         ao_context->fifo_reg =
 796                             info->me4000_regbase + ME4000_AO_01_FIFO_REG;
 797                         ao_context->single_reg =
 798                             info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
 799                         ao_context->timer_reg =
 800                             info->me4000_regbase + ME4000_AO_01_TIMER_REG;
 801                         ao_context->irq_status_reg =
 802                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 803                         ao_context->preload_reg =
 804                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 805                         break;
 806                 case 2:
 807                         ao_context->ctrl_reg =
 808                             info->me4000_regbase + ME4000_AO_02_CTRL_REG;
 809                         ao_context->status_reg =
 810                             info->me4000_regbase + ME4000_AO_02_STATUS_REG;
 811                         ao_context->fifo_reg =
 812                             info->me4000_regbase + ME4000_AO_02_FIFO_REG;
 813                         ao_context->single_reg =
 814                             info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
 815                         ao_context->timer_reg =
 816                             info->me4000_regbase + ME4000_AO_02_TIMER_REG;
 817                         ao_context->irq_status_reg =
 818                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 819                         ao_context->preload_reg =
 820                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 821                         break;
 822                 case 3:
 823                         ao_context->ctrl_reg =
 824                             info->me4000_regbase + ME4000_AO_03_CTRL_REG;
 825                         ao_context->status_reg =
 826                             info->me4000_regbase + ME4000_AO_03_STATUS_REG;
 827                         ao_context->fifo_reg =
 828                             info->me4000_regbase + ME4000_AO_03_FIFO_REG;
 829                         ao_context->single_reg =
 830                             info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
 831                         ao_context->timer_reg =
 832                             info->me4000_regbase + ME4000_AO_03_TIMER_REG;
 833                         ao_context->irq_status_reg =
 834                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 835                         ao_context->preload_reg =
 836                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 837                         break;
 838                 default:
 839                         break;
 840                 }
 841
 842                 if (info->board_p->ao.fifo_count) {
 843                         /* Request the interrupt line */
 844                         err =
 845                             request_irq(ao_context->irq, me4000_ao_isr,
 846                                         IRQF_DISABLED | IRQF_SHARED,
 847                                         ME4000_NAME, ao_context);
 848                         if (err) {
 849                                 printk(KERN_ERR
 850                                        "%s:Can't get interrupt line", __func__);
 851                                 kfree(ao_context->circ_buf.buf);
 852                                 kfree(ao_context);
 853                                 release_ao_contexts(info);
 854                                 return -ENODEV;
 855                         }
 856                 }
 857
 858                 list_add_tail(&ao_context->list, &info->ao_context_list);
 859                 ao_context->index = i;
 860         }
 861
 862         return 0;
 863 }
 864
 865 static void release_ao_contexts(struct me4000_info *board_info)
 866 {
 867         struct list_head *dac_p;
 868         struct me4000_ao_context *ao_context;
 869
 870         /* Clear analog output context list */
 871         while (!list_empty(&board_info->ao_context_list)) {
 872                 dac_p = board_info->ao_context_list.next;
 873                 ao_context = list_entry(dac_p, struct me4000_ao_context, list);
 874                 free_irq(ao_context->irq, ao_context);
 875                 kfree(ao_context->circ_buf.buf);
 876                 list_del(dac_p);
 877                 kfree(ao_context);
 878         }
 879 }
 880
 881 static int alloc_ai_context(struct me4000_info *info)
 882 {
 883         struct me4000_ai_context *ai_context;
 884
 885         if (info->board_p->ai.count) {
 886                 ai_context = kzalloc(sizeof(struct me4000_ai_context),
 887                                                                 GFP_KERNEL);
 888                 if (!ai_context) {
 889                         printk(KERN_ERR
 890                                "ME4000:alloc_ai_context():Can't get memory for ai context\n");
 891                         return -ENOMEM;
 892                 }
 893
 894                 info->ai_context = ai_context;
 895
 896                 spin_lock_init(&ai_context->use_lock);
 897                 spin_lock_init(&ai_context->int_lock);
 898                 ai_context->number = 0;
 899                 ai_context->irq = info->irq;
 900                 init_waitqueue_head(&ai_context->wait_queue);
 901                 ai_context->board_info = info;
 902
 903                 ai_context->ctrl_reg =
 904                     info->me4000_regbase + ME4000_AI_CTRL_REG;
 905                 ai_context->status_reg =
 906                     info->me4000_regbase + ME4000_AI_STATUS_REG;
 907                 ai_context->channel_list_reg =
 908                     info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
 909                 ai_context->data_reg =
 910                     info->me4000_regbase + ME4000_AI_DATA_REG;
 911                 ai_context->chan_timer_reg =
 912                     info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
 913                 ai_context->chan_pre_timer_reg =
 914                     info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
 915                 ai_context->scan_timer_low_reg =
 916                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
 917                 ai_context->scan_timer_high_reg =
 918                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
 919                 ai_context->scan_pre_timer_low_reg =
 920                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
 921                 ai_context->scan_pre_timer_high_reg =
 922                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
 923                 ai_context->start_reg =
 924                     info->me4000_regbase + ME4000_AI_START_REG;
 925                 ai_context->irq_status_reg =
 926                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 927                 ai_context->sample_counter_reg =
 928                     info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
 929         }
 930
 931         return 0;
 932 }
 933
 934 static int alloc_dio_context(struct me4000_info *info)
 935 {
 936         struct me4000_dio_context *dio_context;
 937
 938         if (info->board_p->dio.count) {
 939                 dio_context = kzalloc(sizeof(struct me4000_dio_context),
 940                                                                 GFP_KERNEL);
 941                 if (!dio_context) {
 942                         printk(KERN_ERR
 943                                "ME4000:alloc_dio_context():Can't get memory for dio context\n");
 944                         return -ENOMEM;
 945                 }
 946
 947                 info->dio_context = dio_context;
 948
 949                 spin_lock_init(&dio_context->use_lock);
 950                 dio_context->board_info = info;
 951
 952                 dio_context->dio_count = info->board_p->dio.count;
 953
 954                 dio_context->dir_reg =
 955                     info->me4000_regbase + ME4000_DIO_DIR_REG;
 956                 dio_context->ctrl_reg =
 957                     info->me4000_regbase + ME4000_DIO_CTRL_REG;
 958                 dio_context->port_0_reg =
 959                     info->me4000_regbase + ME4000_DIO_PORT_0_REG;
 960                 dio_context->port_1_reg =
 961                     info->me4000_regbase + ME4000_DIO_PORT_1_REG;
 962                 dio_context->port_2_reg =
 963                     info->me4000_regbase + ME4000_DIO_PORT_2_REG;
 964                 dio_context->port_3_reg =
 965                     info->me4000_regbase + ME4000_DIO_PORT_3_REG;
 966         }
 967
 968         return 0;
 969 }
 970
 971 static int alloc_cnt_context(struct me4000_info *info)
 972 {
 973         struct me4000_cnt_context *cnt_context;
 974
 975         if (info->board_p->cnt.count) {
 976                 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
 977                                                                 GFP_KERNEL);
 978                 if (!cnt_context) {
 979                         printk(KERN_ERR
 980                                "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
 981                         return -ENOMEM;
 982                 }
 983
 984                 info->cnt_context = cnt_context;
 985
 986                 spin_lock_init(&cnt_context->use_lock);
 987                 cnt_context->board_info = info;
 988
 989                 cnt_context->ctrl_reg =
 990                     info->timer_regbase + ME4000_CNT_CTRL_REG;
 991                 cnt_context->counter_0_reg =
 992                     info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
 993                 cnt_context->counter_1_reg =
 994                     info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
 995                 cnt_context->counter_2_reg =
 996                     info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
 997         }
 998
 999         return 0;
1000 }
1001
1002 static int alloc_ext_int_context(struct me4000_info *info)
1003 {
1004         struct me4000_ext_int_context *ext_int_context;
1005
1006         if (info->board_p->cnt.count) {
1007                 ext_int_context =
1008                     kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
1009                 if (!ext_int_context) {
1010                         printk(KERN_ERR
1011                                "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1012                         return -ENOMEM;
1013                 }
1014
1015                 info->ext_int_context = ext_int_context;
1016
1017                 spin_lock_init(&ext_int_context->use_lock);
1018                 ext_int_context->board_info = info;
1019
1020                 ext_int_context->fasync_ptr = NULL;
1021                 ext_int_context->irq = info->irq;
1022
1023                 ext_int_context->ctrl_reg =
1024                     info->me4000_regbase + ME4000_AI_CTRL_REG;
1025                 ext_int_context->irq_status_reg =
1026                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1027         }
1028
1029         return 0;
1030 }
1031
1032 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1033 {
1034         int result = 0;
1035         struct me4000_info *board_info;
1036
1037         CALL_PDEBUG("me4000_probe() is executed\n");
1038
1039         /* Allocate structure for board context */
1040         board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1041         if (!board_info) {
1042                 printk(KERN_ERR
1043                        "ME4000:Can't get memory for board info structure\n");
1044                 result = -ENOMEM;
1045                 goto PROBE_ERROR_1;
1046         }
1047
1048         /* Add to global linked list */
1049         list_add_tail(&board_info->list, &me4000_board_info_list);
1050
1051         /* Get the PCI base registers */
1052         result = get_registers(dev, board_info);
1053         if (result) {
1054                 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1055                 goto PROBE_ERROR_2;
1056         }
1057
1058         /* Enable the device */
1059         result = pci_enable_device(dev);
1060         if (result < 0) {
1061                 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1062                 goto PROBE_ERROR_2;
1063         }
1064
1065         /* Request the PCI register regions */
1066         result = pci_request_regions(dev, ME4000_NAME);
1067         if (result < 0) {
1068                 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1069                 goto PROBE_ERROR_2;
1070         }
1071
1072         /* Initialize board info */
1073         result = init_board_info(dev, board_info);
1074         if (result) {
1075                 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1076                 goto PROBE_ERROR_3;
1077         }
1078
1079         /* Download the xilinx firmware */
1080         result = me4000_xilinx_download(board_info);
1081         if (result) {
1082                 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1083                 goto PROBE_ERROR_3;
1084         }
1085
1086         /* Make a hardware reset */
1087         result = me4000_reset_board(board_info);
1088         if (result) {
1089                 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1090                 goto PROBE_ERROR_3;
1091         }
1092
1093         /* Allocate analog output context structures */
1094         result = alloc_ao_contexts(board_info);
1095         if (result) {
1096                 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1097                 goto PROBE_ERROR_3;
1098         }
1099
1100         /* Allocate analog input context */
1101         result = alloc_ai_context(board_info);
1102         if (result) {
1103                 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1104                 goto PROBE_ERROR_4;
1105         }
1106
1107         /* Allocate digital I/O context */
1108         result = alloc_dio_context(board_info);
1109         if (result) {
1110                 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1111                 goto PROBE_ERROR_5;
1112         }
1113
1114         /* Allocate counter context */
1115         result = alloc_cnt_context(board_info);
1116         if (result) {
1117                 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1118                 goto PROBE_ERROR_6;
1119         }
1120
1121         /* Allocate external interrupt context */
1122         result = alloc_ext_int_context(board_info);
1123         if (result) {
1124                 printk(KERN_ERR
1125                        "%s:Cannot allocate ext_int context\n", __func__);
1126                 goto PROBE_ERROR_7;
1127         }
1128
1129         return 0;
1130
1131 PROBE_ERROR_7:
1132         kfree(board_info->cnt_context);
1133
1134 PROBE_ERROR_6:
1135         kfree(board_info->dio_context);
1136
1137 PROBE_ERROR_5:
1138         kfree(board_info->ai_context);
1139
1140 PROBE_ERROR_4:
1141         release_ao_contexts(board_info);
1142
1143 PROBE_ERROR_3:
1144         pci_release_regions(dev);
1145
1146 PROBE_ERROR_2:
1147         list_del(&board_info->list);
1148         kfree(board_info);
1149
1150 PROBE_ERROR_1:
1151         return result;
1152 }
1153
1154 static int me4000_xilinx_download(struct me4000_info *info)
1155 {
1156         int size = 0;
1157         u32 value = 0;
1158         int idx = 0;
1159         unsigned char *firm;
1160         wait_queue_head_t queue;
1161
1162         CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1163
1164         init_waitqueue_head(&queue);
1165
1166         firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1167
1168         /*
1169          * Set PLX local interrupt 2 polarity to high.
1170          * Interrupt is thrown by init pin of xilinx.
1171          */
1172         outl(0x10, info->plx_regbase + PLX_INTCSR);
1173
1174         /* Set /CS and /WRITE of the Xilinx */
1175         value = inl(info->plx_regbase + PLX_ICR);
1176         value |= 0x100;
1177         outl(value, info->plx_regbase + PLX_ICR);
1178
1179         /* Init Xilinx with CS1 */
1180         inb(info->program_regbase + 0xC8);
1181
1182         /* Wait until /INIT pin is set */
1183         udelay(20);
1184         if (!inl(info->plx_regbase + PLX_INTCSR) & 0x20) {
1185                 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1186                 return -EIO;
1187         }
1188
1189         /* Reset /CS and /WRITE of the Xilinx */
1190         value = inl(info->plx_regbase + PLX_ICR);
1191         value &= ~0x100;
1192         outl(value, info->plx_regbase + PLX_ICR);
1193
1194         /* Download Xilinx firmware */
1195         size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1196         udelay(10);
1197
1198         for (idx = 0; idx < size; idx++) {
1199                 outb(firm[16 + idx], info->program_regbase);
1200
1201                 udelay(10);
1202
1203                 /* Check if BUSY flag is low */
1204                 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1205                         printk(KERN_ERR
1206                                "%s:Xilinx is still busy (idx = %d)\n", __func__,
1207                                idx);
1208                         return -EIO;
1209                 }
1210         }
1211
1212         PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1213
1214         /* If done flag is high download was successful */
1215         if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1216                 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1217                 PDEBUG("me4000_xilinx_download():Download was successful\n");
1218         } else {
1219                 printk(KERN_ERR
1220                        "ME4000:%s:DONE flag is not set\n", __func__);
1221                 printk(KERN_ERR
1222                        "ME4000:%s:Download not succesful\n", __func__);
1223                 return -EIO;
1224         }
1225
1226         /* Set /CS and /WRITE */
1227         value = inl(info->plx_regbase + PLX_ICR);
1228         value |= 0x100;
1229         outl(value, info->plx_regbase + PLX_ICR);
1230
1231         return 0;
1232 }
1233
1234 static int me4000_reset_board(struct me4000_info *info)
1235 {
1236         unsigned long icr;
1237
1238         CALL_PDEBUG("me4000_reset_board() is executed\n");
1239
1240         /* Make a hardware reset */
1241         icr = me4000_inl(info->plx_regbase + PLX_ICR);
1242         icr |= 0x40000000;
1243         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1244         icr &= ~0x40000000;
1245         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1246
1247         /* Set both stop bits in the analog input control register */
1248         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1249                     info->me4000_regbase + ME4000_AI_CTRL_REG);
1250
1251         /* Set both stop bits in the analog output control register */
1252         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1253                     info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1254         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1255                     info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1256         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1257                     info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1258         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1259                     info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1260
1261         /* 0x8000 to the DACs means an output voltage of 0V */
1262         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1263         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1264         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1265         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1266
1267         /* Enable interrupts on the PLX */
1268         me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1269
1270         /* Set the adustment register for AO demux */
1271         me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1272                     info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1273
1274         /* Set digital I/O direction for port 0 to output on isolated versions */
1275         if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1276                 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1277         }
1278
1279         return 0;
1280 }
1281
1282 static int me4000_open(struct inode *inode_p, struct file *file_p)
1283 {
1284         int board, dev, mode;
1285         int err = 0;
1286         int i;
1287         struct list_head *ptr;
1288         struct me4000_info *board_info = NULL;
1289         struct me4000_ao_context *ao_context = NULL;
1290         struct me4000_ai_context *ai_context = NULL;
1291         struct me4000_dio_context *dio_context = NULL;
1292         struct me4000_cnt_context *cnt_context = NULL;
1293         struct me4000_ext_int_context *ext_int_context = NULL;
1294
1295         CALL_PDEBUG("me4000_open() is executed\n");
1296
1297         /* Analog output */
1298         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1299                 board = AO_BOARD(inode_p->i_rdev);
1300                 dev = AO_PORT(inode_p->i_rdev);
1301                 mode = AO_MODE(inode_p->i_rdev);
1302
1303                 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1304                        dev, mode);
1305
1306                 /* Search for the board context */
1307                 for (ptr = me4000_board_info_list.next, i = 0;
1308                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1309                         board_info = list_entry(ptr, struct me4000_info, list);
1310                         if (i == board)
1311                                 break;
1312                 }
1313
1314                 if (ptr == &me4000_board_info_list) {
1315                         printk(KERN_ERR
1316                                "ME4000:me4000_open():Board %d not in device list\n",
1317                                board);
1318                         return -ENODEV;
1319                 }
1320
1321                 /* Search for the dac context */
1322                 for (ptr = board_info->ao_context_list.next, i = 0;
1323                      ptr != &board_info->ao_context_list;
1324                      ptr = ptr->next, i++) {
1325                         ao_context = list_entry(ptr, struct me4000_ao_context,
1326                                                                         list);
1327                         if (i == dev)
1328                                 break;
1329                 }
1330
1331                 if (ptr == &board_info->ao_context_list) {
1332                         printk(KERN_ERR
1333                                "ME4000:me4000_open():Device %d not in device list\n",
1334                                dev);
1335                         return -ENODEV;
1336                 }
1337
1338                 /* Check if mode is valid */
1339                 if (mode > 2) {
1340                         printk(KERN_ERR
1341                                "ME4000:me4000_open():Mode is not valid\n");
1342                         return -ENODEV;
1343                 }
1344
1345                 /* Check if mode is valid for this AO */
1346                 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1347                     && (dev >= board_info->board_p->ao.fifo_count)) {
1348                         printk(KERN_ERR
1349                                "ME4000:me4000_open():AO %d only in single mode available\n",
1350                                dev);
1351                         return -ENODEV;
1352                 }
1353
1354                 /* Check if already opened */
1355                 spin_lock(&ao_context->use_lock);
1356                 if (ao_context->dac_in_use) {
1357                         printk(KERN_ERR
1358                                "ME4000:me4000_open():AO %d already in use\n",
1359                                dev);
1360                         spin_unlock(&ao_context->use_lock);
1361                         return -EBUSY;
1362                 }
1363                 ao_context->dac_in_use = 1;
1364                 spin_unlock(&ao_context->use_lock);
1365
1366                 ao_context->mode = mode;
1367
1368                 /* Hold the context in private data */
1369                 file_p->private_data = ao_context;
1370
1371                 /* Set file operations pointer */
1372                 file_p->f_op = me4000_ao_fops_array[mode];
1373
1374                 err = me4000_ao_prepare(ao_context);
1375                 if (err) {
1376                         ao_context->dac_in_use = 0;
1377                         return 1;
1378                 }
1379         }
1380         /* Analog input */
1381         else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1382                 board = AI_BOARD(inode_p->i_rdev);
1383                 mode = AI_MODE(inode_p->i_rdev);
1384
1385                 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1386
1387                 /* Search for the board context */
1388                 for (ptr = me4000_board_info_list.next, i = 0;
1389                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1390                         board_info = list_entry(ptr, struct me4000_info, list);
1391                         if (i == board)
1392                                 break;
1393                 }
1394
1395                 if (ptr == &me4000_board_info_list) {
1396                         printk(KERN_ERR
1397                                "ME4000:me4000_open():Board %d not in device list\n",
1398                                board);
1399                         return -ENODEV;
1400                 }
1401
1402                 ai_context = board_info->ai_context;
1403
1404                 /* Check if mode is valid */
1405                 if (mode > 5) {
1406                         printk(KERN_ERR
1407                                "ME4000:me4000_open():Mode is not valid\n");
1408                         return -EINVAL;
1409                 }
1410
1411                 /* Check if already opened */
1412                 spin_lock(&ai_context->use_lock);
1413                 if (ai_context->in_use) {
1414                         printk(KERN_ERR
1415                                "ME4000:me4000_open():AI already in use\n");
1416                         spin_unlock(&ai_context->use_lock);
1417                         return -EBUSY;
1418                 }
1419                 ai_context->in_use = 1;
1420                 spin_unlock(&ai_context->use_lock);
1421
1422                 ai_context->mode = mode;
1423
1424                 /* Hold the context in private data */
1425                 file_p->private_data = ai_context;
1426
1427                 /* Set file operations pointer */
1428                 file_p->f_op = me4000_ai_fops_array[mode];
1429
1430                 /* Prepare analog input */
1431                 me4000_ai_prepare(ai_context);
1432         }
1433         /* Digital I/O */
1434         else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1435                 board = DIO_BOARD(inode_p->i_rdev);
1436                 dev = 0;
1437                 mode = 0;
1438
1439                 PDEBUG("me4000_open():board = %d\n", board);
1440
1441                 /* Search for the board context */
1442                 for (ptr = me4000_board_info_list.next;
1443                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1444                         board_info = list_entry(ptr, struct me4000_info, list);
1445                         if (board_info->board_count == board)
1446                                 break;
1447                 }
1448
1449                 if (ptr == &me4000_board_info_list) {
1450                         printk(KERN_ERR
1451                                "ME4000:me4000_open():Board %d not in device list\n",
1452                                board);
1453                         return -ENODEV;
1454                 }
1455
1456                 /* Search for the dio context */
1457                 dio_context = board_info->dio_context;
1458
1459                 /* Check if already opened */
1460                 spin_lock(&dio_context->use_lock);
1461                 if (dio_context->in_use) {
1462                         printk(KERN_ERR
1463                                "ME4000:me4000_open():DIO already in use\n");
1464                         spin_unlock(&dio_context->use_lock);
1465                         return -EBUSY;
1466                 }
1467                 dio_context->in_use = 1;
1468                 spin_unlock(&dio_context->use_lock);
1469
1470                 /* Hold the context in private data */
1471                 file_p->private_data = dio_context;
1472
1473                 /* Set file operations pointer to single functions */
1474                 file_p->f_op = &me4000_dio_fops;
1475
1476                 //me4000_dio_reset(dio_context);
1477         }
1478         /* Counters */
1479         else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1480                 board = CNT_BOARD(inode_p->i_rdev);
1481                 dev = 0;
1482                 mode = 0;
1483
1484                 PDEBUG("me4000_open():board = %d\n", board);
1485
1486                 /* Search for the board context */
1487                 for (ptr = me4000_board_info_list.next;
1488                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1489                         board_info = list_entry(ptr, struct me4000_info, list);
1490                         if (board_info->board_count == board)
1491                                 break;
1492                 }
1493
1494                 if (ptr == &me4000_board_info_list) {
1495                         printk(KERN_ERR
1496                                "ME4000:me4000_open():Board %d not in device list\n",
1497                                board);
1498                         return -ENODEV;
1499                 }
1500
1501                 /* Get the cnt context */
1502                 cnt_context = board_info->cnt_context;
1503
1504                 /* Check if already opened */
1505                 spin_lock(&cnt_context->use_lock);
1506                 if (cnt_context->in_use) {
1507                         printk(KERN_ERR
1508                                "ME4000:me4000_open():CNT already in use\n");
1509                         spin_unlock(&cnt_context->use_lock);
1510                         return -EBUSY;
1511                 }
1512                 cnt_context->in_use = 1;
1513                 spin_unlock(&cnt_context->use_lock);
1514
1515                 /* Hold the context in private data */
1516                 file_p->private_data = cnt_context;
1517
1518                 /* Set file operations pointer to single functions */
1519                 file_p->f_op = &me4000_cnt_fops;
1520         }
1521         /* External Interrupt */
1522         else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1523                 board = EXT_INT_BOARD(inode_p->i_rdev);
1524                 dev = 0;
1525                 mode = 0;
1526
1527                 PDEBUG("me4000_open():board = %d\n", board);
1528
1529                 /* Search for the board context */
1530                 for (ptr = me4000_board_info_list.next;
1531                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1532                         board_info = list_entry(ptr, struct me4000_info, list);
1533                         if (board_info->board_count == board)
1534                                 break;
1535                 }
1536
1537                 if (ptr == &me4000_board_info_list) {
1538                         printk(KERN_ERR
1539                                "ME4000:me4000_open():Board %d not in device list\n",
1540                                board);
1541                         return -ENODEV;
1542                 }
1543
1544                 /* Get the external interrupt context */
1545                 ext_int_context = board_info->ext_int_context;
1546
1547                 /* Check if already opened */
1548                 spin_lock(&cnt_context->use_lock);
1549                 if (ext_int_context->in_use) {
1550                         printk(KERN_ERR
1551                                "ME4000:me4000_open():External interrupt already in use\n");
1552                         spin_unlock(&ext_int_context->use_lock);
1553                         return -EBUSY;
1554                 }
1555                 ext_int_context->in_use = 1;
1556                 spin_unlock(&ext_int_context->use_lock);
1557
1558                 /* Hold the context in private data */
1559                 file_p->private_data = ext_int_context;
1560
1561                 /* Set file operations pointer to single functions */
1562                 file_p->f_op = &me4000_ext_int_fops;
1563
1564                 /* Request the interrupt line */
1565                 err =
1566                     request_irq(ext_int_context->irq, me4000_ext_int_isr,
1567                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1568                                 ext_int_context);
1569                 if (err) {
1570                         printk(KERN_ERR
1571                                "ME4000:me4000_open():Can't get interrupt line");
1572                         ext_int_context->in_use = 0;
1573                         return -ENODEV;
1574                 }
1575
1576                 /* Reset the counter */
1577                 me4000_ext_int_disable(ext_int_context);
1578         } else {
1579                 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1580                 return -EINVAL;
1581         }
1582
1583         return 0;
1584 }
1585
1586 static int me4000_release(struct inode *inode_p, struct file *file_p)
1587 {
1588         struct me4000_ao_context *ao_context;
1589         struct me4000_ai_context *ai_context;
1590         struct me4000_dio_context *dio_context;
1591         struct me4000_cnt_context *cnt_context;
1592         struct me4000_ext_int_context *ext_int_context;
1593
1594         CALL_PDEBUG("me4000_release() is executed\n");
1595
1596         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1597                 ao_context = file_p->private_data;
1598
1599                 /* Mark DAC as unused */
1600                 ao_context->dac_in_use = 0;
1601         } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1602                 ai_context = file_p->private_data;
1603
1604                 /* Reset the analog input */
1605                 me4000_ai_reset(ai_context);
1606
1607                 /* Free the interrupt and the circular buffer */
1608                 if (ai_context->mode) {
1609                         free_irq(ai_context->irq, ai_context);
1610                         kfree(ai_context->circ_buf.buf);
1611                         ai_context->circ_buf.buf = NULL;
1612                         ai_context->circ_buf.head = 0;
1613                         ai_context->circ_buf.tail = 0;
1614                 }
1615
1616                 /* Mark AI as unused */
1617                 ai_context->in_use = 0;
1618         } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1619                 dio_context = file_p->private_data;
1620
1621                 /* Mark digital I/O as unused */
1622                 dio_context->in_use = 0;
1623         } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1624                 cnt_context = file_p->private_data;
1625
1626                 /* Mark counters as unused */
1627                 cnt_context->in_use = 0;
1628         } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1629                 ext_int_context = file_p->private_data;
1630
1631                 /* Disable the externel interrupt */
1632                 me4000_ext_int_disable(ext_int_context);
1633
1634                 free_irq(ext_int_context->irq, ext_int_context);
1635
1636                 /* Mark as unused */
1637                 ext_int_context->in_use = 0;
1638         } else {
1639                 printk(KERN_ERR
1640                        "ME4000:me4000_release():Major number unknown\n");
1641                 return -EINVAL;
1642         }
1643
1644         return 0;
1645 }
1646
1647 /*------------------------------- Analog output stuff --------------------------------------*/
1648
1649 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1650 {
1651         unsigned long flags;
1652
1653         CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1654
1655         if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1656                 /* Only do anything if not already in the correct mode */
1657                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1658                 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1659                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1660                         return 0;
1661                 }
1662
1663                 /* Stop any conversion */
1664                 me4000_ao_immediate_stop(ao_context);
1665
1666                 /* Set the control register to default state  */
1667                 spin_lock_irqsave(&ao_context->int_lock, flags);
1668                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1669                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1670                             ME4000_AO_CTRL_BIT_STOP |
1671                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1672                             ao_context->ctrl_reg);
1673                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1674
1675                 /* Set to fastest sample rate */
1676                 me4000_outl(65, ao_context->timer_reg);
1677         } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1678                 /* Only do anything if not already in the correct mode */
1679                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1680                 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1681                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1682                         return 0;
1683                 }
1684
1685                 /* Stop any conversion */
1686                 me4000_ao_immediate_stop(ao_context);
1687
1688                 /* Set the control register to default state  */
1689                 spin_lock_irqsave(&ao_context->int_lock, flags);
1690                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1691                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1692                             ME4000_AO_CTRL_BIT_STOP |
1693                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1694                             ao_context->ctrl_reg);
1695                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1696
1697                 /* Set to fastest sample rate */
1698                 me4000_outl(65, ao_context->timer_reg);
1699         } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1700                 /* Only do anything if not already in the correct mode */
1701                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1702                 if (!
1703                     (mode &
1704                      (ME4000_AO_CONV_MODE_WRAPAROUND |
1705                       ME4000_AO_CONV_MODE_CONTINUOUS))) {
1706                         return 0;
1707                 }
1708
1709                 /* Stop any conversion */
1710                 me4000_ao_immediate_stop(ao_context);
1711
1712                 /* Clear the control register */
1713                 spin_lock_irqsave(&ao_context->int_lock, flags);
1714                 me4000_outl(0x0, ao_context->ctrl_reg);
1715                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1716
1717                 /* Set voltage to 0V */
1718                 me4000_outl(0x8000, ao_context->single_reg);
1719         } else {
1720                 printk(KERN_ERR
1721                        "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1722                 return -EINVAL;
1723         }
1724
1725         return 0;
1726 }
1727
1728 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1729 {
1730         u32 tmp;
1731         wait_queue_head_t queue;
1732         unsigned long flags;
1733
1734         CALL_PDEBUG("me4000_ao_reset() is executed\n");
1735
1736         init_waitqueue_head(&queue);
1737
1738         if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1739                 /*
1740                  * First stop conversion of the DAC before reconfigure.
1741                  * This is essantial, cause of the state machine.
1742                  * If not stopped before configuring mode, it could
1743                  * walk in a undefined state.
1744                  */
1745                 tmp = me4000_inl(ao_context->ctrl_reg);
1746                 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1747                 me4000_outl(tmp, ao_context->ctrl_reg);
1748
1749                 wait_event_timeout(queue,
1750                         (inl(ao_context->status_reg) &
1751                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1752                         1);
1753
1754                 /* Set to transparent mode */
1755                 me4000_ao_simultaneous_disable(ao_context);
1756
1757                 /* Set to single mode in order to set default voltage */
1758                 me4000_outl(0x0, ao_context->ctrl_reg);
1759
1760                 /* Set voltage to 0V */
1761                 me4000_outl(0x8000, ao_context->single_reg);
1762
1763                 /* Set to fastest sample rate */
1764                 me4000_outl(65, ao_context->timer_reg);
1765
1766                 /* Set the original mode and enable FIFO */
1767                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1768                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1769                             ME4000_AO_CTRL_BIT_STOP |
1770                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1771                             ao_context->ctrl_reg);
1772         } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1773                 /*
1774                  * First stop conversion of the DAC before reconfigure.
1775                  * This is essantial, cause of the state machine.
1776                  * If not stopped before configuring mode, it could
1777                  * walk in a undefined state.
1778                  */
1779                 spin_lock_irqsave(&ao_context->int_lock, flags);
1780                 tmp = me4000_inl(ao_context->ctrl_reg);
1781                 tmp |= ME4000_AO_CTRL_BIT_STOP;
1782                 me4000_outl(tmp, ao_context->ctrl_reg);
1783                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1784
1785                 wait_event_timeout(queue,
1786                         (inl(ao_context->status_reg) &
1787                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1788                         1);
1789
1790                 /* Clear the circular buffer */
1791                 ao_context->circ_buf.head = 0;
1792                 ao_context->circ_buf.tail = 0;
1793
1794                 /* Set to transparent mode */
1795                 me4000_ao_simultaneous_disable(ao_context);
1796
1797                 /* Set to single mode in order to set default voltage */
1798                 spin_lock_irqsave(&ao_context->int_lock, flags);
1799                 tmp = me4000_inl(ao_context->ctrl_reg);
1800                 me4000_outl(0x0, ao_context->ctrl_reg);
1801
1802                 /* Set voltage to 0V */
1803                 me4000_outl(0x8000, ao_context->single_reg);
1804
1805                 /* Set to fastest sample rate */
1806                 me4000_outl(65, ao_context->timer_reg);
1807
1808                 /* Set the original mode and enable FIFO */
1809                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1810                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1811                             ME4000_AO_CTRL_BIT_STOP |
1812                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1813                             ao_context->ctrl_reg);
1814                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1815         } else {
1816                 /* Set to transparent mode */
1817                 me4000_ao_simultaneous_disable(ao_context);
1818
1819                 /* Set voltage to 0V */
1820                 me4000_outl(0x8000, ao_context->single_reg);
1821         }
1822
1823         return 0;
1824 }
1825
1826 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1827                                     size_t cnt, loff_t *offp)
1828 {
1829         struct me4000_ao_context *ao_context = filep->private_data;
1830         u32 value;
1831         const u16 *buffer = (const u16 *)buff;
1832
1833         CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1834
1835         if (cnt != 2) {
1836                 printk(KERN_ERR
1837                        "%s:Write count is not 2\n", __func__);
1838                 return -EINVAL;
1839         }
1840
1841         if (get_user(value, buffer)) {
1842                 printk(KERN_ERR
1843                        "%s:Cannot copy data from user\n", __func__);
1844                 return -EFAULT;
1845         }
1846
1847         me4000_outl(value, ao_context->single_reg);
1848
1849         return 2;
1850 }
1851
1852 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1853                                     size_t cnt, loff_t *offp)
1854 {
1855         struct me4000_ao_context *ao_context = filep->private_data;
1856         size_t i;
1857         u32 value;
1858         u32 tmp;
1859         const u16 *buffer = (const u16 *)buff;
1860         size_t count = cnt / 2;
1861
1862         CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1863
1864         /* Check if a conversion is already running */
1865         if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1866                 printk(KERN_ERR
1867                        "%s:There is already a conversion running\n", __func__);
1868                 return -EBUSY;
1869         }
1870
1871         if (count > ME4000_AO_FIFO_COUNT) {
1872                 printk(KERN_ERR
1873                        "%s:Can't load more than %d values\n", __func__,
1874                        ME4000_AO_FIFO_COUNT);
1875                 return -ENOSPC;
1876         }
1877
1878         /* Reset the FIFO */
1879         tmp = inl(ao_context->ctrl_reg);
1880         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1881         outl(tmp, ao_context->ctrl_reg);
1882         tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1883         outl(tmp, ao_context->ctrl_reg);
1884
1885         for (i = 0; i < count; i++) {
1886                 if (get_user(value, buffer + i)) {
1887                         printk(KERN_ERR
1888                                "%s:Cannot copy data from user\n", __func__);
1889                         return -EFAULT;
1890                 }
1891                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1892                     || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1893                         value = value << 16;
1894                 outl(value, ao_context->fifo_reg);
1895         }
1896         CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1897
1898         return i * 2;
1899 }
1900
1901 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1902                                     size_t cnt, loff_t *offp)
1903 {
1904         struct me4000_ao_context *ao_context = filep->private_data;
1905         const u16 *buffer = (const u16 *)buff;
1906         size_t count = cnt / 2;
1907         unsigned long flags;
1908         u32 tmp;
1909         int c = 0;
1910         int k = 0;
1911         int ret = 0;
1912         u16 svalue;
1913         u32 lvalue;
1914         int i;
1915         wait_queue_head_t queue;
1916
1917         CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1918
1919         init_waitqueue_head(&queue);
1920
1921         /* Check count */
1922         if (count <= 0) {
1923                 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1924                 return 0;
1925         }
1926
1927         if (filep->f_flags & O_APPEND) {
1928                 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1929                 while (count > 0) {
1930                         if (filep->f_flags & O_NONBLOCK) {
1931                                 if (ao_context->pipe_flag) {
1932                                         printk(KERN_ERR
1933                                                "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1934                                         return -EPIPE;
1935                                 }
1936                                 c = me4000_space_to_end(ao_context->circ_buf,
1937                                                         ME4000_AO_BUFFER_COUNT);
1938                                 if (!c) {
1939                                         PDEBUG
1940                                             ("me4000_ao_write_cont():Returning from nonblocking write\n");
1941                                         break;
1942                                 }
1943                         } else {
1944                                 wait_event_interruptible(ao_context->wait_queue,
1945                                                          (c =
1946                                                           me4000_space_to_end
1947                                                           (ao_context->circ_buf,
1948                                                            ME4000_AO_BUFFER_COUNT)));
1949                                 if (ao_context->pipe_flag) {
1950                                         printk(KERN_ERR
1951                                                "me4000_ao_write_cont():Broken pipe in blocking write\n");
1952                                         return -EPIPE;
1953                                 }
1954                                 if (signal_pending(current)) {
1955                                         printk(KERN_ERR
1956                                                "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1957                                         return -EINTR;
1958                                 }
1959                         }
1960
1961                         PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1962
1963                         /* Only able to write size of free buffer or size of count */
1964                         if (count < c)
1965                                 c = count;
1966
1967                         k = 2 * c;
1968                         k -= copy_from_user(ao_context->circ_buf.buf +
1969                                             ao_context->circ_buf.head, buffer,
1970                                             k);
1971                         c = k / 2;
1972                         PDEBUG
1973                             ("me4000_ao_write_cont():Copy %d values from user space\n",
1974                              c);
1975
1976                         if (!c)
1977                                 return -EFAULT;
1978
1979                         ao_context->circ_buf.head =
1980                             (ao_context->circ_buf.head +
1981                              c) & (ME4000_AO_BUFFER_COUNT - 1);
1982                         buffer += c;
1983                         count -= c;
1984                         ret += c;
1985
1986                         /* Values are now available so enable interrupts */
1987                         spin_lock_irqsave(&ao_context->int_lock, flags);
1988                         if (me4000_buf_count
1989                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1990                                 tmp = me4000_inl(ao_context->ctrl_reg);
1991                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1992                                 me4000_outl(tmp, ao_context->ctrl_reg);
1993                         }
1994                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
1995                 }
1996
1997                 /* Wait until the state machine is stopped if O_SYNC is set */
1998                 if (filep->f_flags & O_SYNC) {
1999                         while (inl(ao_context->status_reg) &
2000                                ME4000_AO_STATUS_BIT_FSM) {
2001                                 interruptible_sleep_on_timeout(&queue, 1);
2002                                 if (ao_context->pipe_flag) {
2003                                         PDEBUG
2004                                             ("me4000_ao_write_cont():Broken pipe detected after sync\n");
2005                                         return -EPIPE;
2006                                 }
2007                                 if (signal_pending(current)) {
2008                                         printk(KERN_ERR
2009                                                "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
2010                                         return -EINTR;
2011                                 }
2012                         }
2013                 }
2014         } else {
2015                 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2016                 if ((me4000_inl(ao_context->status_reg) &
2017                      ME4000_AO_STATUS_BIT_FSM)) {
2018                         printk(KERN_ERR
2019                                "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2020                         return -EBUSY;
2021                 }
2022
2023                 /* Clear the FIFO */
2024                 spin_lock_irqsave(&ao_context->int_lock, flags);
2025                 tmp = me4000_inl(ao_context->ctrl_reg);
2026                 tmp &=
2027                     ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2028                       ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2029                 me4000_outl(tmp, ao_context->ctrl_reg);
2030                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2031                 me4000_outl(tmp, ao_context->ctrl_reg);
2032                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2033
2034                 /* Clear the circular buffer */
2035                 ao_context->circ_buf.head = 0;
2036                 ao_context->circ_buf.tail = 0;
2037
2038                 /* Reset the broken pipe flag */
2039                 ao_context->pipe_flag = 0;
2040
2041                 /* Only able to write size of fifo or count */
2042                 c = ME4000_AO_FIFO_COUNT;
2043                 if (count < c)
2044                         c = count;
2045
2046                 PDEBUG
2047                     ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2048                      c, ao_context->fifo_reg);
2049
2050                 /* Write values to the fifo */
2051                 for (i = 0; i < c; i++) {
2052                         if (get_user(svalue, buffer))
2053                                 return -EFAULT;
2054
2055                         if (((ao_context->fifo_reg & 0xFF) ==
2056                              ME4000_AO_01_FIFO_REG)
2057                             || ((ao_context->fifo_reg & 0xFF) ==
2058                                 ME4000_AO_03_FIFO_REG)) {
2059                                 lvalue = ((u32) svalue) << 16;
2060                         } else
2061                                 lvalue = (u32) svalue;
2062
2063                         outl(lvalue, ao_context->fifo_reg);
2064                         buffer++;
2065                 }
2066                 count -= c;
2067                 ret += c;
2068
2069                 while (1) {
2070                         /* Get free buffer */
2071                         c = me4000_space_to_end(ao_context->circ_buf,
2072                                                 ME4000_AO_BUFFER_COUNT);
2073
2074                         if (c == 0)
2075                                 return (2 * ret);
2076
2077                         /* Only able to write size of free buffer or size of count */
2078                         if (count < c)
2079                                 c = count;
2080
2081                         /* If count = 0 return to user */
2082                         if (c <= 0) {
2083                                 PDEBUG
2084                                     ("me4000_ao_write_cont():Count reached 0\n");
2085                                 break;
2086                         }
2087
2088                         k = 2 * c;
2089                         k -= copy_from_user(ao_context->circ_buf.buf +
2090                                             ao_context->circ_buf.head, buffer,
2091                                             k);
2092                         c = k / 2;
2093                         PDEBUG
2094                             ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2095                              c);
2096
2097                         if (!c)
2098                                 return -EFAULT;
2099
2100                         ao_context->circ_buf.head =
2101                             (ao_context->circ_buf.head +
2102                              c) & (ME4000_AO_BUFFER_COUNT - 1);
2103                         buffer += c;
2104                         count -= c;
2105                         ret += c;
2106
2107                         /* If values in the buffer are available so enable interrupts */
2108                         spin_lock_irqsave(&ao_context->int_lock, flags);
2109                         if (me4000_buf_count
2110                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2111                                 PDEBUG
2112                                     ("me4000_ao_write_cont():Enable Interrupts\n");
2113                                 tmp = me4000_inl(ao_context->ctrl_reg);
2114                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2115                                 me4000_outl(tmp, ao_context->ctrl_reg);
2116                         }
2117                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2118                 }
2119         }
2120
2121         if (filep->f_flags & O_NONBLOCK) {
2122                 return (ret == 0) ? -EAGAIN : 2 * ret;
2123         }
2124
2125         return 2 * ret;
2126 }
2127
2128 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2129 {
2130         struct me4000_ao_context *ao_context;
2131         unsigned long mask = 0;
2132
2133         CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2134
2135         ao_context = file_p->private_data;
2136
2137         poll_wait(file_p, &ao_context->wait_queue, wait);
2138
2139         /* Get free buffer */
2140         if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2141                 mask |= POLLOUT | POLLWRNORM;
2142
2143         CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2144
2145         return mask;
2146 }
2147
2148 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2149                                 int datasync)
2150 {
2151         struct me4000_ao_context *ao_context;
2152         wait_queue_head_t queue;
2153
2154         CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2155
2156         ao_context = file_p->private_data;
2157         init_waitqueue_head(&queue);
2158
2159         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2160                 interruptible_sleep_on_timeout(&queue, 1);
2161                         wait_event_interruptible_timeout(queue,
2162                         !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2163                         1);
2164                 if (ao_context->pipe_flag) {
2165                         printk(KERN_ERR
2166                                "%s:Broken pipe detected\n", __func__);
2167                         return -EPIPE;
2168                 }
2169
2170                 if (signal_pending(current)) {
2171                         printk(KERN_ERR
2172                                "%s:Wait on state machine interrupted\n",
2173                                __func__);
2174                         return -EINTR;
2175                 }
2176         }
2177
2178         return 0;
2179 }
2180
2181 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2182                                 unsigned int service, unsigned long arg)
2183 {
2184         struct me4000_ao_context *ao_context;
2185
2186         CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2187
2188         ao_context = file_p->private_data;
2189
2190         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2191                 return -ENOTTY;
2192                 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2193         }
2194
2195         switch (service) {
2196         case ME4000_AO_EX_TRIG_SETUP:
2197                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2198         case ME4000_AO_EX_TRIG_ENABLE:
2199                 return me4000_ao_ex_trig_enable(ao_context);
2200         case ME4000_AO_EX_TRIG_DISABLE:
2201                 return me4000_ao_ex_trig_disable(ao_context);
2202         case ME4000_AO_PRELOAD:
2203                 return me4000_ao_preload(ao_context);
2204         case ME4000_AO_PRELOAD_UPDATE:
2205                 return me4000_ao_preload_update(ao_context);
2206         case ME4000_GET_USER_INFO:
2207                 return me4000_get_user_info((struct me4000_user_info *)arg,
2208                                             ao_context->board_info);
2209         case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2210                 return me4000_ao_simultaneous_ex_trig(ao_context);
2211         case ME4000_AO_SIMULTANEOUS_SW:
2212                 return me4000_ao_simultaneous_sw(ao_context);
2213         case ME4000_AO_SIMULTANEOUS_DISABLE:
2214                 return me4000_ao_simultaneous_disable(ao_context);
2215         case ME4000_AO_SIMULTANEOUS_UPDATE:
2216                 return
2217                     me4000_ao_simultaneous_update(
2218                                 (struct me4000_ao_channel_list *)arg,
2219                                 ao_context);
2220         case ME4000_AO_EX_TRIG_TIMEOUT:
2221                 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2222                                                  ao_context);
2223         case ME4000_AO_DISABLE_DO:
2224                 return me4000_ao_disable_do(ao_context);
2225         default:
2226                 printk(KERN_ERR
2227                        "me4000_ao_ioctl_sing():Service number invalid\n");
2228                 return -ENOTTY;
2229         }
2230
2231         return 0;
2232 }
2233
2234 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2235                                 unsigned int service, unsigned long arg)
2236 {
2237         struct me4000_ao_context *ao_context;
2238
2239         CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2240
2241         ao_context = file_p->private_data;
2242
2243         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2244                 return -ENOTTY;
2245                 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2246         }
2247
2248         switch (service) {
2249         case ME4000_AO_START:
2250                 return me4000_ao_start((unsigned long *)arg, ao_context);
2251         case ME4000_AO_STOP:
2252                 return me4000_ao_stop(ao_context);
2253         case ME4000_AO_IMMEDIATE_STOP:
2254                 return me4000_ao_immediate_stop(ao_context);
2255         case ME4000_AO_RESET:
2256                 return me4000_ao_reset(ao_context);
2257         case ME4000_AO_TIMER_SET_DIVISOR:
2258                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2259         case ME4000_AO_EX_TRIG_SETUP:
2260                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2261         case ME4000_AO_EX_TRIG_ENABLE:
2262                 return me4000_ao_ex_trig_enable(ao_context);
2263         case ME4000_AO_EX_TRIG_DISABLE:
2264                 return me4000_ao_ex_trig_disable(ao_context);
2265         case ME4000_GET_USER_INFO:
2266                 return me4000_get_user_info((struct me4000_user_info *)arg,
2267                                             ao_context->board_info);
2268         case ME4000_AO_FSM_STATE:
2269                 return me4000_ao_fsm_state((int *)arg, ao_context);
2270         case ME4000_AO_ENABLE_DO:
2271                 return me4000_ao_enable_do(ao_context);
2272         case ME4000_AO_DISABLE_DO:
2273                 return me4000_ao_disable_do(ao_context);
2274         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2275                 return me4000_ao_synchronous_ex_trig(ao_context);
2276         case ME4000_AO_SYNCHRONOUS_SW:
2277                 return me4000_ao_synchronous_sw(ao_context);
2278         case ME4000_AO_SYNCHRONOUS_DISABLE:
2279                 return me4000_ao_synchronous_disable(ao_context);
2280         default:
2281                 return -ENOTTY;
2282         }
2283         return 0;
2284 }
2285
2286 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2287                                 unsigned int service, unsigned long arg)
2288 {
2289         struct me4000_ao_context *ao_context;
2290
2291         CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2292
2293         ao_context = file_p->private_data;
2294
2295         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2296                 return -ENOTTY;
2297                 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2298         }
2299
2300         switch (service) {
2301         case ME4000_AO_START:
2302                 return me4000_ao_start((unsigned long *)arg, ao_context);
2303         case ME4000_AO_STOP:
2304                 return me4000_ao_stop(ao_context);
2305         case ME4000_AO_IMMEDIATE_STOP:
2306                 return me4000_ao_immediate_stop(ao_context);
2307         case ME4000_AO_RESET:
2308                 return me4000_ao_reset(ao_context);
2309         case ME4000_AO_TIMER_SET_DIVISOR:
2310                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2311         case ME4000_AO_EX_TRIG_SETUP:
2312                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2313         case ME4000_AO_EX_TRIG_ENABLE:
2314                 return me4000_ao_ex_trig_enable(ao_context);
2315         case ME4000_AO_EX_TRIG_DISABLE:
2316                 return me4000_ao_ex_trig_disable(ao_context);
2317         case ME4000_AO_ENABLE_DO:
2318                 return me4000_ao_enable_do(ao_context);
2319         case ME4000_AO_DISABLE_DO:
2320                 return me4000_ao_disable_do(ao_context);
2321         case ME4000_AO_FSM_STATE:
2322                 return me4000_ao_fsm_state((int *)arg, ao_context);
2323         case ME4000_GET_USER_INFO:
2324                 return me4000_get_user_info((struct me4000_user_info *)arg,
2325                                             ao_context->board_info);
2326         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2327                 return me4000_ao_synchronous_ex_trig(ao_context);
2328         case ME4000_AO_SYNCHRONOUS_SW:
2329                 return me4000_ao_synchronous_sw(ao_context);
2330         case ME4000_AO_SYNCHRONOUS_DISABLE:
2331                 return me4000_ao_synchronous_disable(ao_context);
2332         case ME4000_AO_GET_FREE_BUFFER:
2333                 return me4000_ao_get_free_buffer((unsigned long *)arg,
2334                                                  ao_context);
2335         default:
2336                 return -ENOTTY;
2337         }
2338         return 0;
2339 }
2340
2341 static int me4000_ao_start(unsigned long *arg,
2342                            struct me4000_ao_context *ao_context)
2343 {
2344         u32 tmp;
2345         wait_queue_head_t queue;
2346         unsigned long ref;
2347         unsigned long timeout;
2348         unsigned long flags;
2349
2350         CALL_PDEBUG("me4000_ao_start() is executed\n");
2351
2352         if (get_user(timeout, arg)) {
2353                 printk(KERN_ERR
2354                        "me4000_ao_start():Cannot copy data from user\n");
2355                 return -EFAULT;
2356         }
2357
2358         init_waitqueue_head(&queue);
2359
2360         spin_lock_irqsave(&ao_context->int_lock, flags);
2361         tmp = inl(ao_context->ctrl_reg);
2362         tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2363         me4000_outl(tmp, ao_context->ctrl_reg);
2364         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2365
2366         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2367                 if (timeout) {
2368                         ref = jiffies;
2369                         while (!
2370                                (inl(ao_context->status_reg) &
2371                                 ME4000_AO_STATUS_BIT_FSM)) {
2372                                 interruptible_sleep_on_timeout(&queue, 1);
2373                                 if (signal_pending(current)) {
2374                                         printk(KERN_ERR
2375                                                "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2376                                         return -EINTR;
2377                                 }
2378                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2379                                         printk(KERN_ERR
2380                                                "ME4000:me4000_ao_start():Timeout reached\n");
2381                                         return -EIO;
2382                                 }
2383                         }
2384                 }
2385         } else {
2386                 me4000_outl(0x8000, ao_context->single_reg);
2387         }
2388
2389         return 0;
2390 }
2391
2392 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2393 {
2394         u32 tmp;
2395         wait_queue_head_t queue;
2396         unsigned long flags;
2397
2398         init_waitqueue_head(&queue);
2399
2400         CALL_PDEBUG("me4000_ao_stop() is executed\n");
2401
2402         /* Set the stop bit */
2403         spin_lock_irqsave(&ao_context->int_lock, flags);
2404         tmp = inl(ao_context->ctrl_reg);
2405         tmp |= ME4000_AO_CTRL_BIT_STOP;
2406         me4000_outl(tmp, ao_context->ctrl_reg);
2407         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2408
2409         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2410                 interruptible_sleep_on_timeout(&queue, 1);
2411                 if (signal_pending(current)) {
2412                         printk(KERN_ERR
2413                                "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2414                         return -EINTR;
2415                 }
2416         }
2417
2418         /* Clear the stop bit */
2419         //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2420         //me4000_outl(tmp, ao_context->ctrl_reg);
2421
2422         return 0;
2423 }
2424
2425 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2426 {
2427         u32 tmp;
2428         wait_queue_head_t queue;
2429         unsigned long flags;
2430
2431         init_waitqueue_head(&queue);
2432
2433         CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2434
2435         spin_lock_irqsave(&ao_context->int_lock, flags);
2436         tmp = inl(ao_context->ctrl_reg);
2437         tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2438         me4000_outl(tmp, ao_context->ctrl_reg);
2439         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2440
2441         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2442                 interruptible_sleep_on_timeout(&queue, 1);
2443                 if (signal_pending(current)) {
2444                         printk(KERN_ERR
2445                                "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2446                         return -EINTR;
2447                 }
2448         }
2449
2450         /* Clear the stop bits */
2451         //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2452         //me4000_outl(tmp, ao_context->ctrl_reg);
2453
2454         return 0;
2455 }
2456
2457 static int me4000_ao_timer_set_divisor(u32 *arg,
2458                                        struct me4000_ao_context *ao_context)
2459 {
2460         u32 divisor;
2461         u32 tmp;
2462
2463         CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2464
2465         if (get_user(divisor, arg))
2466                 return -EFAULT;
2467
2468         /* Check if the state machine is stopped */
2469         tmp = me4000_inl(ao_context->status_reg);
2470         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2471                 printk(KERN_ERR
2472                        "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2473                 return -EBUSY;
2474         }
2475
2476         PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2477                divisor);
2478
2479         /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2480         if (divisor < ME4000_AO_MIN_TICKS) {
2481                 printk(KERN_ERR
2482                        "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2483                 return -EINVAL;
2484         }
2485
2486         /* Fix bug in Firmware */
2487         divisor -= 2;
2488
2489         PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2490
2491         /* Write the divisor */
2492         me4000_outl(divisor, ao_context->timer_reg);
2493
2494         return 0;
2495 }
2496
2497 static int me4000_ao_ex_trig_set_edge(int *arg,
2498                                       struct me4000_ao_context *ao_context)
2499 {
2500         int mode;
2501         u32 tmp;
2502         unsigned long flags;
2503
2504         CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2505
2506         if (get_user(mode, arg))
2507                 return -EFAULT;
2508
2509         /* Check if the state machine is stopped */
2510         tmp = me4000_inl(ao_context->status_reg);
2511         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2512                 printk(KERN_ERR
2513                        "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2514                 return -EBUSY;
2515         }
2516
2517         if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2518                 spin_lock_irqsave(&ao_context->int_lock, flags);
2519                 tmp = me4000_inl(ao_context->ctrl_reg);
2520                 tmp &=
2521                     ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2522                       ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2523                 me4000_outl(tmp, ao_context->ctrl_reg);
2524                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2525         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2526                 spin_lock_irqsave(&ao_context->int_lock, flags);
2527                 tmp = me4000_inl(ao_context->ctrl_reg);
2528                 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2529                 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2530                 me4000_outl(tmp, ao_context->ctrl_reg);
2531                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2532         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2533                 spin_lock_irqsave(&ao_context->int_lock, flags);
2534                 tmp = me4000_inl(ao_context->ctrl_reg);
2535                 tmp |=
2536                     ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2537                     ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2538                 me4000_outl(tmp, ao_context->ctrl_reg);
2539                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2540         } else {
2541                 printk(KERN_ERR
2542                        "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2543                 return -EINVAL;
2544         }
2545
2546         return 0;
2547 }
2548
2549 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2550 {
2551         u32 tmp;
2552         unsigned long flags;
2553
2554         CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2555
2556         /* Check if the state machine is stopped */
2557         tmp = me4000_inl(ao_context->status_reg);
2558         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2559                 printk(KERN_ERR
2560                        "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2561                 return -EBUSY;
2562         }
2563
2564         spin_lock_irqsave(&ao_context->int_lock, flags);
2565         tmp = me4000_inl(ao_context->ctrl_reg);
2566         tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2567         me4000_outl(tmp, ao_context->ctrl_reg);
2568         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2569
2570         return 0;
2571 }
2572
2573 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2574 {
2575         u32 tmp;
2576         unsigned long flags;
2577
2578         CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2579
2580         /* Check if the state machine is stopped */
2581         tmp = me4000_inl(ao_context->status_reg);
2582         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2583                 printk(KERN_ERR
2584                        "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2585                 return -EBUSY;
2586         }
2587
2588         spin_lock_irqsave(&ao_context->int_lock, flags);
2589         tmp = me4000_inl(ao_context->ctrl_reg);
2590         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2591         me4000_outl(tmp, ao_context->ctrl_reg);
2592         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2593
2594         return 0;
2595 }
2596
2597 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2598 {
2599         u32 tmp;
2600
2601         CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2602
2603         /* Check if the state machine is stopped */
2604         /* Be careful here because this function is called from
2605            me4000_ao_synchronous disable */
2606         tmp = me4000_inl(ao_context->status_reg);
2607         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2608                 printk(KERN_ERR
2609                        "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2610                 return -EBUSY;
2611         }
2612
2613         spin_lock(&ao_context->board_info->preload_lock);
2614         tmp = me4000_inl(ao_context->preload_reg);
2615         tmp &= ~(0x1 << ao_context->index);     // Disable preload bit
2616         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2617         me4000_outl(tmp, ao_context->preload_reg);
2618         spin_unlock(&ao_context->board_info->preload_lock);
2619
2620         return 0;
2621 }
2622
2623 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2624 {
2625         u32 tmp;
2626
2627         CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2628
2629         spin_lock(&ao_context->board_info->preload_lock);
2630         tmp = me4000_inl(ao_context->preload_reg);
2631         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2632         tmp |= (0x1 << (ao_context->index + 16));       // Enable hw simultaneous bit
2633         me4000_outl(tmp, ao_context->preload_reg);
2634         spin_unlock(&ao_context->board_info->preload_lock);
2635
2636         return 0;
2637 }
2638
2639 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2640 {
2641         u32 tmp;
2642
2643         CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2644
2645         spin_lock(&ao_context->board_info->preload_lock);
2646         tmp = me4000_inl(ao_context->preload_reg);
2647         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2648         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2649         me4000_outl(tmp, ao_context->preload_reg);
2650         spin_unlock(&ao_context->board_info->preload_lock);
2651
2652         return 0;
2653 }
2654
2655 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2656 {
2657         CALL_PDEBUG("me4000_ao_preload() is executed\n");
2658         return me4000_ao_simultaneous_sw(ao_context);
2659 }
2660
2661 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2662 {
2663         u32 tmp;
2664         u32 ctrl;
2665         struct list_head *entry;
2666
2667         CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2668
2669         spin_lock(&ao_context->board_info->preload_lock);
2670         tmp = me4000_inl(ao_context->preload_reg);
2671         list_for_each(entry, &ao_context->board_info->ao_context_list) {
2672                 /* The channels we update must be in the following state :
2673                    - Mode A
2674                    - Hardware trigger is disabled
2675                    - Corresponding simultaneous bit is reset
2676                  */
2677                 ctrl = me4000_inl(ao_context->ctrl_reg);
2678                 if (!
2679                     (ctrl &
2680                      (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2681                       ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2682                         if (!
2683                             (tmp &
2684                              (0x1 <<
2685                               (((struct me4000_ao_context *)entry)->index
2686                                                                       + 16)))) {
2687                                 tmp &=
2688                                     ~(0x1 <<
2689                                       (((struct me4000_ao_context *)entry)->
2690                                                                         index));
2691                         }
2692                 }
2693         }
2694         me4000_outl(tmp, ao_context->preload_reg);
2695         spin_unlock(&ao_context->board_info->preload_lock);
2696
2697         return 0;
2698 }
2699
2700 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2701                                          struct me4000_ao_context *ao_context)
2702 {
2703         int err;
2704         int i;
2705         u32 tmp;
2706         struct me4000_ao_channel_list channels;
2707
2708         CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2709
2710         /* Copy data from user */
2711         err = copy_from_user(&channels, arg,
2712                         sizeof(struct me4000_ao_channel_list));
2713         if (err) {
2714                 printk(KERN_ERR
2715                        "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2716                 return -EFAULT;
2717         }
2718
2719         channels.list =
2720             kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2721         if (!channels.list) {
2722                 printk(KERN_ERR
2723                        "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2724                 return -ENOMEM;
2725         }
2726
2727         /* Copy channel list from user */
2728         err =
2729             copy_from_user(channels.list, arg->list,
2730                            sizeof(unsigned long) * channels.count);
2731         if (err) {
2732                 printk(KERN_ERR
2733                        "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2734                 kfree(channels.list);
2735                 return -EFAULT;
2736         }
2737
2738         spin_lock(&ao_context->board_info->preload_lock);
2739         tmp = me4000_inl(ao_context->preload_reg);
2740         for (i = 0; i < channels.count; i++) {
2741                 if (channels.list[i] >
2742                     ao_context->board_info->board_p->ao.count) {
2743                         spin_unlock(&ao_context->board_info->preload_lock);
2744                         kfree(channels.list);
2745                         printk(KERN_ERR
2746                                "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2747                         return -EFAULT;
2748                 }
2749                 tmp &= ~(0x1 << channels.list[i]);      // Clear the preload bit
2750                 tmp &= ~(0x1 << (channels.list[i] + 16));       // Clear the hw simultaneous bit
2751         }
2752         me4000_outl(tmp, ao_context->preload_reg);
2753         spin_unlock(&ao_context->board_info->preload_lock);
2754         kfree(channels.list);
2755
2756         return 0;
2757 }
2758
2759 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2760 {
2761         u32 tmp;
2762         unsigned long flags;
2763
2764         CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2765
2766         /* Check if the state machine is stopped */
2767         tmp = me4000_inl(ao_context->status_reg);
2768         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2769                 printk(KERN_ERR
2770                        "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2771                 return -EBUSY;
2772         }
2773
2774         spin_lock(&ao_context->board_info->preload_lock);
2775         tmp = me4000_inl(ao_context->preload_reg);
2776         tmp &= ~(0x1 << ao_context->index);     // Disable synchronous sw bit
2777         tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2778         me4000_outl(tmp, ao_context->preload_reg);
2779         spin_unlock(&ao_context->board_info->preload_lock);
2780
2781         /* Make runnable */
2782         spin_lock_irqsave(&ao_context->int_lock, flags);
2783         tmp = me4000_inl(ao_context->ctrl_reg);
2784         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2785                 tmp &=
2786                     ~(ME4000_AO_CTRL_BIT_STOP |
2787                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2788                 me4000_outl(tmp, ao_context->ctrl_reg);
2789         }
2790         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2791
2792         return 0;
2793 }
2794
2795 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2796 {
2797         u32 tmp;
2798         unsigned long flags;
2799
2800         CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2801
2802         /* Check if the state machine is stopped */
2803         tmp = me4000_inl(ao_context->status_reg);
2804         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2805                 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2806                 return -EBUSY;
2807         }
2808
2809         spin_lock(&ao_context->board_info->preload_lock);
2810         tmp = me4000_inl(ao_context->preload_reg);
2811         tmp |= 0x1 << ao_context->index;        // Enable synchronous sw bit
2812         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable synchronous hw bit
2813         me4000_outl(tmp, ao_context->preload_reg);
2814         spin_unlock(&ao_context->board_info->preload_lock);
2815
2816         /* Make runnable */
2817         spin_lock_irqsave(&ao_context->int_lock, flags);
2818         tmp = me4000_inl(ao_context->ctrl_reg);
2819         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2820                 tmp &=
2821                     ~(ME4000_AO_CTRL_BIT_STOP |
2822                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2823                 me4000_outl(tmp, ao_context->ctrl_reg);
2824         }
2825         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2826
2827         return 0;
2828 }
2829
2830 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2831 {
2832         return me4000_ao_simultaneous_disable(ao_context);
2833 }
2834
2835 static int me4000_ao_get_free_buffer(unsigned long *arg,
2836                                      struct me4000_ao_context *ao_context)
2837 {
2838         unsigned long c;
2839         int err;
2840
2841         c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2842
2843         err = copy_to_user(arg, &c, sizeof(unsigned long));
2844         if (err) {
2845                 printk(KERN_ERR
2846                        "%s:Can't copy to user space\n", __func__);
2847                 return -EFAULT;
2848         }
2849
2850         return 0;
2851 }
2852
2853 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2854                                      struct me4000_ao_context *ao_context)
2855 {
2856         u32 tmp;
2857         wait_queue_head_t queue;
2858         unsigned long ref;
2859         unsigned long timeout;
2860
2861         CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2862
2863         if (get_user(timeout, arg)) {
2864                 printk(KERN_ERR
2865                        "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2866                 return -EFAULT;
2867         }
2868
2869         init_waitqueue_head(&queue);
2870
2871         tmp = inl(ao_context->ctrl_reg);
2872
2873         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2874                 if (timeout) {
2875                         ref = jiffies;
2876                         while ((inl(ao_context->status_reg) &
2877                                 ME4000_AO_STATUS_BIT_FSM)) {
2878                                 interruptible_sleep_on_timeout(&queue, 1);
2879                                 if (signal_pending(current)) {
2880                                         printk(KERN_ERR
2881                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2882                                         return -EINTR;
2883                                 }
2884                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2885                                         printk(KERN_ERR
2886                                                "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2887                                         return -EIO;
2888                                 }
2889                         }
2890                 } else {
2891                         while ((inl(ao_context->status_reg) &
2892                                 ME4000_AO_STATUS_BIT_FSM)) {
2893                                 interruptible_sleep_on_timeout(&queue, 1);
2894                                 if (signal_pending(current)) {
2895                                         printk(KERN_ERR
2896                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2897                                         return -EINTR;
2898                                 }
2899                         }
2900                 }
2901         } else {
2902                 printk(KERN_ERR
2903                        "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2904                 return -EINVAL;
2905         }
2906
2907         return 0;
2908 }
2909
2910 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2911 {
2912         u32 tmp;
2913         unsigned long flags;
2914
2915         CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2916
2917         /* Only available for analog output 3 */
2918         if (ao_context->index != 3) {
2919                 printk(KERN_ERR
2920                        "me4000_ao_enable_do():Only available for analog output 3\n");
2921                 return -ENOTTY;
2922         }
2923
2924         /* Check if the state machine is stopped */
2925         tmp = me4000_inl(ao_context->status_reg);
2926         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2927                 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2928                 return -EBUSY;
2929         }
2930
2931         /* Set the stop bit */
2932         spin_lock_irqsave(&ao_context->int_lock, flags);
2933         tmp = inl(ao_context->ctrl_reg);
2934         tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2935         me4000_outl(tmp, ao_context->ctrl_reg);
2936         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2937
2938         return 0;
2939 }
2940
2941 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2942 {
2943         u32 tmp;
2944         unsigned long flags;
2945
2946         CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2947
2948         /* Only available for analog output 3 */
2949         if (ao_context->index != 3) {
2950                 printk(KERN_ERR
2951                        "me4000_ao_disable():Only available for analog output 3\n");
2952                 return -ENOTTY;
2953         }
2954
2955         /* Check if the state machine is stopped */
2956         tmp = me4000_inl(ao_context->status_reg);
2957         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2958                 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2959                 return -EBUSY;
2960         }
2961
2962         spin_lock_irqsave(&ao_context->int_lock, flags);
2963         tmp = inl(ao_context->ctrl_reg);
2964         tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2965         me4000_outl(tmp, ao_context->ctrl_reg);
2966         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2967
2968         return 0;
2969 }
2970
2971 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2972 {
2973         unsigned long tmp;
2974
2975         CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2976
2977         tmp =
2978             (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2979             : 0;
2980
2981         if (ao_context->pipe_flag) {
2982                 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2983                 return -EPIPE;
2984         }
2985
2986         if (put_user(tmp, arg)) {
2987                 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2988                 return -EFAULT;
2989         }
2990
2991         return 0;
2992 }
2993
2994 /*------------------------- Analog input stuff -------------------------------*/
2995
2996 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
2997 {
2998         wait_queue_head_t queue;
2999         int err;
3000
3001         CALL_PDEBUG("me4000_ai_prepare() is executed\n");
3002
3003         init_waitqueue_head(&queue);
3004
3005         /* Set the new mode and stop bits */
3006         me4000_outl(ai_context->
3007                     mode | ME4000_AI_CTRL_BIT_STOP |
3008                     ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
3009
3010         /* Set the timer registers */
3011         ai_context->chan_timer = 66;
3012         ai_context->chan_pre_timer = 66;
3013         ai_context->scan_timer_low = 0;
3014         ai_context->scan_timer_high = 0;
3015
3016         me4000_outl(65, ai_context->chan_timer_reg);
3017         me4000_outl(65, ai_context->chan_pre_timer_reg);
3018         me4000_outl(0, ai_context->scan_timer_low_reg);
3019         me4000_outl(0, ai_context->scan_timer_high_reg);
3020         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3021         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3022
3023         ai_context->channel_list_count = 0;
3024
3025         if (ai_context->mode) {
3026                 /* Request the interrupt line */
3027                 err =
3028                     request_irq(ai_context->irq, me4000_ai_isr,
3029                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3030                                 ai_context);
3031                 if (err) {
3032                         printk(KERN_ERR
3033                                "ME4000:me4000_ai_prepare():Can't get interrupt line");
3034                         return -ENODEV;
3035                 }
3036
3037                 /* Allocate circular buffer */
3038                 ai_context->circ_buf.buf =
3039                     kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3040                 if (!ai_context->circ_buf.buf) {
3041                         printk(KERN_ERR
3042                                "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3043                         free_irq(ai_context->irq, ai_context);
3044                         return -ENOMEM;
3045                 }
3046
3047                 /* Clear the circular buffer */
3048                 ai_context->circ_buf.head = 0;
3049                 ai_context->circ_buf.tail = 0;
3050         }
3051
3052         return 0;
3053 }
3054
3055 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3056 {
3057         wait_queue_head_t queue;
3058         u32 tmp;
3059         unsigned long flags;
3060
3061         CALL_PDEBUG("me4000_ai_reset() is executed\n");
3062
3063         init_waitqueue_head(&queue);
3064
3065         /*
3066          * First stop conversion of the state machine before reconfigure.
3067          * If not stopped before configuring mode, it could
3068          * walk in a undefined state.
3069          */
3070         spin_lock_irqsave(&ai_context->int_lock, flags);
3071         tmp = me4000_inl(ai_context->ctrl_reg);
3072         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3073         me4000_outl(tmp, ai_context->ctrl_reg);
3074         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3075
3076         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3077                 interruptible_sleep_on_timeout(&queue, 1);
3078                 if (signal_pending(current)) {
3079                         printk(KERN_ERR
3080                                "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3081                         return -EINTR;
3082                 }
3083         }
3084
3085         /* Clear the control register and set the stop bits */
3086         spin_lock_irqsave(&ai_context->int_lock, flags);
3087         tmp = me4000_inl(ai_context->ctrl_reg);
3088         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3089                     ai_context->ctrl_reg);
3090         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3091
3092         /* Reset timer registers */
3093         ai_context->chan_timer = 66;
3094         ai_context->chan_pre_timer = 66;
3095         ai_context->scan_timer_low = 0;
3096         ai_context->scan_timer_high = 0;
3097         ai_context->sample_counter = 0;
3098         ai_context->sample_counter_reload = 0;
3099
3100         me4000_outl(65, ai_context->chan_timer_reg);
3101         me4000_outl(65, ai_context->chan_pre_timer_reg);
3102         me4000_outl(0, ai_context->scan_timer_low_reg);
3103         me4000_outl(0, ai_context->scan_timer_high_reg);
3104         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3105         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3106         me4000_outl(0, ai_context->sample_counter_reg);
3107
3108         ai_context->channel_list_count = 0;
3109
3110         /* Clear the circular buffer */
3111         ai_context->circ_buf.head = 0;
3112         ai_context->circ_buf.tail = 0;
3113
3114         return 0;
3115 }
3116
3117 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3118                                 unsigned int service, unsigned long arg)
3119 {
3120         struct me4000_ai_context *ai_context;
3121
3122         CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3123
3124         ai_context = file_p->private_data;
3125
3126         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3127                 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3128                 return -ENOTTY;
3129         }
3130         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3131                 printk(KERN_ERR
3132                        "me4000_ai_ioctl_sing():Service number to high\n");
3133                 return -ENOTTY;
3134         }
3135
3136         switch (service) {
3137         case ME4000_AI_SINGLE:
3138                 return me4000_ai_single((struct me4000_ai_single *)arg,
3139                                                                 ai_context);
3140         case ME4000_AI_EX_TRIG_ENABLE:
3141                 return me4000_ai_ex_trig_enable(ai_context);
3142         case ME4000_AI_EX_TRIG_DISABLE:
3143                 return me4000_ai_ex_trig_disable(ai_context);
3144         case ME4000_AI_EX_TRIG_SETUP:
3145                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3146                                                ai_context);
3147         case ME4000_GET_USER_INFO:
3148                 return me4000_get_user_info((struct me4000_user_info *)arg,
3149                                             ai_context->board_info);
3150         case ME4000_AI_OFFSET_ENABLE:
3151                 return me4000_ai_offset_enable(ai_context);
3152         case ME4000_AI_OFFSET_DISABLE:
3153                 return me4000_ai_offset_disable(ai_context);
3154         case ME4000_AI_FULLSCALE_ENABLE:
3155                 return me4000_ai_fullscale_enable(ai_context);
3156         case ME4000_AI_FULLSCALE_DISABLE:
3157                 return me4000_ai_fullscale_disable(ai_context);
3158         case ME4000_AI_EEPROM_READ:
3159                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3160                                                                 ai_context);
3161         case ME4000_AI_EEPROM_WRITE:
3162                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3163                                                                 ai_context);
3164         default:
3165                 printk(KERN_ERR
3166                        "me4000_ai_ioctl_sing():Invalid service number\n");
3167                 return -ENOTTY;
3168         }
3169         return 0;
3170 }
3171
3172 static int me4000_ai_single(struct me4000_ai_single *arg,
3173                             struct me4000_ai_context *ai_context)
3174 {
3175         struct me4000_ai_single cmd;
3176         int err;
3177         u32 tmp;
3178         wait_queue_head_t queue;
3179         unsigned long jiffy;
3180
3181         CALL_PDEBUG("me4000_ai_single() is executed\n");
3182
3183         init_waitqueue_head(&queue);
3184
3185         /* Copy data from user */
3186         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3187         if (err) {
3188                 printk(KERN_ERR
3189                        "ME4000:me4000_ai_single():Can't copy from user space\n");
3190                 return -EFAULT;
3191         }
3192
3193         /* Check range parameter */
3194         switch (cmd.range) {
3195         case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3196         case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3197         case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3198         case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3199                 break;
3200         default:
3201                 printk(KERN_ERR
3202                        "ME4000:me4000_ai_single():Invalid range specified\n");
3203                 return -EINVAL;
3204         }
3205
3206         /* Check mode and channel number */
3207         switch (cmd.mode) {
3208         case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3209                 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3210                         printk(KERN_ERR
3211                                "ME4000:me4000_ai_single():Analog input is not available\n");
3212                         return -EINVAL;
3213                 }
3214                 break;
3215         case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3216                 if (cmd.channel >=
3217                     ai_context->board_info->board_p->ai.diff_count) {
3218                         printk(KERN_ERR
3219                                "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3220                         return -EINVAL;
3221                 }
3222                 break;
3223         default:
3224                 printk(KERN_ERR
3225                        "ME4000:me4000_ai_single():Invalid mode specified\n");
3226                 return -EINVAL;
3227         }
3228
3229         /* Clear channel list, data fifo and both stop bits */
3230         tmp = me4000_inl(ai_context->ctrl_reg);
3231         tmp &=
3232             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3233               ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3234         me4000_outl(tmp, ai_context->ctrl_reg);
3235
3236         /* Enable channel list and data fifo */
3237         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3238         me4000_outl(tmp, ai_context->ctrl_reg);
3239
3240         /* Generate channel list entry */
3241         me4000_outl(cmd.channel | cmd.range | cmd.
3242                     mode | ME4000_AI_LIST_LAST_ENTRY,
3243                     ai_context->channel_list_reg);
3244
3245         /* Set the timer to maximum */
3246         me4000_outl(66, ai_context->chan_timer_reg);
3247         me4000_outl(66, ai_context->chan_pre_timer_reg);
3248
3249         if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3250                 jiffy = jiffies;
3251                 while (!
3252                        (me4000_inl(ai_context->status_reg) &
3253                         ME4000_AI_STATUS_BIT_EF_DATA)) {
3254                         interruptible_sleep_on_timeout(&queue, 1);
3255                         if (signal_pending(current)) {
3256                                 printk(KERN_ERR
3257                                        "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3258                                 return -EINTR;
3259                         }
3260                         if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) {        // 2.6 has diffrent definitions for HZ in user and kernel space
3261                                 printk(KERN_ERR
3262                                        "ME4000:me4000_ai_single():Timeout reached\n");
3263                                 return -EIO;
3264                         }
3265                 }
3266         } else {
3267                 /* Start conversion */
3268                 me4000_inl(ai_context->start_reg);
3269
3270                 /* Wait until ready */
3271                 udelay(10);
3272                 if (!
3273                     (me4000_inl(ai_context->status_reg) &
3274                      ME4000_AI_STATUS_BIT_EF_DATA)) {
3275                         printk(KERN_ERR
3276                                "ME4000:me4000_ai_single():Value not available after wait\n");
3277                         return -EIO;
3278                 }
3279         }
3280
3281         /* Read value from data fifo */
3282         cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3283
3284         /* Copy result back to user */
3285         err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3286         if (err) {
3287                 printk(KERN_ERR
3288                        "ME4000:me4000_ai_single():Can't copy to user space\n");
3289                 return -EFAULT;
3290         }
3291
3292         return 0;
3293 }
3294
3295 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3296                               unsigned int service, unsigned long arg)
3297 {
3298         struct me4000_ai_context *ai_context;
3299
3300         CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3301
3302         ai_context = file_p->private_data;
3303
3304         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3305                 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3306                 return -ENOTTY;
3307         }
3308         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3309                 printk(KERN_ERR
3310                        "me4000_ai_ioctl_sw():Service number to high\n");
3311                 return -ENOTTY;
3312         }
3313
3314         switch (service) {
3315         case ME4000_AI_SC_SETUP:
3316                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3317                                                                 ai_context);
3318         case ME4000_AI_CONFIG:
3319                 return me4000_ai_config((struct me4000_ai_config *)arg,
3320                                                                 ai_context);
3321         case ME4000_AI_START:
3322                 return me4000_ai_start(ai_context);
3323         case ME4000_AI_STOP:
3324                 return me4000_ai_stop(ai_context);
3325         case ME4000_AI_IMMEDIATE_STOP:
3326                 return me4000_ai_immediate_stop(ai_context);
3327         case ME4000_AI_FSM_STATE:
3328                 return me4000_ai_fsm_state((int *)arg, ai_context);
3329         case ME4000_GET_USER_INFO:
3330                 return me4000_get_user_info((struct me4000_user_info *)arg,
3331                                             ai_context->board_info);
3332         case ME4000_AI_EEPROM_READ:
3333                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3334                                                                 ai_context);
3335         case ME4000_AI_EEPROM_WRITE:
3336                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3337                                                                 ai_context);
3338         case ME4000_AI_GET_COUNT_BUFFER:
3339                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3340                                                   ai_context);
3341         default:
3342                 printk(KERN_ERR
3343                        "%s:Invalid service number %d\n", __func__, service);
3344                 return -ENOTTY;
3345         }
3346         return 0;
3347 }
3348
3349 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3350                                unsigned int service, unsigned long arg)
3351 {
3352         struct me4000_ai_context *ai_context;
3353
3354         CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3355
3356         ai_context = file_p->private_data;
3357
3358         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3359                 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3360                 return -ENOTTY;
3361         }
3362         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3363                 printk(KERN_ERR
3364                        "me4000_ai_ioctl_ext():Service number to high\n");
3365                 return -ENOTTY;
3366         }
3367
3368         switch (service) {
3369         case ME4000_AI_SC_SETUP:
3370                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3371                                                                 ai_context);
3372         case ME4000_AI_CONFIG:
3373                 return me4000_ai_config((struct me4000_ai_config *)arg,
3374                                                                 ai_context);
3375         case ME4000_AI_START:
3376                 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3377         case ME4000_AI_STOP:
3378                 return me4000_ai_stop(ai_context);
3379         case ME4000_AI_IMMEDIATE_STOP:
3380                 return me4000_ai_immediate_stop(ai_context);
3381         case ME4000_AI_EX_TRIG_ENABLE:
3382                 return me4000_ai_ex_trig_enable(ai_context);
3383         case ME4000_AI_EX_TRIG_DISABLE:
3384                 return me4000_ai_ex_trig_disable(ai_context);
3385         case ME4000_AI_EX_TRIG_SETUP:
3386                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3387                                                ai_context);
3388         case ME4000_AI_FSM_STATE:
3389                 return me4000_ai_fsm_state((int *)arg, ai_context);
3390         case ME4000_GET_USER_INFO:
3391                 return me4000_get_user_info((struct me4000_user_info *)arg,
3392                                             ai_context->board_info);
3393         case ME4000_AI_GET_COUNT_BUFFER:
3394                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3395                                                   ai_context);
3396         default:
3397                 printk(KERN_ERR
3398                        "%s:Invalid service number %d\n", __func__ , service);
3399                 return -ENOTTY;
3400         }
3401         return 0;
3402 }
3403
3404 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3405 {
3406         struct me4000_ai_context *ai_context;
3407
3408         CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3409
3410         ai_context = file_p->private_data;
3411         return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3412 }
3413
3414 static int me4000_ai_config(struct me4000_ai_config *arg,
3415                             struct me4000_ai_context *ai_context)
3416 {
3417         struct me4000_ai_config cmd;
3418         u32 *list = NULL;
3419         u32 mode;
3420         int i;
3421         int err;
3422         wait_queue_head_t queue;
3423         u64 scan;
3424         u32 tmp;
3425
3426         CALL_PDEBUG("me4000_ai_config() is executed\n");
3427
3428         init_waitqueue_head(&queue);
3429
3430         /* Check if conversion is stopped */
3431         if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3432                 printk(KERN_ERR
3433                        "ME4000:me4000_ai_config():Conversion is not stopped\n");
3434                 err = -EBUSY;
3435                 goto AI_CONFIG_ERR;
3436         }
3437
3438         /* Copy data from user */
3439         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3440         if (err) {
3441                 printk(KERN_ERR
3442                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3443                 err = -EFAULT;
3444                 goto AI_CONFIG_ERR;
3445         }
3446
3447         PDEBUG
3448             ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3449              cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3450              cmd.timer.scan_high, cmd.channel_list.count);
3451
3452         /* Check whether sample and hold is available for this board */
3453         if (cmd.sh) {
3454                 if (!ai_context->board_info->board_p->ai.sh_count) {
3455                         printk(KERN_ERR
3456                                "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3457                         err = -ENODEV;
3458                         goto AI_CONFIG_ERR;
3459                 }
3460         }
3461
3462         /* Check the channel list size */
3463         if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3464                 printk(KERN_ERR
3465                        "me4000_ai_config():Channel list is to large\n");
3466                 err = -EINVAL;
3467                 goto AI_CONFIG_ERR;
3468         }
3469
3470         /* Copy channel list from user */
3471         list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3472         if (!list) {
3473                 printk(KERN_ERR
3474                        "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3475                 err = -ENOMEM;
3476                 goto AI_CONFIG_ERR;
3477         }
3478         err =
3479             copy_from_user(list, cmd.channel_list.list,
3480                            sizeof(u32) * cmd.channel_list.count);
3481         if (err) {
3482                 printk(KERN_ERR
3483                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3484                 err = -EFAULT;
3485                 goto AI_CONFIG_ERR;
3486         }
3487
3488         /* Check if last entry bit is set */
3489         if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3490                 printk(KERN_WARNING
3491                        "me4000_ai_config():Last entry bit is not set\n");
3492                 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3493         }
3494
3495         /* Check whether mode is equal for all entries */
3496         mode = list[0] & 0x20;
3497         for (i = 0; i < cmd.channel_list.count; i++) {
3498                 if ((list[i] & 0x20) != mode) {
3499                         printk(KERN_ERR
3500                                "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3501                         err = -EINVAL;
3502                         goto AI_CONFIG_ERR;
3503                 }
3504         }
3505
3506         /* Check whether channels are available for this mode */
3507         if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3508                 for (i = 0; i < cmd.channel_list.count; i++) {
3509                         if ((list[i] & 0x1F) >=
3510                             ai_context->board_info->board_p->ai.count) {
3511                                 printk(KERN_ERR
3512                                        "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3513                                 err = -EINVAL;
3514                                 goto AI_CONFIG_ERR;
3515                         }
3516                 }
3517         } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3518                 for (i = 0; i < cmd.channel_list.count; i++) {
3519                         if ((list[i] & 0x1F) >=
3520                             ai_context->board_info->board_p->ai.diff_count) {
3521                                 printk(KERN_ERR
3522                                        "ME4000:me4000_ai_config():Channel is not available for differential\n");
3523                                 err = -EINVAL;
3524                                 goto AI_CONFIG_ERR;
3525                         }
3526                 }
3527         }
3528
3529         /* Check if bipolar is set for all entries when in differential mode */
3530         if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3531                 for (i = 0; i < cmd.channel_list.count; i++) {
3532                         if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3533                             && (list[i] & 0xC0) !=
3534                             ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3535                                 printk(KERN_ERR
3536                                        "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3537                                 err = -EINVAL;
3538                                 goto AI_CONFIG_ERR;
3539                         }
3540                 }
3541         }
3542
3543         if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3544                 /* Check for minimum channel divisor */
3545                 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3546                         printk(KERN_ERR
3547                                "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3548                         err = -EINVAL;
3549                         goto AI_CONFIG_ERR;
3550                 }
3551
3552                 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3553                 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3554                         printk(KERN_ERR
3555                                "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3556                         err = -EINVAL;
3557                         goto AI_CONFIG_ERR;
3558                 }
3559
3560                 /* Check for minimum channel pre divisor */
3561                 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3562                         printk(KERN_ERR
3563                                "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3564                         err = -EINVAL;
3565                         goto AI_CONFIG_ERR;
3566                 }
3567
3568                 /* Write the channel timers */
3569                 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3570                 me4000_outl(cmd.timer.pre_chan - 1,
3571                             ai_context->chan_pre_timer_reg);
3572
3573                 /* Save the timer values in the board context */
3574                 ai_context->chan_timer = cmd.timer.chan;
3575                 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3576
3577                 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3578                         /* Check for scan timer divisor */
3579                         scan =
3580                             (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3581                                                         scan_high << 32);
3582                         if (scan != 0) {
3583                                 if (scan <
3584                                     cmd.channel_list.count * cmd.timer.chan +
3585                                     1) {
3586                                         printk(KERN_ERR
3587                                                "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3588                                         err = -EINVAL;
3589                                         goto AI_CONFIG_ERR;
3590                                 }
3591                         }
3592
3593                         /* Write the scan timers */
3594                         if (scan != 0) {
3595                                 scan--;
3596                                 tmp = (u32) (scan & 0xFFFFFFFF);
3597                                 me4000_outl(tmp,
3598                                             ai_context->scan_timer_low_reg);
3599                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3600                                 me4000_outl(tmp,
3601                                             ai_context->scan_timer_high_reg);
3602
3603                                 scan =
3604                                     scan - (cmd.timer.chan - 1) +
3605                                     (cmd.timer.pre_chan - 1);
3606                                 tmp = (u32) (scan & 0xFFFFFFFF);
3607                                 me4000_outl(tmp,
3608                                             ai_context->scan_pre_timer_low_reg);
3609                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3610                                 me4000_outl(tmp,
3611                                             ai_context->
3612                                             scan_pre_timer_high_reg);
3613                         } else {
3614                                 me4000_outl(0x0,
3615                                             ai_context->scan_timer_low_reg);
3616                                 me4000_outl(0x0,
3617                                             ai_context->scan_timer_high_reg);
3618
3619                                 me4000_outl(0x0,
3620                                             ai_context->scan_pre_timer_low_reg);
3621                                 me4000_outl(0x0,
3622                                             ai_context->
3623                                             scan_pre_timer_high_reg);
3624                         }
3625
3626                         ai_context->scan_timer_low = cmd.timer.scan_low;
3627                         ai_context->scan_timer_high = cmd.timer.scan_high;
3628                 }
3629         }
3630
3631         /* Clear the channel list */
3632         tmp = me4000_inl(ai_context->ctrl_reg);
3633         tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3634         me4000_outl(tmp, ai_context->ctrl_reg);
3635         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3636         me4000_outl(tmp, ai_context->ctrl_reg);
3637
3638         /* Write the channel list */
3639         for (i = 0; i < cmd.channel_list.count; i++) {
3640                 me4000_outl(list[i], ai_context->channel_list_reg);
3641         }
3642
3643         /* Setup sample and hold */
3644         if (cmd.sh) {
3645                 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3646                 me4000_outl(tmp, ai_context->ctrl_reg);
3647         } else {
3648                 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3649                 me4000_outl(tmp, ai_context->ctrl_reg);
3650         }
3651
3652         /* Save the channel list size in the board context */
3653         ai_context->channel_list_count = cmd.channel_list.count;
3654
3655         kfree(list);
3656
3657         return 0;
3658
3659 AI_CONFIG_ERR:
3660
3661         /* Reset the timers */
3662         ai_context->chan_timer = 66;
3663         ai_context->chan_pre_timer = 66;
3664         ai_context->scan_timer_low = 0;
3665         ai_context->scan_timer_high = 0;
3666
3667         me4000_outl(65, ai_context->chan_timer_reg);
3668         me4000_outl(65, ai_context->chan_pre_timer_reg);
3669         me4000_outl(0, ai_context->scan_timer_high_reg);
3670         me4000_outl(0, ai_context->scan_timer_low_reg);
3671         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3672         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3673
3674         ai_context->channel_list_count = 0;
3675
3676         tmp = me4000_inl(ai_context->ctrl_reg);
3677         tmp &=
3678             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3679
3680         if (list)
3681                 kfree(list);
3682
3683         return err;
3684
3685 }
3686
3687 static int ai_common_start(struct me4000_ai_context *ai_context)
3688 {
3689         u32 tmp;
3690         CALL_PDEBUG("ai_common_start() is executed\n");
3691
3692         tmp = me4000_inl(ai_context->ctrl_reg);
3693
3694         /* Check if conversion is stopped */
3695         if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3696                 printk(KERN_ERR
3697                        "ME4000:ai_common_start():Conversion is not stopped\n");
3698                 return -EBUSY;
3699         }
3700
3701         /* Clear data fifo, disable all interrupts, clear sample counter reload */
3702         tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3703                  ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3704                  ME4000_AI_CTRL_BIT_SC_RELOAD);
3705
3706         me4000_outl(tmp, ai_context->ctrl_reg);
3707
3708         /* Clear circular buffer */
3709         ai_context->circ_buf.head = 0;
3710         ai_context->circ_buf.tail = 0;
3711
3712         /* Enable data fifo */
3713         tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3714
3715         /* Determine interrupt setup */
3716         if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3717                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3718                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3719         } else if (ai_context->sample_counter
3720                    && ai_context->sample_counter_reload) {
3721                 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3722                         /* Enable only Sample Counter Interrupt */
3723                         tmp |=
3724                             ME4000_AI_CTRL_BIT_SC_IRQ |
3725                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3726                 } else {
3727                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
3728                         tmp |=
3729                             ME4000_AI_CTRL_BIT_SC_IRQ |
3730                             ME4000_AI_CTRL_BIT_HF_IRQ |
3731                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3732                 }
3733         } else {
3734                 /* Enable only Half Full Interrupt */
3735                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3736         }
3737
3738         /* Clear the stop bits */
3739         tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3740
3741         /* Write setup to hardware */
3742         me4000_outl(tmp, ai_context->ctrl_reg);
3743
3744         /* Write sample counter */
3745         me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3746
3747         return 0;
3748 }
3749
3750 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3751 {
3752         int err;
3753         CALL_PDEBUG("me4000_ai_start() is executed\n");
3754
3755         /* Prepare Hardware */
3756         err = ai_common_start(ai_context);
3757         if (err)
3758                 return err;
3759
3760         /* Start conversion by dummy read */
3761         me4000_inl(ai_context->start_reg);
3762
3763         return 0;
3764 }
3765
3766 static int me4000_ai_start_ex(unsigned long *arg,
3767                               struct me4000_ai_context *ai_context)
3768 {
3769         int err;
3770         wait_queue_head_t queue;
3771         unsigned long ref;
3772         unsigned long timeout;
3773
3774         CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3775
3776         if (get_user(timeout, arg)) {
3777                 printk(KERN_ERR
3778                        "me4000_ai_start_ex():Cannot copy data from user\n");
3779                 return -EFAULT;
3780         }
3781
3782         init_waitqueue_head(&queue);
3783
3784         /* Prepare Hardware */
3785         err = ai_common_start(ai_context);
3786         if (err)
3787                 return err;
3788
3789         if (timeout) {
3790                 ref = jiffies;
3791                 while (!
3792                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3793                 {
3794                         interruptible_sleep_on_timeout(&queue, 1);
3795                         if (signal_pending(current)) {
3796                                 printk(KERN_ERR
3797                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3798                                 return -EINTR;
3799                         }
3800                         if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
3801                                 printk(KERN_ERR
3802                                        "ME4000:me4000_ai_start_ex():Timeout reached\n");
3803                                 return -EIO;
3804                         }
3805                 }
3806         } else {
3807                 while (!
3808                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3809                 {
3810                         interruptible_sleep_on_timeout(&queue, 1);
3811                         if (signal_pending(current)) {
3812                                 printk(KERN_ERR
3813                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3814                                 return -EINTR;
3815                         }
3816                 }
3817         }
3818
3819         return 0;
3820 }
3821
3822 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3823 {
3824         wait_queue_head_t queue;
3825         u32 tmp;
3826         unsigned long flags;
3827
3828         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3829
3830         init_waitqueue_head(&queue);
3831
3832         /* Disable irqs and clear data fifo */
3833         spin_lock_irqsave(&ai_context->int_lock, flags);
3834         tmp = me4000_inl(ai_context->ctrl_reg);
3835         tmp &=
3836             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3837               ME4000_AI_CTRL_BIT_DATA_FIFO);
3838         /* Stop conversion of the state machine */
3839         tmp |= ME4000_AI_CTRL_BIT_STOP;
3840         me4000_outl(tmp, ai_context->ctrl_reg);
3841         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3842
3843         /* Clear circular buffer */
3844         ai_context->circ_buf.head = 0;
3845         ai_context->circ_buf.tail = 0;
3846
3847         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3848                 interruptible_sleep_on_timeout(&queue, 1);
3849                 if (signal_pending(current)) {
3850                         printk(KERN_ERR
3851                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3852                         return -EINTR;
3853                 }
3854         }
3855
3856         return 0;
3857 }
3858
3859 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3860 {
3861         wait_queue_head_t queue;
3862         u32 tmp;
3863         unsigned long flags;
3864
3865         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3866
3867         init_waitqueue_head(&queue);
3868
3869         /* Disable irqs and clear data fifo */
3870         spin_lock_irqsave(&ai_context->int_lock, flags);
3871         tmp = me4000_inl(ai_context->ctrl_reg);
3872         tmp &=
3873             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3874               ME4000_AI_CTRL_BIT_DATA_FIFO);
3875         /* Stop conversion of the state machine */
3876         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3877         me4000_outl(tmp, ai_context->ctrl_reg);
3878         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3879
3880         /* Clear circular buffer */
3881         ai_context->circ_buf.head = 0;
3882         ai_context->circ_buf.tail = 0;
3883
3884         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3885                 interruptible_sleep_on_timeout(&queue, 1);
3886                 if (signal_pending(current)) {
3887                         printk(KERN_ERR
3888                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3889                         return -EINTR;
3890                 }
3891         }
3892
3893         return 0;
3894 }
3895
3896 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3897 {
3898         u32 tmp;
3899         unsigned long flags;
3900
3901         CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3902
3903         spin_lock_irqsave(&ai_context->int_lock, flags);
3904         tmp = me4000_inl(ai_context->ctrl_reg);
3905         tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3906         me4000_outl(tmp, ai_context->ctrl_reg);
3907         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3908
3909         return 0;
3910 }
3911
3912 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3913 {
3914         u32 tmp;
3915         unsigned long flags;
3916
3917         CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3918
3919         spin_lock_irqsave(&ai_context->int_lock, flags);
3920         tmp = me4000_inl(ai_context->ctrl_reg);
3921         tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3922         me4000_outl(tmp, ai_context->ctrl_reg);
3923         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3924
3925         return 0;
3926 }
3927
3928 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3929                                    struct me4000_ai_context *ai_context)
3930 {
3931         struct me4000_ai_trigger cmd;
3932         int err;
3933         u32 tmp;
3934         unsigned long flags;
3935
3936         CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3937
3938         /* Copy data from user */
3939         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3940         if (err) {
3941                 printk(KERN_ERR
3942                        "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3943                 return -EFAULT;
3944         }
3945
3946         spin_lock_irqsave(&ai_context->int_lock, flags);
3947         tmp = me4000_inl(ai_context->ctrl_reg);
3948
3949         if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3950                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3951         } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3952                 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3953                         printk(KERN_ERR
3954                                "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3955                         return -EINVAL;
3956                 }
3957                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3958         } else {
3959                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3960                 printk(KERN_ERR
3961                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3962                 return -EINVAL;
3963         }
3964
3965         if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3966                 tmp &=
3967                     ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3968                       ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3969         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3970                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3971                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3972         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3973                 tmp |=
3974                     ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3975                     ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3976         } else {
3977                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3978                 printk(KERN_ERR
3979                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3980                 return -EINVAL;
3981         }
3982
3983         me4000_outl(tmp, ai_context->ctrl_reg);
3984         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3985         return 0;
3986 }
3987
3988 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3989                               struct me4000_ai_context *ai_context)
3990 {
3991         struct me4000_ai_sc cmd;
3992         int err;
3993
3994         CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3995
3996         /* Copy data from user */
3997         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
3998         if (err) {
3999                 printk(KERN_ERR
4000                        "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
4001                 return -EFAULT;
4002         }
4003
4004         ai_context->sample_counter = cmd.value;
4005         ai_context->sample_counter_reload = cmd.reload;
4006
4007         return 0;
4008 }
4009
4010 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
4011                               loff_t *offp)
4012 {
4013         struct me4000_ai_context *ai_context = filep->private_data;
4014         s16 *buffer = (s16 *) buff;
4015         size_t count = cnt / 2;
4016         unsigned long flags;
4017         int tmp;
4018         int c = 0;
4019         int k = 0;
4020         int ret = 0;
4021         wait_queue_t wait;
4022
4023         CALL_PDEBUG("me4000_ai_read() is executed\n");
4024
4025         init_waitqueue_entry(&wait, current);
4026
4027         /* Check count */
4028         if (count <= 0) {
4029                 PDEBUG("me4000_ai_read():Count is 0\n");
4030                 return 0;
4031         }
4032
4033         while (count > 0) {
4034                 if (filep->f_flags & O_NONBLOCK) {
4035                         c = me4000_values_to_end(ai_context->circ_buf,
4036                                                  ME4000_AI_BUFFER_COUNT);
4037                         if (!c) {
4038                                 PDEBUG
4039                                     ("me4000_ai_read():Returning from nonblocking read\n");
4040                                 break;
4041                         }
4042                 } else {
4043                         /* Check if conversion is still running */
4044                         if (!
4045                             (me4000_inl(ai_context->status_reg) &
4046                              ME4000_AI_STATUS_BIT_FSM)) {
4047                                 printk(KERN_ERR
4048                                        "ME4000:me4000_ai_read():Conversion interrupted\n");
4049                                 return -EPIPE;
4050                         }
4051
4052                         wait_event_interruptible(ai_context->wait_queue,
4053                                                  (me4000_values_to_end
4054                                                   (ai_context->circ_buf,
4055                                                    ME4000_AI_BUFFER_COUNT)));
4056                         if (signal_pending(current)) {
4057                                 printk(KERN_ERR
4058                                        "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4059                                 return -EINTR;
4060                         }
4061                 }
4062
4063                 /* Only read count values or as much as available */
4064                 c = me4000_values_to_end(ai_context->circ_buf,
4065                                          ME4000_AI_BUFFER_COUNT);
4066                 PDEBUG("me4000_ai_read():%d values to end\n", c);
4067                 if (count < c)
4068                         c = count;
4069
4070                 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4071                 k = 2 * c;
4072                 k -= copy_to_user(buffer,
4073                                   ai_context->circ_buf.buf +
4074                                   ai_context->circ_buf.tail, k);
4075                 c = k / 2;
4076                 if (!c) {
4077                         printk(KERN_ERR
4078                                "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4079                         return -EFAULT;
4080                 }
4081
4082                 ai_context->circ_buf.tail =
4083                     (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4084                                                        1);
4085                 buffer += c;
4086                 count -= c;
4087                 ret += c;
4088
4089                 spin_lock_irqsave(&ai_context->int_lock, flags);
4090                 if (me4000_buf_space
4091                     (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4092                         tmp = me4000_inl(ai_context->ctrl_reg);
4093
4094                         /* Determine interrupt setup */
4095                         if (ai_context->sample_counter
4096                             && !ai_context->sample_counter_reload) {
4097                                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4098                                 tmp |=
4099                                     ME4000_AI_CTRL_BIT_SC_IRQ |
4100                                     ME4000_AI_CTRL_BIT_HF_IRQ;
4101                         } else if (ai_context->sample_counter
4102                                    && ai_context->sample_counter_reload) {
4103                                 if (ai_context->sample_counter <
4104                                     ME4000_AI_FIFO_COUNT / 2) {
4105                                         /* Enable only Sample Counter Interrupt */
4106                                         tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4107                                 } else {
4108                                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
4109                                         tmp |=
4110                                             ME4000_AI_CTRL_BIT_SC_IRQ |
4111                                             ME4000_AI_CTRL_BIT_HF_IRQ;
4112                                 }
4113                         } else {
4114                                 /* Enable only Half Full Interrupt */
4115                                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4116                         }
4117
4118                         me4000_outl(tmp, ai_context->ctrl_reg);
4119                 }
4120                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4121         }
4122
4123         /* Check if conversion is still running */
4124         if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4125                 printk(KERN_ERR
4126                        "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4127                 return -EPIPE;
4128         }
4129
4130         if (filep->f_flags & O_NONBLOCK) {
4131                 return (k == 0) ? -EAGAIN : 2 * ret;
4132         }
4133
4134         CALL_PDEBUG("me4000_ai_read() is leaved\n");
4135         return ret * 2;
4136 }
4137
4138 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4139 {
4140         struct me4000_ai_context *ai_context;
4141         unsigned long mask = 0;
4142
4143         CALL_PDEBUG("me4000_ai_poll() is executed\n");
4144
4145         ai_context = file_p->private_data;
4146
4147         /* Register wait queue */
4148         poll_wait(file_p, &ai_context->wait_queue, wait);
4149
4150         /* Get available values */
4151         if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4152                 mask |= POLLIN | POLLRDNORM;
4153
4154         PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4155
4156         return mask;
4157 }
4158
4159 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4160 {
4161         unsigned long tmp;
4162
4163         CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4164
4165         tmp = me4000_inl(ai_context->ctrl_reg);
4166         tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4167         me4000_outl(tmp, ai_context->ctrl_reg);
4168
4169         return 0;
4170 }
4171
4172 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4173 {
4174         unsigned long tmp;
4175
4176         CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4177
4178         tmp = me4000_inl(ai_context->ctrl_reg);
4179         tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4180         me4000_outl(tmp, ai_context->ctrl_reg);
4181
4182         return 0;
4183 }
4184
4185 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4186 {
4187         unsigned long tmp;
4188
4189         CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4190
4191         tmp = me4000_inl(ai_context->ctrl_reg);
4192         tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4193         me4000_outl(tmp, ai_context->ctrl_reg);
4194
4195         return 0;
4196 }
4197
4198 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4199 {
4200         unsigned long tmp;
4201
4202         CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4203
4204         tmp = me4000_inl(ai_context->ctrl_reg);
4205         tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4206         me4000_outl(tmp, ai_context->ctrl_reg);
4207
4208         return 0;
4209 }
4210
4211 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4212 {
4213         unsigned long tmp;
4214
4215         CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4216
4217         tmp =
4218             (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4219             : 0;
4220
4221         if (put_user(tmp, arg)) {
4222                 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4223                 return -EFAULT;
4224         }
4225
4226         return 0;
4227 }
4228
4229 static int me4000_ai_get_count_buffer(unsigned long *arg,
4230                                       struct me4000_ai_context *ai_context)
4231 {
4232         unsigned long c;
4233         int err;
4234
4235         c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4236
4237         err = copy_to_user(arg, &c, sizeof(unsigned long));
4238         if (err) {
4239                 printk(KERN_ERR
4240                        "%s:Can't copy to user space\n", __func__);
4241                 return -EFAULT;
4242         }
4243
4244         return 0;
4245 }
4246
4247 /*---------------------------------- EEPROM stuff ---------------------------*/
4248
4249 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4250                             int length)
4251 {
4252         int i;
4253         unsigned long value;
4254
4255         CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4256
4257         PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4258                cmd, length);
4259
4260         /* Get the ICR register and clear the related bits */
4261         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4262         value &= ~(PLX_ICR_MASK_EEPROM);
4263         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4264
4265         /* Raise the chip select */
4266         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4267         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4268         udelay(EEPROM_DELAY);
4269
4270         for (i = 0; i < length; i++) {
4271                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4272                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4273                 } else {
4274                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4275                 }
4276
4277                 /* Write to EEPROM */
4278                 me4000_outl(value,
4279                             ai_context->board_info->plx_regbase + PLX_ICR);
4280                 udelay(EEPROM_DELAY);
4281
4282                 /* Raising edge of the clock */
4283                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4284                 me4000_outl(value,
4285                             ai_context->board_info->plx_regbase + PLX_ICR);
4286                 udelay(EEPROM_DELAY);
4287
4288                 /* Falling edge of the clock */
4289                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4290                 me4000_outl(value,
4291                             ai_context->board_info->plx_regbase + PLX_ICR);
4292                 udelay(EEPROM_DELAY);
4293         }
4294
4295         /* Clear the chip select */
4296         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4297         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4298         udelay(EEPROM_DELAY);
4299
4300         /* Wait until hardware is ready for sure */
4301         mdelay(10);
4302
4303         return 0;
4304 }
4305
4306 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4307                                       unsigned long cmd, int length)
4308 {
4309         int i;
4310         unsigned long value;
4311         unsigned short id = 0;
4312
4313         CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4314
4315         PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4316                length);
4317
4318         /* Get the ICR register and clear the related bits */
4319         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4320         value &= ~(PLX_ICR_MASK_EEPROM);
4321
4322         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4323
4324         /* Raise the chip select */
4325         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4326         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4327         udelay(EEPROM_DELAY);
4328
4329         /* Write the read command to the eeprom */
4330         for (i = 0; i < length; i++) {
4331                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4332                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4333                 } else {
4334                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4335                 }
4336                 me4000_outl(value,
4337                             ai_context->board_info->plx_regbase + PLX_ICR);
4338                 udelay(EEPROM_DELAY);
4339
4340                 /* Raising edge of the clock */
4341                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4342                 me4000_outl(value,
4343                             ai_context->board_info->plx_regbase + PLX_ICR);
4344                 udelay(EEPROM_DELAY);
4345
4346                 /* Falling edge of the clock */
4347                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4348                 me4000_outl(value,
4349                             ai_context->board_info->plx_regbase + PLX_ICR);
4350                 udelay(EEPROM_DELAY);
4351         }
4352
4353         /* Read the value from the eeprom */
4354         for (i = 0; i < 16; i++) {
4355                 /* Raising edge of the clock */
4356                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4357                 me4000_outl(value,
4358                             ai_context->board_info->plx_regbase + PLX_ICR);
4359                 udelay(EEPROM_DELAY);
4360
4361                 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4362                     PLX_ICR_BIT_EEPROM_READ) {
4363                         id |= (0x8000 >> i);
4364                         PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4365                                (0x8000 >> i));
4366                 } else {
4367                         PDEBUG("eeprom_read_cmd():Dont't OR\n");
4368                 }
4369
4370                 /* Falling edge of the clock */
4371                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4372                 me4000_outl(value,
4373                             ai_context->board_info->plx_regbase + PLX_ICR);
4374                 udelay(EEPROM_DELAY);
4375         }
4376
4377         /* Clear the chip select */
4378         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4379         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4380         udelay(EEPROM_DELAY);
4381
4382         return id;
4383 }
4384
4385 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4386                                struct me4000_ai_context *ai_context)
4387 {
4388         int err;
4389         struct me4000_eeprom setup;
4390         unsigned long cmd;
4391         unsigned long date_high;
4392         unsigned long date_low;
4393
4394         CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4395
4396         err = copy_from_user(&setup, arg, sizeof(setup));
4397         if (err) {
4398                 printk(KERN_ERR
4399                        "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4400                 return err;
4401         }
4402
4403         /* Enable writing */
4404         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4405                          ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4406
4407         /* Command for date */
4408         date_high = (setup.date & 0xFFFF0000) >> 16;
4409         date_low = (setup.date & 0x0000FFFF);
4410
4411         cmd =
4412             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4413                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4414                                                                      (unsigned
4415                                                                       long)
4416                                                                      date_high);
4417         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4418         if (err)
4419                 return err;
4420
4421         cmd =
4422             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4423                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4424                                                                      (unsigned
4425                                                                       long)
4426                                                                      date_low);
4427         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4428         if (err)
4429                 return err;
4430
4431         /* Command for unipolar 10V offset */
4432         cmd =
4433             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4434                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4435                                                                      (unsigned
4436                                                                       long)
4437                                                                      setup.
4438                                                                      uni_10_offset);
4439         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4440         if (err)
4441                 return err;
4442
4443         /* Command for unipolar 10V fullscale */
4444         cmd =
4445             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4446                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4447                                                                      (unsigned
4448                                                                       long)
4449                                                                      setup.
4450                                                                      uni_10_fullscale);
4451         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4452         if (err)
4453                 return err;
4454
4455         /* Command for unipolar 2,5V offset */
4456         cmd =
4457             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4458                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4459                                                                      (unsigned
4460                                                                       long)
4461                                                                      setup.
4462                                                                      uni_2_5_offset);
4463         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4464         if (err)
4465                 return err;
4466
4467         /* Command for unipolar 2,5V fullscale */
4468         cmd =
4469             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4470                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4471                                                                      (unsigned
4472                                                                       long)
4473                                                                      setup.
4474                                                                      uni_2_5_fullscale);
4475         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4476         if (err)
4477                 return err;
4478
4479         /* Command for bipolar 10V offset */
4480         cmd =
4481             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4482                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4483                                                                      (unsigned
4484                                                                       long)
4485                                                                      setup.
4486                                                                      bi_10_offset);
4487         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4488         if (err)
4489                 return err;
4490
4491         /* Command for bipolar 10V fullscale */
4492         cmd =
4493             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4494                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4495                                                                      (unsigned
4496                                                                       long)
4497                                                                      setup.
4498                                                                      bi_10_fullscale);
4499         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4500         if (err)
4501                 return err;
4502
4503         /* Command for bipolar 2,5V offset */
4504         cmd =
4505             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4506                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4507                                                                      (unsigned
4508                                                                       long)
4509                                                                      setup.
4510                                                                      bi_2_5_offset);
4511         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4512         if (err)
4513                 return err;
4514
4515         /* Command for bipolar 2,5V fullscale */
4516         cmd =
4517             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4518                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4519                                                                      (unsigned
4520                                                                       long)
4521                                                                      setup.
4522                                                                      bi_2_5_fullscale);
4523         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4524         if (err)
4525                 return err;
4526
4527         /* Command for differential 10V offset */
4528         cmd =
4529             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4530                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4531                                                                      (unsigned
4532                                                                       long)
4533                                                                      setup.
4534                                                                      diff_10_offset);
4535         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4536         if (err)
4537                 return err;
4538
4539         /* Command for differential 10V fullscale */
4540         cmd =
4541             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4542                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4543                                                                         (unsigned
4544                                                                          long)
4545                                                                         setup.
4546                                                                         diff_10_fullscale);
4547         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4548         if (err)
4549                 return err;
4550
4551         /* Command for differential 2,5V offset */
4552         cmd =
4553             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4554                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4555                                                                      (unsigned
4556                                                                       long)
4557                                                                      setup.
4558                                                                      diff_2_5_offset);
4559         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4560         if (err)
4561                 return err;
4562
4563         /* Command for differential 2,5V fullscale */
4564         cmd =
4565             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4566                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4567                                                                         (unsigned
4568                                                                          long)
4569                                                                         setup.
4570                                                                         diff_2_5_fullscale);
4571         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4572         if (err)
4573                 return err;
4574
4575         /* Disable writing */
4576         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4577                          ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4578
4579         return 0;
4580 }
4581
4582 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4583                               struct me4000_ai_context *ai_context)
4584 {
4585         int err;
4586         unsigned long cmd;
4587         struct me4000_eeprom setup;
4588
4589         CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4590
4591         /* Command for date */
4592         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4593         setup.date =
4594             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4595         setup.date <<= 16;
4596         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4597         setup.date |=
4598             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4599
4600         /* Command for unipolar 10V offset */
4601         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4602         setup.uni_10_offset =
4603             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4604
4605         /* Command for unipolar 10V fullscale */
4606         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4607         setup.uni_10_fullscale =
4608             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4609
4610         /* Command for unipolar 2,5V offset */
4611         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4612         setup.uni_2_5_offset =
4613             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4614
4615         /* Command for unipolar 2,5V fullscale */
4616         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4617         setup.uni_2_5_fullscale =
4618             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4619
4620         /* Command for bipolar 10V offset */
4621         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4622         setup.bi_10_offset =
4623             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4624
4625         /* Command for bipolar 10V fullscale */
4626         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4627         setup.bi_10_fullscale =
4628             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4629
4630         /* Command for bipolar 2,5V offset */
4631         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4632         setup.bi_2_5_offset =
4633             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4634
4635         /* Command for bipolar 2,5V fullscale */
4636         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4637         setup.bi_2_5_fullscale =
4638             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4639
4640         /* Command for differntial 10V offset */
4641         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4642         setup.diff_10_offset =
4643             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4644
4645         /* Command for differential 10V fullscale */
4646         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4647         setup.diff_10_fullscale =
4648             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4649
4650         /* Command for differntial 2,5V offset */
4651         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4652         setup.diff_2_5_offset =
4653             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4654
4655         /* Command for differential 2,5V fullscale */
4656         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4657         setup.diff_2_5_fullscale =
4658             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4659
4660         err = copy_to_user(arg, &setup, sizeof(setup));
4661         if (err) {
4662                 printk(KERN_ERR
4663                        "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4664                 return err;
4665         }
4666
4667         return 0;
4668 }
4669
4670 /*------------------------------------ DIO stuff ----------------------------------------------*/
4671
4672 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4673                             unsigned int service, unsigned long arg)
4674 {
4675         struct me4000_dio_context *dio_context;
4676
4677         CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4678
4679         dio_context = file_p->private_data;
4680
4681         if (_IOC_TYPE(service) != ME4000_MAGIC) {
4682                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4683                 return -ENOTTY;
4684         }
4685         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4686                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4687                 return -ENOTTY;
4688         }
4689
4690         switch (service) {
4691         case ME4000_DIO_CONFIG:
4692                 return me4000_dio_config((struct me4000_dio_config *)arg,
4693                                          dio_context);
4694         case ME4000_DIO_SET_BYTE:
4695                 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4696                                            dio_context);
4697         case ME4000_DIO_GET_BYTE:
4698                 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4699                                            dio_context);
4700         case ME4000_DIO_RESET:
4701                 return me4000_dio_reset(dio_context);
4702         default:
4703                 printk(KERN_ERR
4704                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4705                        service);
4706                 return -ENOTTY;
4707         }
4708         return 0;
4709 }
4710
4711 static int me4000_dio_config(struct me4000_dio_config *arg,
4712                              struct me4000_dio_context *dio_context)
4713 {
4714         struct me4000_dio_config cmd;
4715         u32 tmp;
4716         int err;
4717
4718         CALL_PDEBUG("me4000_dio_config() is executed\n");
4719
4720         /* Copy data from user */
4721         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4722         if (err) {
4723                 printk(KERN_ERR
4724                        "ME4000:me4000_dio_config():Can't copy from user space\n");
4725                 return -EFAULT;
4726         }
4727
4728         /* Check port parameter */
4729         if (cmd.port >= dio_context->dio_count) {
4730                 printk(KERN_ERR
4731                        "ME4000:me4000_dio_config():Port %d is not available\n",
4732                        cmd.port);
4733                 return -EINVAL;
4734         }
4735
4736         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4737                cmd.mode, cmd.function);
4738
4739         if (cmd.port == ME4000_DIO_PORT_A) {
4740                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4741                         /* Check if opto isolated version */
4742                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4743                                 printk(KERN_ERR
4744                                        "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4745                                 return -EIO;
4746                         }
4747
4748                         tmp = me4000_inl(dio_context->ctrl_reg);
4749                         tmp &=
4750                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4751                               ME4000_DIO_CTRL_BIT_MODE_1);
4752                         me4000_outl(tmp, dio_context->ctrl_reg);
4753                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4754                         tmp = me4000_inl(dio_context->ctrl_reg);
4755                         tmp &=
4756                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4757                               ME4000_DIO_CTRL_BIT_MODE_1);
4758                         tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4759                         me4000_outl(tmp, dio_context->ctrl_reg);
4760                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4761                         tmp = me4000_inl(dio_context->ctrl_reg);
4762                         tmp &=
4763                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4764                               ME4000_DIO_CTRL_BIT_MODE_1 |
4765                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4766                         tmp |=
4767                             ME4000_DIO_CTRL_BIT_MODE_0 |
4768                             ME4000_DIO_CTRL_BIT_MODE_1;
4769                         me4000_outl(tmp, dio_context->ctrl_reg);
4770                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4771                         tmp = me4000_inl(dio_context->ctrl_reg);
4772                         tmp |=
4773                             ME4000_DIO_CTRL_BIT_MODE_0 |
4774                             ME4000_DIO_CTRL_BIT_MODE_1 |
4775                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4776                         me4000_outl(tmp, dio_context->ctrl_reg);
4777                 } else {
4778                         printk(KERN_ERR
4779                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4780                                cmd.mode);
4781                         return -EINVAL;
4782                 }
4783         } else if (cmd.port == ME4000_DIO_PORT_B) {
4784                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4785                         /* Only do anything when TTL version is installed */
4786                         if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4787                                 tmp = me4000_inl(dio_context->ctrl_reg);
4788                                 tmp &=
4789                                     ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4790                                       ME4000_DIO_CTRL_BIT_MODE_3);
4791                                 me4000_outl(tmp, dio_context->ctrl_reg);
4792                         }
4793                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4794                         /* Check if opto isolated version */
4795                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4796                                 printk(KERN_ERR
4797                                        "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4798                                 return -EIO;
4799                         }
4800
4801                         tmp = me4000_inl(dio_context->ctrl_reg);
4802                         tmp &=
4803                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4804                               ME4000_DIO_CTRL_BIT_MODE_3);
4805                         tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4806                         me4000_outl(tmp, dio_context->ctrl_reg);
4807                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4808                         /* Check if opto isolated version */
4809                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4810                                 printk(KERN_ERR
4811                                        "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4812                                 return -EIO;
4813                         }
4814
4815                         tmp = me4000_inl(dio_context->ctrl_reg);
4816                         tmp &=
4817                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4818                               ME4000_DIO_CTRL_BIT_MODE_3 |
4819                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4820                         tmp |=
4821                             ME4000_DIO_CTRL_BIT_MODE_2 |
4822                             ME4000_DIO_CTRL_BIT_MODE_3;
4823                         me4000_outl(tmp, dio_context->ctrl_reg);
4824                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4825                         /* Check if opto isolated version */
4826                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4827                                 printk(KERN_ERR
4828                                        "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4829                                 return -EIO;
4830                         }
4831
4832                         tmp = me4000_inl(dio_context->ctrl_reg);
4833                         tmp |=
4834                             ME4000_DIO_CTRL_BIT_MODE_2 |
4835                             ME4000_DIO_CTRL_BIT_MODE_3 |
4836                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4837                         me4000_outl(tmp, dio_context->ctrl_reg);
4838                 } else {
4839                         printk(KERN_ERR
4840                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4841                                cmd.mode);
4842                         return -EINVAL;
4843                 }
4844         } else if (cmd.port == ME4000_DIO_PORT_C) {
4845                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4846                         tmp = me4000_inl(dio_context->ctrl_reg);
4847                         tmp &=
4848                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4849                               ME4000_DIO_CTRL_BIT_MODE_5);
4850                         me4000_outl(tmp, dio_context->ctrl_reg);
4851                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4852                         tmp = me4000_inl(dio_context->ctrl_reg);
4853                         tmp &=
4854                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4855                               ME4000_DIO_CTRL_BIT_MODE_5);
4856                         tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4857                         me4000_outl(tmp, dio_context->ctrl_reg);
4858                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4859                         tmp = me4000_inl(dio_context->ctrl_reg);
4860                         tmp &=
4861                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4862                               ME4000_DIO_CTRL_BIT_MODE_5 |
4863                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4864                         tmp |=
4865                             ME4000_DIO_CTRL_BIT_MODE_4 |
4866                             ME4000_DIO_CTRL_BIT_MODE_5;
4867                         me4000_outl(tmp, dio_context->ctrl_reg);
4868                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4869                         tmp = me4000_inl(dio_context->ctrl_reg);
4870                         tmp |=
4871                             ME4000_DIO_CTRL_BIT_MODE_4 |
4872                             ME4000_DIO_CTRL_BIT_MODE_5 |
4873                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4874                         me4000_outl(tmp, dio_context->ctrl_reg);
4875                 } else {
4876                         printk(KERN_ERR
4877                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4878                                cmd.mode);
4879                         return -EINVAL;
4880                 }
4881         } else if (cmd.port == ME4000_DIO_PORT_D) {
4882                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4883                         tmp = me4000_inl(dio_context->ctrl_reg);
4884                         tmp &=
4885                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4886                               ME4000_DIO_CTRL_BIT_MODE_7);
4887                         me4000_outl(tmp, dio_context->ctrl_reg);
4888                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4889                         tmp = me4000_inl(dio_context->ctrl_reg);
4890                         tmp &=
4891                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4892                               ME4000_DIO_CTRL_BIT_MODE_7);
4893                         tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4894                         me4000_outl(tmp, dio_context->ctrl_reg);
4895                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4896                         tmp = me4000_inl(dio_context->ctrl_reg);
4897                         tmp &=
4898                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4899                               ME4000_DIO_CTRL_BIT_MODE_7 |
4900                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4901                         tmp |=
4902                             ME4000_DIO_CTRL_BIT_MODE_6 |
4903                             ME4000_DIO_CTRL_BIT_MODE_7;
4904                         me4000_outl(tmp, dio_context->ctrl_reg);
4905                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4906                         tmp = me4000_inl(dio_context->ctrl_reg);
4907                         tmp |=
4908                             ME4000_DIO_CTRL_BIT_MODE_6 |
4909                             ME4000_DIO_CTRL_BIT_MODE_7 |
4910                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4911                         me4000_outl(tmp, dio_context->ctrl_reg);
4912                 } else {
4913                         printk(KERN_ERR
4914                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4915                                cmd.mode);
4916                         return -EINVAL;
4917                 }
4918         } else {
4919                 printk(KERN_ERR
4920                        "ME4000:me4000_dio_config():Port %d is not available\n",
4921                        cmd.port);
4922                 return -EINVAL;
4923         }
4924
4925         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4926                cmd.mode, cmd.function);
4927
4928         if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4929             || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4930                 tmp = me4000_inl(dio_context->ctrl_reg);
4931                 tmp &=
4932                     ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4933                       ME4000_DIO_CTRL_BIT_FUNCTION_1);
4934                 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4935                         me4000_outl(tmp, dio_context->ctrl_reg);
4936                 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4937                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4938                         me4000_outl(tmp, dio_context->ctrl_reg);
4939                 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4940                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4941                         me4000_outl(tmp, dio_context->ctrl_reg);
4942                 } else {
4943                         printk(KERN_ERR
4944                                "ME4000:me4000_dio_config():Invalid port function specified\n");
4945                         return -EINVAL;
4946                 }
4947         }
4948
4949         return 0;
4950 }
4951
4952 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4953                                struct me4000_dio_context *dio_context)
4954 {
4955         struct me4000_dio_byte cmd;
4956         int err;
4957
4958         CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4959
4960         /* Copy data from user */
4961         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4962         if (err) {
4963                 printk(KERN_ERR
4964                        "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4965                 return -EFAULT;
4966         }
4967
4968         /* Check port parameter */
4969         if (cmd.port >= dio_context->dio_count) {
4970                 printk(KERN_ERR
4971                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4972                        cmd.port);
4973                 return -EINVAL;
4974         }
4975
4976         if (cmd.port == ME4000_DIO_PORT_A) {
4977                 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4978                         printk(KERN_ERR
4979                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4980                                cmd.port);
4981                         return -EIO;
4982                 }
4983                 me4000_outl(cmd.byte, dio_context->port_0_reg);
4984         } else if (cmd.port == ME4000_DIO_PORT_B) {
4985                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4986                         printk(KERN_ERR
4987                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4988                                cmd.port);
4989                         return -EIO;
4990                 }
4991                 me4000_outl(cmd.byte, dio_context->port_1_reg);
4992         } else if (cmd.port == ME4000_DIO_PORT_C) {
4993                 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4994                         printk(KERN_ERR
4995                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4996                                cmd.port);
4997                         return -EIO;
4998                 }
4999                 me4000_outl(cmd.byte, dio_context->port_2_reg);
5000         } else if (cmd.port == ME4000_DIO_PORT_D) {
5001                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
5002                         printk(KERN_ERR
5003                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5004                                cmd.port);
5005                         return -EIO;
5006                 }
5007                 me4000_outl(cmd.byte, dio_context->port_3_reg);
5008         } else {
5009                 printk(KERN_ERR
5010                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
5011                        cmd.port);
5012                 return -EINVAL;
5013         }
5014
5015         return 0;
5016 }
5017
5018 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
5019                                struct me4000_dio_context *dio_context)
5020 {
5021         struct me4000_dio_byte cmd;
5022         int err;
5023
5024         CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5025
5026         /* Copy data from user */
5027         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5028         if (err) {
5029                 printk(KERN_ERR
5030                        "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5031                 return -EFAULT;
5032         }
5033
5034         /* Check port parameter */
5035         if (cmd.port >= dio_context->dio_count) {
5036                 printk(KERN_ERR
5037                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5038                        cmd.port);
5039                 return -EINVAL;
5040         }
5041
5042         if (cmd.port == ME4000_DIO_PORT_A) {
5043                 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5044         } else if (cmd.port == ME4000_DIO_PORT_B) {
5045                 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5046         } else if (cmd.port == ME4000_DIO_PORT_C) {
5047                 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5048         } else if (cmd.port == ME4000_DIO_PORT_D) {
5049                 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5050         } else {
5051                 printk(KERN_ERR
5052                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5053                        cmd.port);
5054                 return -EINVAL;
5055         }
5056
5057         /* Copy result back to user */
5058         err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5059         if (err) {
5060                 printk(KERN_ERR
5061                        "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5062                 return -EFAULT;
5063         }
5064
5065         return 0;
5066 }
5067
5068 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5069 {
5070         CALL_PDEBUG("me4000_dio_reset() is executed\n");
5071
5072         /* Clear the control register */
5073         me4000_outl(0, dio_context->ctrl_reg);
5074
5075         /* Check for opto isolated version */
5076         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5077                 me4000_outl(0x1, dio_context->ctrl_reg);
5078                 me4000_outl(0x0, dio_context->port_0_reg);
5079         }
5080
5081         return 0;
5082 }
5083
5084 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5085
5086 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5087                             unsigned int service, unsigned long arg)
5088 {
5089         struct me4000_cnt_context *cnt_context;
5090
5091         CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5092
5093         cnt_context = file_p->private_data;
5094
5095         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5096                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5097                 return -ENOTTY;
5098         }
5099         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5100                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5101                 return -ENOTTY;
5102         }
5103
5104         switch (service) {
5105         case ME4000_CNT_READ:
5106                 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5107         case ME4000_CNT_WRITE:
5108                 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5109         case ME4000_CNT_CONFIG:
5110                 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5111                                          cnt_context);
5112         case ME4000_CNT_RESET:
5113                 return me4000_cnt_reset(cnt_context);
5114         default:
5115                 printk(KERN_ERR
5116                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5117                        service);
5118                 return -ENOTTY;
5119         }
5120         return 0;
5121 }
5122
5123 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5124                              struct me4000_cnt_context *cnt_context)
5125 {
5126         struct me4000_cnt_config cmd;
5127         u8 counter;
5128         u8 mode;
5129         int err;
5130
5131         CALL_PDEBUG("me4000_cnt_config() is executed\n");
5132
5133         /* Copy data from user */
5134         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5135         if (err) {
5136                 printk(KERN_ERR
5137                        "ME4000:me4000_cnt_config():Can't copy from user space\n");
5138                 return -EFAULT;
5139         }
5140
5141         /* Check counter parameter */
5142         switch (cmd.counter) {
5143         case ME4000_CNT_COUNTER_0:
5144                 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5145                 break;
5146         case ME4000_CNT_COUNTER_1:
5147                 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5148                 break;
5149         case ME4000_CNT_COUNTER_2:
5150                 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5151                 break;
5152         default:
5153                 printk(KERN_ERR
5154                        "ME4000:me4000_cnt_config():Counter %d is not available\n",
5155                        cmd.counter);
5156                 return -EINVAL;
5157         }
5158
5159         /* Check mode parameter */
5160         switch (cmd.mode) {
5161         case ME4000_CNT_MODE_0:
5162                 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5163                 break;
5164         case ME4000_CNT_MODE_1:
5165                 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5166                 break;
5167         case ME4000_CNT_MODE_2:
5168                 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5169                 break;
5170         case ME4000_CNT_MODE_3:
5171                 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5172                 break;
5173         case ME4000_CNT_MODE_4:
5174                 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5175                 break;
5176         case ME4000_CNT_MODE_5:
5177                 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5178                 break;
5179         default:
5180                 printk(KERN_ERR
5181                        "ME4000:me4000_cnt_config():Mode %d is not available\n",
5182                        cmd.mode);
5183                 return -EINVAL;
5184         }
5185
5186         /* Write the control word */
5187         me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5188
5189         return 0;
5190 }
5191
5192 static int me4000_cnt_read(struct me4000_cnt *arg,
5193                            struct me4000_cnt_context *cnt_context)
5194 {
5195         struct me4000_cnt cmd;
5196         u8 tmp;
5197         int err;
5198
5199         CALL_PDEBUG("me4000_cnt_read() is executed\n");
5200
5201         /* Copy data from user */
5202         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5203         if (err) {
5204                 printk(KERN_ERR
5205                        "ME4000:me4000_cnt_read():Can't copy from user space\n");
5206                 return -EFAULT;
5207         }
5208
5209         /* Read counter */
5210         switch (cmd.counter) {
5211         case ME4000_CNT_COUNTER_0:
5212                 tmp = me4000_inb(cnt_context->counter_0_reg);
5213                 cmd.value = tmp;
5214                 tmp = me4000_inb(cnt_context->counter_0_reg);
5215                 cmd.value |= ((u16) tmp) << 8;
5216                 break;
5217         case ME4000_CNT_COUNTER_1:
5218                 tmp = me4000_inb(cnt_context->counter_1_reg);
5219                 cmd.value = tmp;
5220                 tmp = me4000_inb(cnt_context->counter_1_reg);
5221                 cmd.value |= ((u16) tmp) << 8;
5222                 break;
5223         case ME4000_CNT_COUNTER_2:
5224                 tmp = me4000_inb(cnt_context->counter_2_reg);
5225                 cmd.value = tmp;
5226                 tmp = me4000_inb(cnt_context->counter_2_reg);
5227                 cmd.value |= ((u16) tmp) << 8;
5228                 break;
5229         default:
5230                 printk(KERN_ERR
5231                        "ME4000:me4000_cnt_read():Counter %d is not available\n",
5232                        cmd.counter);
5233                 return -EINVAL;
5234         }
5235
5236         /* Copy result back to user */
5237         err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5238         if (err) {
5239                 printk(KERN_ERR
5240                        "ME4000:me4000_cnt_read():Can't copy to user space\n");
5241                 return -EFAULT;
5242         }
5243
5244         return 0;
5245 }
5246
5247 static int me4000_cnt_write(struct me4000_cnt *arg,
5248                             struct me4000_cnt_context *cnt_context)
5249 {
5250         struct me4000_cnt cmd;
5251         u8 tmp;
5252         int err;
5253
5254         CALL_PDEBUG("me4000_cnt_write() is executed\n");
5255
5256         /* Copy data from user */
5257         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5258         if (err) {
5259                 printk(KERN_ERR
5260                        "ME4000:me4000_cnt_write():Can't copy from user space\n");
5261                 return -EFAULT;
5262         }
5263
5264         /* Write counter */
5265         switch (cmd.counter) {
5266         case ME4000_CNT_COUNTER_0:
5267                 tmp = cmd.value & 0xFF;
5268                 me4000_outb(tmp, cnt_context->counter_0_reg);
5269                 tmp = (cmd.value >> 8) & 0xFF;
5270                 me4000_outb(tmp, cnt_context->counter_0_reg);
5271                 break;
5272         case ME4000_CNT_COUNTER_1:
5273                 tmp = cmd.value & 0xFF;
5274                 me4000_outb(tmp, cnt_context->counter_1_reg);
5275                 tmp = (cmd.value >> 8) & 0xFF;
5276                 me4000_outb(tmp, cnt_context->counter_1_reg);
5277                 break;
5278         case ME4000_CNT_COUNTER_2:
5279                 tmp = cmd.value & 0xFF;
5280                 me4000_outb(tmp, cnt_context->counter_2_reg);
5281                 tmp = (cmd.value >> 8) & 0xFF;
5282                 me4000_outb(tmp, cnt_context->counter_2_reg);
5283                 break;
5284         default:
5285                 printk(KERN_ERR
5286                        "ME4000:me4000_cnt_write():Counter %d is not available\n",
5287                        cmd.counter);
5288                 return -EINVAL;
5289         }
5290
5291         return 0;
5292 }
5293
5294 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5295 {
5296         CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5297
5298         /* Set the mode and value for counter 0 */
5299         me4000_outb(0x30, cnt_context->ctrl_reg);
5300         me4000_outb(0x00, cnt_context->counter_0_reg);
5301         me4000_outb(0x00, cnt_context->counter_0_reg);
5302
5303         /* Set the mode and value for counter 1 */
5304         me4000_outb(0x70, cnt_context->ctrl_reg);
5305         me4000_outb(0x00, cnt_context->counter_1_reg);
5306         me4000_outb(0x00, cnt_context->counter_1_reg);
5307
5308         /* Set the mode and value for counter 2 */
5309         me4000_outb(0xB0, cnt_context->ctrl_reg);
5310         me4000_outb(0x00, cnt_context->counter_2_reg);
5311         me4000_outb(0x00, cnt_context->counter_2_reg);
5312
5313         return 0;
5314 }
5315
5316 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5317
5318 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5319                                 unsigned int service, unsigned long arg)
5320 {
5321         struct me4000_ext_int_context *ext_int_context;
5322
5323         CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5324
5325         ext_int_context = file_p->private_data;
5326
5327         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5328                 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5329                 return -ENOTTY;
5330         }
5331         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5332                 printk(KERN_ERR
5333                        "me4000_ext_int_ioctl():Service number to high\n");
5334                 return -ENOTTY;
5335         }
5336
5337         switch (service) {
5338         case ME4000_EXT_INT_ENABLE:
5339                 return me4000_ext_int_enable(ext_int_context);
5340         case ME4000_EXT_INT_DISABLE:
5341                 return me4000_ext_int_disable(ext_int_context);
5342         case ME4000_EXT_INT_COUNT:
5343                 return me4000_ext_int_count((unsigned long *)arg,
5344                                             ext_int_context);
5345         default:
5346                 printk(KERN_ERR
5347                        "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5348                        service);
5349                 return -ENOTTY;
5350         }
5351         return 0;
5352 }
5353
5354 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5355 {
5356         unsigned long tmp;
5357
5358         CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5359
5360         tmp = me4000_inl(ext_int_context->ctrl_reg);
5361         tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5362         me4000_outl(tmp, ext_int_context->ctrl_reg);
5363
5364         return 0;
5365 }
5366
5367 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5368 {
5369         unsigned long tmp;
5370
5371         CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5372
5373         tmp = me4000_inl(ext_int_context->ctrl_reg);
5374         tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5375         me4000_outl(tmp, ext_int_context->ctrl_reg);
5376
5377         return 0;
5378 }
5379
5380 static int me4000_ext_int_count(unsigned long *arg,
5381                                 struct me4000_ext_int_context *ext_int_context)
5382 {
5383
5384         CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5385
5386         put_user(ext_int_context->int_count, arg);
5387         return 0;
5388 }
5389
5390 /*------------------------------------ General stuff ------------------------------------*/
5391
5392 static int me4000_get_user_info(struct me4000_user_info *arg,
5393                                 struct me4000_info *board_info)
5394 {
5395         struct me4000_user_info user_info;
5396
5397         CALL_PDEBUG("me4000_get_user_info() is executed\n");
5398
5399         user_info.board_count = board_info->board_count;
5400         user_info.plx_regbase = board_info->plx_regbase;
5401         user_info.plx_regbase_size = board_info->plx_regbase_size;
5402         user_info.me4000_regbase = board_info->me4000_regbase;
5403         user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5404         user_info.serial_no = board_info->serial_no;
5405         user_info.hw_revision = board_info->hw_revision;
5406         user_info.vendor_id = board_info->vendor_id;
5407         user_info.device_id = board_info->device_id;
5408         user_info.pci_bus_no = board_info->pci_bus_no;
5409         user_info.pci_dev_no = board_info->pci_dev_no;
5410         user_info.pci_func_no = board_info->pci_func_no;
5411         user_info.irq = board_info->irq;
5412         user_info.irq_count = board_info->irq_count;
5413         user_info.driver_version = ME4000_DRIVER_VERSION;
5414         user_info.ao_count = board_info->board_p->ao.count;
5415         user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5416
5417         user_info.ai_count = board_info->board_p->ai.count;
5418         user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5419         user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5420
5421         user_info.dio_count = board_info->board_p->dio.count;
5422
5423         user_info.cnt_count = board_info->board_p->cnt.count;
5424
5425         if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5426                 return -EFAULT;
5427
5428         return 0;
5429 }
5430
5431 /*------------------------------------ ISR STUFF ------------------------------------*/
5432
5433 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5434 {
5435         int result = 0;
5436         struct me4000_ext_int_context *ext_int_context;
5437
5438         CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5439
5440         ext_int_context = file_ptr->private_data;
5441
5442         result =
5443             fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5444
5445         CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5446         return result;
5447 }
5448
5449 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5450 {
5451         u32 tmp;
5452         u32 value;
5453         struct me4000_ao_context *ao_context;
5454         int i;
5455         int c = 0;
5456         int c1 = 0;
5457         //unsigned long before;
5458         //unsigned long after;
5459
5460         ISR_PDEBUG("me4000_ao_isr() is executed\n");
5461
5462         ao_context = dev_id;
5463
5464         /* Check if irq number is right */
5465         if (irq != ao_context->irq) {
5466                 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5467                            irq);
5468                 return IRQ_NONE;
5469         }
5470
5471         /* Check if this DAC rised an interrupt */
5472         if (!
5473             ((0x1 << (ao_context->index + 3)) &
5474              me4000_inl(ao_context->irq_status_reg))) {
5475                 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5476                 return IRQ_NONE;
5477         }
5478
5479         /* Read status register to find out what happened */
5480         tmp = me4000_inl(ao_context->status_reg);
5481
5482         if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5483             && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5484                 c = ME4000_AO_FIFO_COUNT;
5485                 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5486         } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5487                    && (tmp & ME4000_AO_STATUS_BIT_HF)
5488                    && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5489                 c = ME4000_AO_FIFO_COUNT / 2;
5490                 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5491         } else {
5492                 c = 0;
5493                 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5494         }
5495
5496         ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5497
5498         while (1) {
5499                 c1 = me4000_values_to_end(ao_context->circ_buf,
5500                                           ME4000_AO_BUFFER_COUNT);
5501                 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5502                 if (c1 > c)
5503                         c1 = c;
5504
5505                 if (c1 <= 0) {
5506                         ISR_PDEBUG
5507                             ("me4000_ao_isr():Work done or buffer empty\n");
5508                         break;
5509                 }
5510                 //rdtscl(before);
5511                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5512                     ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5513                         for (i = 0; i < c1; i++) {
5514                                 value =
5515                                     ((u32)
5516                                      (*
5517                                       (ao_context->circ_buf.buf +
5518                                        ao_context->circ_buf.tail + i))) << 16;
5519                                 outl(value, ao_context->fifo_reg);
5520                         }
5521                 } else
5522                         outsw(ao_context->fifo_reg,
5523                               ao_context->circ_buf.buf +
5524                               ao_context->circ_buf.tail, c1);
5525
5526                 //rdtscl(after);
5527                 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5528
5529                 ao_context->circ_buf.tail =
5530                     (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5531                                                         1);
5532                 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5533                            c1, ao_context->fifo_reg);
5534                 c -= c1;
5535         }
5536
5537         /* If there are no values left in the buffer, disable interrupts */
5538         spin_lock(&ao_context->int_lock);
5539         if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5540                 ISR_PDEBUG
5541                     ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5542                 tmp = me4000_inl(ao_context->ctrl_reg);
5543                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5544                 me4000_outl(tmp, ao_context->ctrl_reg);
5545         }
5546         spin_unlock(&ao_context->int_lock);
5547
5548         /* Reset the interrupt */
5549         spin_lock(&ao_context->int_lock);
5550         tmp = me4000_inl(ao_context->ctrl_reg);
5551         tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5552         me4000_outl(tmp, ao_context->ctrl_reg);
5553         tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5554         me4000_outl(tmp, ao_context->ctrl_reg);
5555
5556         /* If state machine is stopped, flow was interrupted */
5557         if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5558                 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5559                 ao_context->pipe_flag = 1;      // Set flag in order to inform write routine
5560                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;  // Disable interrupt
5561         }
5562         me4000_outl(tmp, ao_context->ctrl_reg);
5563         spin_unlock(&ao_context->int_lock);
5564
5565         /* Wake up waiting process */
5566         wake_up_interruptible(&(ao_context->wait_queue));
5567
5568         /* Count the interrupt */
5569         ao_context->board_info->irq_count++;
5570
5571         return IRQ_HANDLED;
5572 }
5573
5574 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5575 {
5576         u32 tmp;
5577         struct me4000_ai_context *ai_context;
5578         int i;
5579         int c = 0;
5580         int c1 = 0;
5581 #ifdef ME4000_ISR_DEBUG
5582         unsigned long before;
5583         unsigned long after;
5584 #endif
5585
5586         ISR_PDEBUG("me4000_ai_isr() is executed\n");
5587
5588 #ifdef ME4000_ISR_DEBUG
5589         rdtscl(before);
5590 #endif
5591
5592         ai_context = dev_id;
5593
5594         /* Check if irq number is right */
5595         if (irq != ai_context->irq) {
5596                 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5597                            irq);
5598                 return IRQ_NONE;
5599         }
5600
5601         if (me4000_inl(ai_context->irq_status_reg) &
5602             ME4000_IRQ_STATUS_BIT_AI_HF) {
5603                 ISR_PDEBUG
5604                     ("me4000_ai_isr():Fifo half full interrupt occured\n");
5605
5606                 /* Read status register to find out what happened */
5607                 tmp = me4000_inl(ai_context->ctrl_reg);
5608
5609                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5610                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5611                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5612                         ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5613                         c = ME4000_AI_FIFO_COUNT;
5614
5615                         /* FIFO overflow, so stop conversion and disable all interrupts */
5616                         spin_lock(&ai_context->int_lock);
5617                         tmp = me4000_inl(ai_context->ctrl_reg);
5618                         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5619                         tmp &=
5620                             ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5621                               ME4000_AI_CTRL_BIT_SC_IRQ);
5622                         outl(tmp, ai_context->ctrl_reg);
5623                         spin_unlock(&ai_context->int_lock);
5624                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5625                            !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5626                            && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5627                         ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5628                         c = ME4000_AI_FIFO_COUNT / 2;
5629                 } else {
5630                         c = 0;
5631                         ISR_PDEBUG
5632                             ("me4000_ai_isr():Can't determine state of fifo\n");
5633                 }
5634
5635                 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5636
5637                 while (1) {
5638                         c1 = me4000_space_to_end(ai_context->circ_buf,
5639                                                  ME4000_AI_BUFFER_COUNT);
5640                         ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5641                         if (c1 > c)
5642                                 c1 = c;
5643
5644                         if (c1 <= 0) {
5645                                 ISR_PDEBUG
5646                                     ("me4000_ai_isr():Work done or buffer full\n");
5647                                 break;
5648                         }
5649
5650                         insw(ai_context->data_reg,
5651                              ai_context->circ_buf.buf +
5652                              ai_context->circ_buf.head, c1);
5653                         ai_context->circ_buf.head =
5654                             (ai_context->circ_buf.head +
5655                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5656                         c -= c1;
5657                 }
5658
5659                 /* Work is done, so reset the interrupt */
5660                 ISR_PDEBUG
5661                     ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5662                 spin_lock(&ai_context->int_lock);
5663                 tmp = me4000_inl(ai_context->ctrl_reg);
5664                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5665                 me4000_outl(tmp, ai_context->ctrl_reg);
5666                 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5667                 me4000_outl(tmp, ai_context->ctrl_reg);
5668                 spin_unlock(&ai_context->int_lock);
5669         }
5670
5671         if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5672                 ISR_PDEBUG
5673                     ("me4000_ai_isr():Sample counter interrupt occured\n");
5674
5675                 if (!ai_context->sample_counter_reload) {
5676                         ISR_PDEBUG
5677                             ("me4000_ai_isr():Single data block available\n");
5678
5679                         /* Poll data until fifo empty */
5680                         for (i = 0;
5681                              (i < ME4000_AI_FIFO_COUNT / 2)
5682                              && (inl(ai_context->ctrl_reg) &
5683                                  ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5684                                 if (me4000_space_to_end
5685                                     (ai_context->circ_buf,
5686                                      ME4000_AI_BUFFER_COUNT)) {
5687                                         *(ai_context->circ_buf.buf +
5688                                           ai_context->circ_buf.head) =
5689                  inw(ai_context->data_reg);
5690                                         ai_context->circ_buf.head =
5691                                             (ai_context->circ_buf.head +
5692                                              1) & (ME4000_AI_BUFFER_COUNT - 1);
5693                                 } else
5694                                         break;
5695                         }
5696                         ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5697                 } else {
5698                         if (ai_context->sample_counter <=
5699                             ME4000_AI_FIFO_COUNT / 2) {
5700                                 ISR_PDEBUG
5701                                     ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5702
5703                                 /* Read status register to find out what happened */
5704                                 tmp = me4000_inl(ai_context->ctrl_reg);
5705
5706                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5707                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5708                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5709                                         ISR_PDEBUG
5710                                             ("me4000_ai_isr():Fifo full\n");
5711                                         c = ME4000_AI_FIFO_COUNT;
5712
5713                                         /* FIFO overflow, so stop conversion */
5714                                         spin_lock(&ai_context->int_lock);
5715                                         tmp = me4000_inl(ai_context->ctrl_reg);
5716                                         tmp |=
5717                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5718                                         outl(tmp, ai_context->ctrl_reg);
5719                                         spin_unlock(&ai_context->int_lock);
5720                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5721                                            && !(tmp &
5722                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5723                                            && (tmp &
5724                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5725                                         ISR_PDEBUG
5726                                             ("me4000_ai_isr():Fifo half full\n");
5727                                         c = ME4000_AI_FIFO_COUNT / 2;
5728                                 } else {
5729                                         c = ai_context->sample_counter;
5730                                         ISR_PDEBUG
5731                                             ("me4000_ai_isr():Sample count values\n");
5732                                 }
5733
5734                                 ISR_PDEBUG
5735                                     ("me4000_ai_isr():Try to read %d values\n",
5736                                      c);
5737
5738                                 while (1) {
5739                                         c1 = me4000_space_to_end(ai_context->
5740                                                                  circ_buf,
5741                                                                  ME4000_AI_BUFFER_COUNT);
5742                                         ISR_PDEBUG
5743                                             ("me4000_ai_isr():Space to end = %d\n",
5744                                              c1);
5745                                         if (c1 > c)
5746                                                 c1 = c;
5747
5748                                         if (c1 <= 0) {
5749                                                 ISR_PDEBUG
5750                                                     ("me4000_ai_isr():Work done or buffer full\n");
5751                                                 break;
5752                                         }
5753
5754                                         insw(ai_context->data_reg,
5755                                              ai_context->circ_buf.buf +
5756                                              ai_context->circ_buf.head, c1);
5757                                         ai_context->circ_buf.head =
5758                                             (ai_context->circ_buf.head +
5759                                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5760                                         c -= c1;
5761                                 }
5762                         } else {
5763                                 ISR_PDEBUG
5764                                     ("me4000_ai_isr():Multiple data block available\n");
5765
5766                                 /* Read status register to find out what happened */
5767                                 tmp = me4000_inl(ai_context->ctrl_reg);
5768
5769                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5770                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5771                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5772                                         ISR_PDEBUG
5773                                             ("me4000_ai_isr():Fifo full\n");
5774                                         c = ME4000_AI_FIFO_COUNT;
5775
5776                                         /* FIFO overflow, so stop conversion */
5777                                         spin_lock(&ai_context->int_lock);
5778                                         tmp = me4000_inl(ai_context->ctrl_reg);
5779                                         tmp |=
5780                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5781                                         outl(tmp, ai_context->ctrl_reg);
5782                                         spin_unlock(&ai_context->int_lock);
5783
5784                                         while (1) {
5785                                                 c1 = me4000_space_to_end
5786                                                     (ai_context->circ_buf,
5787                                                      ME4000_AI_BUFFER_COUNT);
5788                                                 ISR_PDEBUG
5789                                                     ("me4000_ai_isr():Space to end = %d\n",
5790                                                      c1);
5791                                                 if (c1 > c)
5792                                                         c1 = c;
5793
5794                                                 if (c1 <= 0) {
5795                                                         ISR_PDEBUG
5796                                                             ("me4000_ai_isr():Work done or buffer full\n");
5797                                                         break;
5798                                                 }
5799
5800                                                 insw(ai_context->data_reg,
5801                                                      ai_context->circ_buf.buf +
5802                                                      ai_context->circ_buf.head,
5803                                                      c1);
5804                                                 ai_context->circ_buf.head =
5805                                                     (ai_context->circ_buf.head +
5806                                                      c1) &
5807                                                     (ME4000_AI_BUFFER_COUNT -
5808                                                      1);
5809                                                 c -= c1;
5810                                         }
5811                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5812                                            && !(tmp &
5813                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5814                                            && (tmp &
5815                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5816                                         ISR_PDEBUG
5817                                             ("me4000_ai_isr():Fifo half full\n");
5818                                         c = ME4000_AI_FIFO_COUNT / 2;
5819
5820                                         while (1) {
5821                                                 c1 = me4000_space_to_end
5822                                                     (ai_context->circ_buf,
5823                                                      ME4000_AI_BUFFER_COUNT);
5824                                                 ISR_PDEBUG
5825                                                     ("me4000_ai_isr():Space to end = %d\n",
5826                                                      c1);
5827                                                 if (c1 > c)
5828                                                         c1 = c;
5829
5830                                                 if (c1 <= 0) {
5831                                                         ISR_PDEBUG
5832                                                             ("me4000_ai_isr():Work done or buffer full\n");
5833                                                         break;
5834                                                 }
5835
5836                                                 insw(ai_context->data_reg,
5837                                                      ai_context->circ_buf.buf +
5838                                                      ai_context->circ_buf.head,
5839                                                      c1);
5840                                                 ai_context->circ_buf.head =
5841                                                     (ai_context->circ_buf.head +
5842                                                      c1) &
5843                                                     (ME4000_AI_BUFFER_COUNT -
5844                                                      1);
5845                                                 c -= c1;
5846                                         }
5847                                 } else {
5848                                         /* Poll data until fifo empty */
5849                                         for (i = 0;
5850                                              (i < ME4000_AI_FIFO_COUNT / 2)
5851                                              && (inl(ai_context->ctrl_reg) &
5852                                                  ME4000_AI_STATUS_BIT_EF_DATA);
5853                                              i++) {
5854                                                 if (me4000_space_to_end
5855                                                     (ai_context->circ_buf,
5856                                                      ME4000_AI_BUFFER_COUNT)) {
5857                                                         *(ai_context->circ_buf.
5858                                                           buf +
5859                                                           ai_context->circ_buf.
5860                                                           head) =
5861                                        inw(ai_context->data_reg);
5862                                                         ai_context->circ_buf.
5863                                                             head =
5864                                                             (ai_context->
5865                                                              circ_buf.head +
5866                                                              1) &
5867                                                             (ME4000_AI_BUFFER_COUNT
5868                                                              - 1);
5869                                                 } else
5870                                                         break;
5871                                         }
5872                                         ISR_PDEBUG
5873                                             ("me4000_ai_isr():%d values read\n",
5874                                              i);
5875                                 }
5876                         }
5877                 }
5878
5879                 /* Work is done, so reset the interrupt */
5880                 ISR_PDEBUG
5881                     ("me4000_ai_isr():reset interrupt from sample counter\n");
5882                 spin_lock(&ai_context->int_lock);
5883                 tmp = me4000_inl(ai_context->ctrl_reg);
5884                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5885                 me4000_outl(tmp, ai_context->ctrl_reg);
5886                 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5887                 me4000_outl(tmp, ai_context->ctrl_reg);
5888                 spin_unlock(&ai_context->int_lock);
5889         }
5890
5891         /* Values are now available, so wake up waiting process */
5892         if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5893                 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5894                 wake_up_interruptible(&(ai_context->wait_queue));
5895         }
5896
5897         /* If there is no space left in the buffer, disable interrupts */
5898         spin_lock(&ai_context->int_lock);
5899         if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5900                 ISR_PDEBUG
5901                     ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5902                 tmp = me4000_inl(ai_context->ctrl_reg);
5903                 tmp &=
5904                     ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5905                       ME4000_AI_CTRL_BIT_LE_IRQ);
5906                 me4000_outl(tmp, ai_context->ctrl_reg);
5907         }
5908         spin_unlock(&ai_context->int_lock);
5909
5910 #ifdef ME4000_ISR_DEBUG
5911         rdtscl(after);
5912         printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5913                after - before);
5914 #endif
5915
5916         return IRQ_HANDLED;
5917 }
5918
5919 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5920 {
5921         struct me4000_ext_int_context *ext_int_context;
5922         unsigned long tmp;
5923
5924         ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5925
5926         ext_int_context = dev_id;
5927
5928         /* Check if irq number is right */
5929         if (irq != ext_int_context->irq) {
5930                 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5931                            irq);
5932                 return IRQ_NONE;
5933         }
5934
5935         if (me4000_inl(ext_int_context->irq_status_reg) &
5936             ME4000_IRQ_STATUS_BIT_EX) {
5937                 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5938                 tmp = me4000_inl(ext_int_context->ctrl_reg);
5939                 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5940                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5941                 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5942                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5943
5944                 ext_int_context->int_count++;
5945
5946                 if (ext_int_context->fasync_ptr) {
5947                         ISR_PDEBUG
5948                             ("me2600_ext_int_isr():Send signal to process\n");
5949                         kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5950                                     POLL_IN);
5951                 }
5952         }
5953
5954         return IRQ_HANDLED;
5955 }
5956
5957 static void __exit me4000_module_exit(void)
5958 {
5959         struct list_head *board_p;
5960         struct me4000_info *board_info;
5961
5962         CALL_PDEBUG("cleanup_module() is executed\n");
5963
5964         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5965
5966         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5967
5968         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5969
5970         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5971
5972         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5973
5974         remove_proc_entry("me4000", NULL);
5975
5976         pci_unregister_driver(&me4000_driver);
5977
5978         /* Reset the boards */
5979         for (board_p = me4000_board_info_list.next;
5980              board_p != &me4000_board_info_list; board_p = board_p->next) {
5981                 board_info = list_entry(board_p, struct me4000_info, list);
5982                 me4000_reset_board(board_info);
5983         }
5984
5985         clear_board_info_list();
5986 }
5987
5988 module_exit(me4000_module_exit);
5989
5990 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5991                                int *eof, void *data)
5992 {
5993         int len = 0;
5994         int limit = count - 1000;
5995         struct me4000_info *board_info;
5996         struct list_head *ptr;
5997
5998         len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
5999                        (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
6000                        (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
6001                        (ME4000_DRIVER_VERSION & 0xFF));
6002
6003         /* Search for the board context */
6004         for (ptr = me4000_board_info_list.next;
6005              (ptr != &me4000_board_info_list) && (len < limit);
6006              ptr = ptr->next) {
6007                 board_info = list_entry(ptr, struct me4000_info, list);
6008
6009                 len +=
6010                     sprintf(buf + len, "Board number %d:\n",
6011                             board_info->board_count);
6012                 len += sprintf(buf + len, "---------------\n");
6013                 len +=
6014                     sprintf(buf + len, "PLX base register = 0x%lX\n",
6015                             board_info->plx_regbase);
6016                 len +=
6017                     sprintf(buf + len, "PLX base register size = 0x%X\n",
6018                             (unsigned int)board_info->plx_regbase_size);
6019                 len +=
6020                     sprintf(buf + len, "ME4000 base register = 0x%X\n",
6021                             (unsigned int)board_info->me4000_regbase);
6022                 len +=
6023                     sprintf(buf + len, "ME4000 base register size = 0x%X\n",
6024                             (unsigned int)board_info->me4000_regbase_size);
6025                 len +=
6026                     sprintf(buf + len, "Serial number = 0x%X\n",
6027                             board_info->serial_no);
6028                 len +=
6029                     sprintf(buf + len, "Hardware revision = 0x%X\n",
6030                             board_info->hw_revision);
6031                 len +=
6032                     sprintf(buf + len, "Vendor id = 0x%X\n",
6033                             board_info->vendor_id);
6034                 len +=
6035                     sprintf(buf + len, "Device id = 0x%X\n",
6036                             board_info->device_id);
6037                 len +=
6038                     sprintf(buf + len, "PCI bus number = %d\n",
6039                             board_info->pci_bus_no);
6040                 len +=
6041                     sprintf(buf + len, "PCI device number = %d\n",
6042                             board_info->pci_dev_no);
6043                 len +=
6044                     sprintf(buf + len, "PCI function number = %d\n",
6045                             board_info->pci_func_no);
6046                 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6047                 len +=
6048                     sprintf(buf + len,
6049                             "Count of interrupts since module was loaded = %d\n",
6050                             board_info->irq_count);
6051
6052                 len +=
6053                     sprintf(buf + len, "Count of analog outputs = %d\n",
6054                             board_info->board_p->ao.count);
6055                 len +=
6056                     sprintf(buf + len, "Count of analog output fifos = %d\n",
6057                             board_info->board_p->ao.fifo_count);
6058
6059                 len +=
6060                     sprintf(buf + len, "Count of analog inputs = %d\n",
6061                             board_info->board_p->ai.count);
6062                 len +=
6063                     sprintf(buf + len,
6064                             "Count of sample and hold devices for analog input = %d\n",
6065                             board_info->board_p->ai.sh_count);
6066                 len +=
6067                     sprintf(buf + len,
6068                             "Analog external trigger available for analog input = %d\n",
6069                             board_info->board_p->ai.ex_trig_analog);
6070
6071                 len +=
6072                     sprintf(buf + len, "Count of digital ports = %d\n",
6073                             board_info->board_p->dio.count);
6074
6075                 len +=
6076                     sprintf(buf + len, "Count of counter devices = %d\n",
6077                             board_info->board_p->cnt.count);
6078                 len +=
6079                     sprintf(buf + len, "AI control register = 0x%08X\n",
6080                             inl(board_info->me4000_regbase +
6081                                 ME4000_AI_CTRL_REG));
6082
6083                 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6084                                inl(board_info->me4000_regbase +
6085                                    ME4000_AO_00_CTRL_REG));
6086                 len +=
6087                     sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6088                             inl(board_info->me4000_regbase +
6089                                 ME4000_AO_00_STATUS_REG));
6090                 len +=
6091                     sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6092                             inl(board_info->me4000_regbase +
6093                                 ME4000_AO_01_CTRL_REG));
6094                 len +=
6095                     sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6096                             inl(board_info->me4000_regbase +
6097                                 ME4000_AO_01_STATUS_REG));
6098                 len +=
6099                     sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6100                             inl(board_info->me4000_regbase +
6101                                 ME4000_AO_02_CTRL_REG));
6102                 len +=
6103                     sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6104                             inl(board_info->me4000_regbase +
6105                                 ME4000_AO_02_STATUS_REG));
6106                 len +=
6107                     sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6108                             inl(board_info->me4000_regbase +
6109                                 ME4000_AO_03_CTRL_REG));
6110                 len +=
6111                     sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6112                             inl(board_info->me4000_regbase +
6113                                 ME4000_AO_03_STATUS_REG));
6114         }
6115
6116         *eof = 1;
6117         return len;
6118 }