drivers/staging/me4000/me4000.c

   1 /* Device driver for Meilhaus ME-4000 board family.
   2  * ================================================
   3  *
   4  *  Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
   5  *
   6  *  This file is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *  Author:     Guenter Gebhardt        <g.gebhardt@meilhaus.de>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/fs.h>
  25 #include <linux/sched.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <asm/io.h>
  29 #include <asm/system.h>
  30 #include <asm/uaccess.h>
  31 #include <linux/errno.h>
  32 #include <linux/delay.h>
  33 #include <linux/fs.h>
  34 #include <linux/mm.h>
  35 #include <linux/unistd.h>
  36 #include <linux/list.h>
  37 #include <linux/proc_fs.h>
  38
  39 #include <linux/poll.h>
  40 #include <linux/vmalloc.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/uaccess.h>
  43 #include <linux/types.h>
  44
  45 #include <linux/slab.h>
  46
  47 /* Include-File for the Meilhaus ME-4000 I/O board */
  48 #include "me4000.h"
  49 #include "me4000_firmware.h"
  50 #include "me4610_firmware.h"
  51
  52 /* Administrative stuff for modinfo */
  53 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
  54 MODULE_DESCRIPTION
  55     ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
  56 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
  57 MODULE_LICENSE("GPL");
  58
  59 /* Board specific data are kept in a global list */
  60 LIST_HEAD(me4000_board_info_list);
  61
  62 /* Major Device Numbers. 0 means to get it automatically from the System */
  63 static int me4000_ao_major_driver_no = 0;
  64 static int me4000_ai_major_driver_no = 0;
  65 static int me4000_dio_major_driver_no = 0;
  66 static int me4000_cnt_major_driver_no = 0;
  67 static int me4000_ext_int_major_driver_no = 0;
  68
  69 /* Let the user specify a custom major driver number */
  70 module_param(me4000_ao_major_driver_no, int, 0);
  71 MODULE_PARM_DESC(me4000_ao_major_driver_no,
  72                  "Major driver number for analog output (default 0)");
  73
  74 module_param(me4000_ai_major_driver_no, int, 0);
  75 MODULE_PARM_DESC(me4000_ai_major_driver_no,
  76                  "Major driver number for analog input (default 0)");
  77
  78 module_param(me4000_dio_major_driver_no, int, 0);
  79 MODULE_PARM_DESC(me4000_dio_major_driver_no,
  80                  "Major driver number digital I/O (default 0)");
  81
  82 module_param(me4000_cnt_major_driver_no, int, 0);
  83 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
  84                  "Major driver number for counter (default 0)");
  85
  86 module_param(me4000_ext_int_major_driver_no, int, 0);
  87 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
  88                  "Major driver number for external interrupt (default 0)");
  89
  90 /*-----------------------------------------------------------------------------
  91   Module stuff
  92   ---------------------------------------------------------------------------*/
  93 int init_module(void);
  94 void cleanup_module(void);
  95
  96 /*-----------------------------------------------------------------------------
  97   Board detection and initialization
  98   ---------------------------------------------------------------------------*/
  99 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
 100 static int me4000_xilinx_download(me4000_info_t *);
 101 static int me4000_reset_board(me4000_info_t *);
 102
 103 static void clear_board_info_list(void);
 104 static int get_registers(struct pci_dev *dev, me4000_info_t * info);
 105 static int init_board_info(struct pci_dev *dev, me4000_info_t * board_info);
 106 static int alloc_ao_contexts(me4000_info_t * info);
 107 static void release_ao_contexts(me4000_info_t * board_info);
 108 static int alloc_ai_context(me4000_info_t * info);
 109 static int alloc_dio_context(me4000_info_t * info);
 110 static int alloc_cnt_context(me4000_info_t * info);
 111 static int alloc_ext_int_context(me4000_info_t * info);
 112
 113 /*-----------------------------------------------------------------------------
 114   Stuff used by all device parts
 115   ---------------------------------------------------------------------------*/
 116 static int me4000_open(struct inode *, struct file *);
 117 static int me4000_release(struct inode *, struct file *);
 118
 119 static int me4000_get_user_info(me4000_user_info_t *,
 120                                 me4000_info_t * board_info);
 121 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
 122
 123 /*-----------------------------------------------------------------------------
 124   Analog output stuff
 125   ---------------------------------------------------------------------------*/
 126 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
 127                                     loff_t *);
 128 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
 129                                     loff_t *);
 130 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
 131                                     loff_t *);
 132
 133 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
 134                                 unsigned long);
 135 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
 136                                 unsigned long);
 137 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
 138                                 unsigned long);
 139
 140 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
 141 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
 142
 143 static int me4000_ao_start(unsigned long *, me4000_ao_context_t *);
 144 static int me4000_ao_stop(me4000_ao_context_t *);
 145 static int me4000_ao_immediate_stop(me4000_ao_context_t *);
 146 static int me4000_ao_timer_set_divisor(u32 *, me4000_ao_context_t *);
 147 static int me4000_ao_preload(me4000_ao_context_t *);
 148 static int me4000_ao_preload_update(me4000_ao_context_t *);
 149 static int me4000_ao_ex_trig_set_edge(int *, me4000_ao_context_t *);
 150 static int me4000_ao_ex_trig_enable(me4000_ao_context_t *);
 151 static int me4000_ao_ex_trig_disable(me4000_ao_context_t *);
 152 static int me4000_ao_prepare(me4000_ao_context_t * ao_info);
 153 static int me4000_ao_reset(me4000_ao_context_t * ao_info);
 154 static int me4000_ao_enable_do(me4000_ao_context_t *);
 155 static int me4000_ao_disable_do(me4000_ao_context_t *);
 156 static int me4000_ao_fsm_state(int *, me4000_ao_context_t *);
 157
 158 static int me4000_ao_simultaneous_ex_trig(me4000_ao_context_t * ao_context);
 159 static int me4000_ao_simultaneous_sw(me4000_ao_context_t * ao_context);
 160 static int me4000_ao_simultaneous_disable(me4000_ao_context_t * ao_context);
 161 static int me4000_ao_simultaneous_update(me4000_ao_channel_list_t * channels,
 162                                          me4000_ao_context_t * ao_context);
 163
 164 static int me4000_ao_synchronous_ex_trig(me4000_ao_context_t * ao_context);
 165 static int me4000_ao_synchronous_sw(me4000_ao_context_t * ao_context);
 166 static int me4000_ao_synchronous_disable(me4000_ao_context_t * ao_context);
 167
 168 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
 169                                      me4000_ao_context_t * ao_context);
 170 static int me4000_ao_get_free_buffer(unsigned long *arg,
 171                                      me4000_ao_context_t * ao_context);
 172
 173 /*-----------------------------------------------------------------------------
 174   Analog input stuff
 175   ---------------------------------------------------------------------------*/
 176 static int me4000_ai_single(me4000_ai_single_t *, me4000_ai_context_t *);
 177 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
 178                                 unsigned long);
 179
 180 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
 181 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
 182                               unsigned long);
 183 static unsigned int me4000_ai_poll(struct file *, poll_table *);
 184 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
 185
 186 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
 187                                unsigned long);
 188
 189 static int me4000_ai_prepare(me4000_ai_context_t * ai_context);
 190 static int me4000_ai_reset(me4000_ai_context_t * ai_context);
 191 static int me4000_ai_config(me4000_ai_config_t *, me4000_ai_context_t *);
 192 static int me4000_ai_start(me4000_ai_context_t *);
 193 static int me4000_ai_start_ex(unsigned long *, me4000_ai_context_t *);
 194 static int me4000_ai_stop(me4000_ai_context_t *);
 195 static int me4000_ai_immediate_stop(me4000_ai_context_t *);
 196 static int me4000_ai_ex_trig_enable(me4000_ai_context_t *);
 197 static int me4000_ai_ex_trig_disable(me4000_ai_context_t *);
 198 static int me4000_ai_ex_trig_setup(me4000_ai_trigger_t *,
 199                                    me4000_ai_context_t *);
 200 static int me4000_ai_sc_setup(me4000_ai_sc_t * arg,
 201                               me4000_ai_context_t * ai_context);
 202 static int me4000_ai_offset_enable(me4000_ai_context_t * ai_context);
 203 static int me4000_ai_offset_disable(me4000_ai_context_t * ai_context);
 204 static int me4000_ai_fullscale_enable(me4000_ai_context_t * ai_context);
 205 static int me4000_ai_fullscale_disable(me4000_ai_context_t * ai_context);
 206 static int me4000_ai_fsm_state(int *arg, me4000_ai_context_t * ai_context);
 207 static int me4000_ai_get_count_buffer(unsigned long *arg,
 208                                       me4000_ai_context_t * ai_context);
 209
 210 /*-----------------------------------------------------------------------------
 211   EEPROM stuff
 212   ---------------------------------------------------------------------------*/
 213 static int me4000_eeprom_read(me4000_eeprom_t * arg,
 214                               me4000_ai_context_t * ai_context);
 215 static int me4000_eeprom_write(me4000_eeprom_t * arg,
 216                                me4000_ai_context_t * ai_context);
 217 static unsigned short eeprom_read_cmd(me4000_ai_context_t * ai_context,
 218                                       unsigned long cmd, int length);
 219 static int eeprom_write_cmd(me4000_ai_context_t * ai_context, unsigned long cmd,
 220                             int length);
 221
 222 /*-----------------------------------------------------------------------------
 223   Digital I/O stuff
 224   ---------------------------------------------------------------------------*/
 225 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
 226                             unsigned long);
 227 static int me4000_dio_config(me4000_dio_config_t *, me4000_dio_context_t *);
 228 static int me4000_dio_get_byte(me4000_dio_byte_t *, me4000_dio_context_t *);
 229 static int me4000_dio_set_byte(me4000_dio_byte_t *, me4000_dio_context_t *);
 230 static int me4000_dio_reset(me4000_dio_context_t *);
 231
 232 /*-----------------------------------------------------------------------------
 233   Counter stuff
 234   ---------------------------------------------------------------------------*/
 235 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
 236                             unsigned long);
 237 static int me4000_cnt_config(me4000_cnt_config_t *, me4000_cnt_context_t *);
 238 static int me4000_cnt_read(me4000_cnt_t *, me4000_cnt_context_t *);
 239 static int me4000_cnt_write(me4000_cnt_t *, me4000_cnt_context_t *);
 240 static int me4000_cnt_reset(me4000_cnt_context_t *);
 241
 242 /*-----------------------------------------------------------------------------
 243   External interrupt routines
 244   ---------------------------------------------------------------------------*/
 245 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
 246                                 unsigned long);
 247 static int me4000_ext_int_enable(me4000_ext_int_context_t *);
 248 static int me4000_ext_int_disable(me4000_ext_int_context_t *);
 249 static int me4000_ext_int_count(unsigned long *arg,
 250                                 me4000_ext_int_context_t * ext_int_context);
 251 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
 252
 253 /*-----------------------------------------------------------------------------
 254   The interrupt service routines
 255   ---------------------------------------------------------------------------*/
 256 static irqreturn_t me4000_ao_isr(int, void *);
 257 static irqreturn_t me4000_ai_isr(int, void *);
 258 static irqreturn_t me4000_ext_int_isr(int, void *);
 259
 260 /*-----------------------------------------------------------------------------
 261   Inline functions
 262   ---------------------------------------------------------------------------*/
 263 static int inline me4000_buf_count(me4000_circ_buf_t, int);
 264 static int inline me4000_buf_space(me4000_circ_buf_t, int);
 265 static int inline me4000_space_to_end(me4000_circ_buf_t, int);
 266 static int inline me4000_values_to_end(me4000_circ_buf_t, int);
 267
 268 static void inline me4000_outb(unsigned char value, unsigned long port);
 269 static void inline me4000_outl(unsigned long value, unsigned long port);
 270 static unsigned long inline me4000_inl(unsigned long port);
 271 static unsigned char inline me4000_inb(unsigned long port);
 272
 273 static int me4000_buf_count(me4000_circ_buf_t buf, int size)
 274 {
 275         return ((buf.head - buf.tail) & (size - 1));
 276 }
 277
 278 static int me4000_buf_space(me4000_circ_buf_t buf, int size)
 279 {
 280         return ((buf.tail - (buf.head + 1)) & (size - 1));
 281 }
 282
 283 static int me4000_values_to_end(me4000_circ_buf_t buf, int size)
 284 {
 285         int end;
 286         int n;
 287         end = size - buf.tail;
 288         n = (buf.head + end) & (size - 1);
 289         return (n < end) ? n : end;
 290 }
 291
 292 static int me4000_space_to_end(me4000_circ_buf_t buf, int size)
 293 {
 294         int end;
 295         int n;
 296
 297         end = size - 1 - buf.head;
 298         n = (end + buf.tail) & (size - 1);
 299         return (n <= end) ? n : (end + 1);
 300 }
 301
 302 static void me4000_outb(unsigned char value, unsigned long port)
 303 {
 304         PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
 305         outb(value, port);
 306 }
 307
 308 static void me4000_outl(unsigned long value, unsigned long port)
 309 {
 310         PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
 311         outl(value, port);
 312 }
 313
 314 static unsigned long me4000_inl(unsigned long port)
 315 {
 316         unsigned long value;
 317         value = inl(port);
 318         PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
 319         return value;
 320 }
 321
 322 static unsigned char me4000_inb(unsigned long port)
 323 {
 324         unsigned char value;
 325         value = inb(port);
 326         PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
 327         return value;
 328 }
 329
 330 struct pci_driver me4000_driver = {
 331         .name = ME4000_NAME,
 332         .id_table = me4000_pci_table,
 333         .probe = me4000_probe
 334 };
 335
 336 static struct file_operations me4000_ao_fops_sing = {
 337       owner:THIS_MODULE,
 338       write:me4000_ao_write_sing,
 339       ioctl:me4000_ao_ioctl_sing,
 340       open:me4000_open,
 341       release:me4000_release,
 342 };
 343
 344 static struct file_operations me4000_ao_fops_wrap = {
 345       owner:THIS_MODULE,
 346       write:me4000_ao_write_wrap,
 347       ioctl:me4000_ao_ioctl_wrap,
 348       open:me4000_open,
 349       release:me4000_release,
 350 };
 351
 352 static struct file_operations me4000_ao_fops_cont = {
 353       owner:THIS_MODULE,
 354       write:me4000_ao_write_cont,
 355       poll:me4000_ao_poll_cont,
 356       ioctl:me4000_ao_ioctl_cont,
 357       open:me4000_open,
 358       release:me4000_release,
 359       fsync:me4000_ao_fsync_cont,
 360 };
 361
 362 static struct file_operations me4000_ai_fops_sing = {
 363       owner:THIS_MODULE,
 364       ioctl:me4000_ai_ioctl_sing,
 365       open:me4000_open,
 366       release:me4000_release,
 367 };
 368
 369 static struct file_operations me4000_ai_fops_cont_sw = {
 370       owner:THIS_MODULE,
 371       read:me4000_ai_read,
 372       poll:me4000_ai_poll,
 373       ioctl:me4000_ai_ioctl_sw,
 374       open:me4000_open,
 375       release:me4000_release,
 376       fasync:me4000_ai_fasync,
 377 };
 378
 379 static struct file_operations me4000_ai_fops_cont_et = {
 380       owner:THIS_MODULE,
 381       read:me4000_ai_read,
 382       poll:me4000_ai_poll,
 383       ioctl:me4000_ai_ioctl_ext,
 384       open:me4000_open,
 385       release:me4000_release,
 386 };
 387
 388 static struct file_operations me4000_ai_fops_cont_et_value = {
 389       owner:THIS_MODULE,
 390       read:me4000_ai_read,
 391       poll:me4000_ai_poll,
 392       ioctl:me4000_ai_ioctl_ext,
 393       open:me4000_open,
 394       release:me4000_release,
 395 };
 396
 397 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
 398       owner:THIS_MODULE,
 399       read:me4000_ai_read,
 400       poll:me4000_ai_poll,
 401       ioctl:me4000_ai_ioctl_ext,
 402       open:me4000_open,
 403       release:me4000_release,
 404 };
 405
 406 static struct file_operations me4000_dio_fops = {
 407       owner:THIS_MODULE,
 408       ioctl:me4000_dio_ioctl,
 409       open:me4000_open,
 410       release:me4000_release,
 411 };
 412
 413 static struct file_operations me4000_cnt_fops = {
 414       owner:THIS_MODULE,
 415       ioctl:me4000_cnt_ioctl,
 416       open:me4000_open,
 417       release:me4000_release,
 418 };
 419
 420 static struct file_operations me4000_ext_int_fops = {
 421       owner:THIS_MODULE,
 422       ioctl:me4000_ext_int_ioctl,
 423       open:me4000_open,
 424       release:me4000_release,
 425       fasync:me4000_ext_int_fasync,
 426 };
 427
 428 static struct file_operations *me4000_ao_fops_array[] = {
 429         &me4000_ao_fops_sing,   // single operations
 430         &me4000_ao_fops_wrap,   // wraparound operations
 431         &me4000_ao_fops_cont,   // continous operations
 432 };
 433
 434 static struct file_operations *me4000_ai_fops_array[] = {
 435         &me4000_ai_fops_sing,   // single operations
 436         &me4000_ai_fops_cont_sw,        // continuous operations with software start
 437         &me4000_ai_fops_cont_et,        // continous operations with external trigger
 438         &me4000_ai_fops_cont_et_value,  // sample values by external trigger
 439         &me4000_ai_fops_cont_et_chanlist,       // work through one channel list by external trigger
 440 };
 441
 442 int __init me4000_init_module(void)
 443 {
 444         int result = 0;
 445
 446         CALL_PDEBUG("init_module() is executed\n");
 447
 448         /* Register driver capabilities */
 449         result = pci_register_driver(&me4000_driver);
 450         PDEBUG("init_module():%d devices detected\n", result);
 451         if (result < 0) {
 452                 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
 453                 goto INIT_ERROR_1;
 454         }
 455
 456         /* Allocate major number for analog output */
 457         result =
 458             register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
 459                             &me4000_ao_fops_sing);
 460         if (result < 0) {
 461                 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
 462                 goto INIT_ERROR_2;
 463         } else {
 464                 me4000_ao_major_driver_no = result;
 465         }
 466         PDEBUG("init_module():Major driver number for AO = %ld\n",
 467                me4000_ao_major_driver_no);
 468
 469         /* Allocate major number for analog input  */
 470         result =
 471             register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
 472                             &me4000_ai_fops_sing);
 473         if (result < 0) {
 474                 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
 475                 goto INIT_ERROR_3;
 476         } else {
 477                 me4000_ai_major_driver_no = result;
 478         }
 479         PDEBUG("init_module():Major driver number for AI = %ld\n",
 480                me4000_ai_major_driver_no);
 481
 482         /* Allocate major number for digital I/O */
 483         result =
 484             register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
 485                             &me4000_dio_fops);
 486         if (result < 0) {
 487                 printk(KERN_ERR
 488                        "ME4000:init_module():Can't get DIO major no\n");
 489                 goto INIT_ERROR_4;
 490         } else {
 491                 me4000_dio_major_driver_no = result;
 492         }
 493         PDEBUG("init_module():Major driver number for DIO = %ld\n",
 494                me4000_dio_major_driver_no);
 495
 496         /* Allocate major number for counter */
 497         result =
 498             register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
 499                             &me4000_cnt_fops);
 500         if (result < 0) {
 501                 printk(KERN_ERR
 502                        "ME4000:init_module():Can't get CNT major no\n");
 503                 goto INIT_ERROR_5;
 504         } else {
 505                 me4000_cnt_major_driver_no = result;
 506         }
 507         PDEBUG("init_module():Major driver number for CNT = %ld\n",
 508                me4000_cnt_major_driver_no);
 509
 510         /* Allocate major number for external interrupt */
 511         result =
 512             register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
 513                             &me4000_ext_int_fops);
 514         if (result < 0) {
 515                 printk(KERN_ERR
 516                        "ME4000:init_module():Can't get major no for external interrupt\n");
 517                 goto INIT_ERROR_6;
 518         } else {
 519                 me4000_ext_int_major_driver_no = result;
 520         }
 521         PDEBUG
 522             ("init_module():Major driver number for external interrupt = %ld\n",
 523              me4000_ext_int_major_driver_no);
 524
 525         /* Create the /proc/me4000 entry */
 526         if (!create_proc_read_entry
 527             ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
 528                 result = -ENODEV;
 529                 printk(KERN_ERR
 530                        "ME4000:init_module():Can't create proc entry\n");
 531                 goto INIT_ERROR_7;
 532         }
 533
 534         return 0;
 535
 536       INIT_ERROR_7:
 537         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
 538
 539       INIT_ERROR_6:
 540         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
 541
 542       INIT_ERROR_5:
 543         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
 544
 545       INIT_ERROR_4:
 546         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
 547
 548       INIT_ERROR_3:
 549         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
 550
 551       INIT_ERROR_2:
 552         pci_unregister_driver(&me4000_driver);
 553         clear_board_info_list();
 554
 555       INIT_ERROR_1:
 556         return result;
 557 }
 558
 559 module_init(me4000_init_module);
 560
 561 static void clear_board_info_list(void)
 562 {
 563         struct list_head *board_p;
 564         struct list_head *dac_p;
 565         me4000_info_t *board_info;
 566         me4000_ao_context_t *ao_context;
 567
 568         /* Clear context lists */
 569         for (board_p = me4000_board_info_list.next;
 570              board_p != &me4000_board_info_list; board_p = board_p->next) {
 571                 board_info = list_entry(board_p, me4000_info_t, list);
 572                 /* Clear analog output context list */
 573                 while (!list_empty(&board_info->ao_context_list)) {
 574                         dac_p = board_info->ao_context_list.next;
 575                         ao_context =
 576                             list_entry(dac_p, me4000_ao_context_t, list);
 577                         me4000_ao_reset(ao_context);
 578                         free_irq(ao_context->irq, ao_context);
 579                         if (ao_context->circ_buf.buf)
 580                                 kfree(ao_context->circ_buf.buf);
 581                         list_del(dac_p);
 582                         kfree(ao_context);
 583                 }
 584
 585                 /* Clear analog input context */
 586                 if (board_info->ai_context->circ_buf.buf)
 587                         kfree(board_info->ai_context->circ_buf.buf);
 588                 kfree(board_info->ai_context);
 589
 590                 /* Clear digital I/O context */
 591                 kfree(board_info->dio_context);
 592
 593                 /* Clear counter context */
 594                 kfree(board_info->cnt_context);
 595
 596                 /* Clear external interrupt context */
 597                 kfree(board_info->ext_int_context);
 598         }
 599
 600         /* Clear the board info list */
 601         while (!list_empty(&me4000_board_info_list)) {
 602                 board_p = me4000_board_info_list.next;
 603                 board_info = list_entry(board_p, me4000_info_t, list);
 604                 pci_release_regions(board_info->pci_dev_p);
 605                 list_del(board_p);
 606                 kfree(board_info);
 607         }
 608 }
 609
 610 static int get_registers(struct pci_dev *dev, me4000_info_t * board_info)
 611 {
 612
 613         /*--------------------------- plx regbase ---------------------------------*/
 614
 615         board_info->plx_regbase = pci_resource_start(dev, 1);
 616         if (board_info->plx_regbase == 0) {
 617                 printk(KERN_ERR
 618                        "ME4000:get_registers():PCI base address 1 is not available\n");
 619                 return -ENODEV;
 620         }
 621         board_info->plx_regbase_size = pci_resource_len(dev, 1);
 622
 623         PDEBUG
 624             ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
 625              board_info->plx_regbase, board_info->plx_regbase_size);
 626
 627         /*--------------------------- me4000 regbase ------------------------------*/
 628
 629         board_info->me4000_regbase = pci_resource_start(dev, 2);
 630         if (board_info->me4000_regbase == 0) {
 631                 printk(KERN_ERR
 632                        "ME4000:get_registers():PCI base address 2 is not available\n");
 633                 return -ENODEV;
 634         }
 635         board_info->me4000_regbase_size = pci_resource_len(dev, 2);
 636
 637         PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
 638                board_info->me4000_regbase, board_info->me4000_regbase_size);
 639
 640         /*--------------------------- timer regbase ------------------------------*/
 641
 642         board_info->timer_regbase = pci_resource_start(dev, 3);
 643         if (board_info->timer_regbase == 0) {
 644                 printk(KERN_ERR
 645                        "ME4000:get_registers():PCI base address 3 is not available\n");
 646                 return -ENODEV;
 647         }
 648         board_info->timer_regbase_size = pci_resource_len(dev, 3);
 649
 650         PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
 651                board_info->timer_regbase, board_info->timer_regbase_size);
 652
 653         /*--------------------------- program regbase ------------------------------*/
 654
 655         board_info->program_regbase = pci_resource_start(dev, 5);
 656         if (board_info->program_regbase == 0) {
 657                 printk(KERN_ERR
 658                        "get_registers():ME4000:PCI base address 5 is not available\n");
 659                 return -ENODEV;
 660         }
 661         board_info->program_regbase_size = pci_resource_len(dev, 5);
 662
 663         PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
 664                board_info->program_regbase, board_info->program_regbase_size);
 665
 666         return 0;
 667 }
 668
 669 static int init_board_info(struct pci_dev *pci_dev_p,
 670                            me4000_info_t * board_info)
 671 {
 672         int i;
 673         int result;
 674         struct list_head *board_p;
 675         board_info->pci_dev_p = pci_dev_p;
 676
 677         for (i = 0; i < ME4000_BOARD_VERSIONS; i++) {
 678                 if (me4000_boards[i].device_id == pci_dev_p->device) {
 679                         board_info->board_p = &me4000_boards[i];
 680                         break;
 681                 }
 682         }
 683         if (i == ME4000_BOARD_VERSIONS) {
 684                 printk(KERN_ERR
 685                        "ME4000:init_board_info():Device ID not valid\n");
 686                 return -ENODEV;
 687         }
 688
 689         /* Get the index of the board in the global list */
 690         for (board_p = me4000_board_info_list.next, i = 0;
 691              board_p != &me4000_board_info_list; board_p = board_p->next, i++) {
 692                 if (board_p == &board_info->list) {
 693                         board_info->board_count = i;
 694                         break;
 695                 }
 696         }
 697         if (board_p == &me4000_board_info_list) {
 698                 printk(KERN_ERR
 699                        "ME4000:init_board_info():Cannot get index of baord\n");
 700                 return -ENODEV;
 701         }
 702
 703         /* Init list head for analog output contexts */
 704         INIT_LIST_HEAD(&board_info->ao_context_list);
 705
 706         /* Init spin locks */
 707         spin_lock_init(&board_info->preload_lock);
 708         spin_lock_init(&board_info->ai_ctrl_lock);
 709
 710         /* Get the serial number */
 711         result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
 712         if (result != PCIBIOS_SUCCESSFUL) {
 713                 printk(KERN_WARNING
 714                        "ME4000:init_board_info: Can't get serial_no\n");
 715                 return result;
 716         }
 717         PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
 718
 719         /* Get the hardware revision */
 720         result =
 721             pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
 722         if (result != PCIBIOS_SUCCESSFUL) {
 723                 printk(KERN_WARNING
 724                        "ME4000:init_board_info():Can't get hw_revision\n");
 725                 return result;
 726         }
 727         PDEBUG("init_board_info():hw_revision = 0x%x\n",
 728                board_info->hw_revision);
 729
 730         /* Get the vendor id */
 731         board_info->vendor_id = pci_dev_p->vendor;
 732         PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
 733
 734         /* Get the device id */
 735         board_info->device_id = pci_dev_p->device;
 736         PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
 737
 738         /* Get the pci device number */
 739         board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
 740         PDEBUG("init_board_info():pci_func_no = 0x%x\n",
 741                board_info->pci_func_no);
 742
 743         /* Get the pci slot number */
 744         board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
 745         PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
 746
 747         /* Get the pci bus number */
 748         board_info->pci_bus_no = pci_dev_p->bus->number;
 749         PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
 750
 751         /* Get the irq assigned to the board */
 752         board_info->irq = pci_dev_p->irq;
 753         PDEBUG("init_board_info():irq = %d\n", board_info->irq);
 754
 755         return 0;
 756 }
 757
 758 static int alloc_ao_contexts(me4000_info_t * info)
 759 {
 760         int i;
 761         int err;
 762         me4000_ao_context_t *ao_context;
 763
 764         for (i = 0; i < info->board_p->ao.count; i++) {
 765                 ao_context = kmalloc(sizeof(me4000_ao_context_t), GFP_KERNEL);
 766                 if (!ao_context) {
 767                         printk(KERN_ERR
 768                                "alloc_ao_contexts():Can't get memory for ao context\n");
 769                         release_ao_contexts(info);
 770                         return -ENOMEM;
 771                 }
 772                 memset(ao_context, 0, sizeof(me4000_ao_context_t));
 773
 774                 spin_lock_init(&ao_context->use_lock);
 775                 spin_lock_init(&ao_context->int_lock);
 776                 ao_context->irq = info->irq;
 777                 init_waitqueue_head(&ao_context->wait_queue);
 778                 ao_context->board_info = info;
 779
 780                 if (info->board_p->ao.fifo_count) {
 781                         /* Allocate circular buffer */
 782                         ao_context->circ_buf.buf =
 783                             kmalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
 784                         if (!ao_context->circ_buf.buf) {
 785                                 printk(KERN_ERR
 786                                        "alloc_ao_contexts():Can't get circular buffer\n");
 787                                 release_ao_contexts(info);
 788                                 return -ENOMEM;
 789                         }
 790                         memset(ao_context->circ_buf.buf, 0,
 791                                ME4000_AO_BUFFER_SIZE);
 792
 793                         /* Clear the circular buffer */
 794                         ao_context->circ_buf.head = 0;
 795                         ao_context->circ_buf.tail = 0;
 796                 }
 797
 798                 switch (i) {
 799                 case 0:
 800                         ao_context->ctrl_reg =
 801                             info->me4000_regbase + ME4000_AO_00_CTRL_REG;
 802                         ao_context->status_reg =
 803                             info->me4000_regbase + ME4000_AO_00_STATUS_REG;
 804                         ao_context->fifo_reg =
 805                             info->me4000_regbase + ME4000_AO_00_FIFO_REG;
 806                         ao_context->single_reg =
 807                             info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
 808                         ao_context->timer_reg =
 809                             info->me4000_regbase + ME4000_AO_00_TIMER_REG;
 810                         ao_context->irq_status_reg =
 811                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 812                         ao_context->preload_reg =
 813                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 814                         break;
 815                 case 1:
 816                         ao_context->ctrl_reg =
 817                             info->me4000_regbase + ME4000_AO_01_CTRL_REG;
 818                         ao_context->status_reg =
 819                             info->me4000_regbase + ME4000_AO_01_STATUS_REG;
 820                         ao_context->fifo_reg =
 821                             info->me4000_regbase + ME4000_AO_01_FIFO_REG;
 822                         ao_context->single_reg =
 823                             info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
 824                         ao_context->timer_reg =
 825                             info->me4000_regbase + ME4000_AO_01_TIMER_REG;
 826                         ao_context->irq_status_reg =
 827                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 828                         ao_context->preload_reg =
 829                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 830                         break;
 831                 case 2:
 832                         ao_context->ctrl_reg =
 833                             info->me4000_regbase + ME4000_AO_02_CTRL_REG;
 834                         ao_context->status_reg =
 835                             info->me4000_regbase + ME4000_AO_02_STATUS_REG;
 836                         ao_context->fifo_reg =
 837                             info->me4000_regbase + ME4000_AO_02_FIFO_REG;
 838                         ao_context->single_reg =
 839                             info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
 840                         ao_context->timer_reg =
 841                             info->me4000_regbase + ME4000_AO_02_TIMER_REG;
 842                         ao_context->irq_status_reg =
 843                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 844                         ao_context->preload_reg =
 845                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 846                         break;
 847                 case 3:
 848                         ao_context->ctrl_reg =
 849                             info->me4000_regbase + ME4000_AO_03_CTRL_REG;
 850                         ao_context->status_reg =
 851                             info->me4000_regbase + ME4000_AO_03_STATUS_REG;
 852                         ao_context->fifo_reg =
 853                             info->me4000_regbase + ME4000_AO_03_FIFO_REG;
 854                         ao_context->single_reg =
 855                             info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
 856                         ao_context->timer_reg =
 857                             info->me4000_regbase + ME4000_AO_03_TIMER_REG;
 858                         ao_context->irq_status_reg =
 859                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 860                         ao_context->preload_reg =
 861                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 862                         break;
 863                 default:
 864                         break;
 865                 }
 866
 867                 if (info->board_p->ao.fifo_count) {
 868                         /* Request the interrupt line */
 869                         err =
 870                             request_irq(ao_context->irq, me4000_ao_isr,
 871                                         IRQF_DISABLED | IRQF_SHARED,
 872                                         ME4000_NAME, ao_context);
 873                         if (err) {
 874                                 printk(KERN_ERR
 875                                        "alloc_ao_contexts():Can't get interrupt line");
 876                                 if (ao_context->circ_buf.buf)
 877                                         kfree(ao_context->circ_buf.buf);
 878                                 kfree(ao_context);
 879                                 release_ao_contexts(info);
 880                                 return -ENODEV;
 881                         }
 882                 }
 883
 884                 list_add_tail(&ao_context->list, &info->ao_context_list);
 885                 ao_context->index = i;
 886         }
 887
 888         return 0;
 889 }
 890
 891 static void release_ao_contexts(me4000_info_t * board_info)
 892 {
 893         struct list_head *dac_p;
 894         me4000_ao_context_t *ao_context;
 895
 896         /* Clear analog output context list */
 897         while (!list_empty(&board_info->ao_context_list)) {
 898                 dac_p = board_info->ao_context_list.next;
 899                 ao_context = list_entry(dac_p, me4000_ao_context_t, list);
 900                 free_irq(ao_context->irq, ao_context);
 901                 if (ao_context->circ_buf.buf)
 902                         kfree(ao_context->circ_buf.buf);
 903                 list_del(dac_p);
 904                 kfree(ao_context);
 905         }
 906 }
 907
 908 static int alloc_ai_context(me4000_info_t * info)
 909 {
 910         me4000_ai_context_t *ai_context;
 911
 912         if (info->board_p->ai.count) {
 913                 ai_context = kmalloc(sizeof(me4000_ai_context_t), GFP_KERNEL);
 914                 if (!ai_context) {
 915                         printk(KERN_ERR
 916                                "ME4000:alloc_ai_context():Can't get memory for ai context\n");
 917                         return -ENOMEM;
 918                 }
 919                 memset(ai_context, 0, sizeof(me4000_ai_context_t));
 920
 921                 info->ai_context = ai_context;
 922
 923                 spin_lock_init(&ai_context->use_lock);
 924                 spin_lock_init(&ai_context->int_lock);
 925                 ai_context->number = 0;
 926                 ai_context->irq = info->irq;
 927                 init_waitqueue_head(&ai_context->wait_queue);
 928                 ai_context->board_info = info;
 929
 930                 ai_context->ctrl_reg =
 931                     info->me4000_regbase + ME4000_AI_CTRL_REG;
 932                 ai_context->status_reg =
 933                     info->me4000_regbase + ME4000_AI_STATUS_REG;
 934                 ai_context->channel_list_reg =
 935                     info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
 936                 ai_context->data_reg =
 937                     info->me4000_regbase + ME4000_AI_DATA_REG;
 938                 ai_context->chan_timer_reg =
 939                     info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
 940                 ai_context->chan_pre_timer_reg =
 941                     info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
 942                 ai_context->scan_timer_low_reg =
 943                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
 944                 ai_context->scan_timer_high_reg =
 945                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
 946                 ai_context->scan_pre_timer_low_reg =
 947                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
 948                 ai_context->scan_pre_timer_high_reg =
 949                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
 950                 ai_context->start_reg =
 951                     info->me4000_regbase + ME4000_AI_START_REG;
 952                 ai_context->irq_status_reg =
 953                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 954                 ai_context->sample_counter_reg =
 955                     info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
 956         }
 957
 958         return 0;
 959 }
 960
 961 static int alloc_dio_context(me4000_info_t * info)
 962 {
 963         me4000_dio_context_t *dio_context;
 964
 965         if (info->board_p->dio.count) {
 966                 dio_context = kmalloc(sizeof(me4000_dio_context_t), GFP_KERNEL);
 967                 if (!dio_context) {
 968                         printk(KERN_ERR
 969                                "ME4000:alloc_dio_context():Can't get memory for dio context\n");
 970                         return -ENOMEM;
 971                 }
 972                 memset(dio_context, 0, sizeof(me4000_dio_context_t));
 973
 974                 info->dio_context = dio_context;
 975
 976                 spin_lock_init(&dio_context->use_lock);
 977                 dio_context->board_info = info;
 978
 979                 dio_context->dio_count = info->board_p->dio.count;
 980
 981                 dio_context->dir_reg =
 982                     info->me4000_regbase + ME4000_DIO_DIR_REG;
 983                 dio_context->ctrl_reg =
 984                     info->me4000_regbase + ME4000_DIO_CTRL_REG;
 985                 dio_context->port_0_reg =
 986                     info->me4000_regbase + ME4000_DIO_PORT_0_REG;
 987                 dio_context->port_1_reg =
 988                     info->me4000_regbase + ME4000_DIO_PORT_1_REG;
 989                 dio_context->port_2_reg =
 990                     info->me4000_regbase + ME4000_DIO_PORT_2_REG;
 991                 dio_context->port_3_reg =
 992                     info->me4000_regbase + ME4000_DIO_PORT_3_REG;
 993         }
 994
 995         return 0;
 996 }
 997
 998 static int alloc_cnt_context(me4000_info_t * info)
 999 {
1000         me4000_cnt_context_t *cnt_context;
1001
1002         if (info->board_p->cnt.count) {
1003                 cnt_context = kmalloc(sizeof(me4000_cnt_context_t), GFP_KERNEL);
1004                 if (!cnt_context) {
1005                         printk(KERN_ERR
1006                                "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
1007                         return -ENOMEM;
1008                 }
1009                 memset(cnt_context, 0, sizeof(me4000_cnt_context_t));
1010
1011                 info->cnt_context = cnt_context;
1012
1013                 spin_lock_init(&cnt_context->use_lock);
1014                 cnt_context->board_info = info;
1015
1016                 cnt_context->ctrl_reg =
1017                     info->timer_regbase + ME4000_CNT_CTRL_REG;
1018                 cnt_context->counter_0_reg =
1019                     info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
1020                 cnt_context->counter_1_reg =
1021                     info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
1022                 cnt_context->counter_2_reg =
1023                     info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
1024         }
1025
1026         return 0;
1027 }
1028
1029 static int alloc_ext_int_context(me4000_info_t * info)
1030 {
1031         me4000_ext_int_context_t *ext_int_context;
1032
1033         if (info->board_p->cnt.count) {
1034                 ext_int_context =
1035                     kmalloc(sizeof(me4000_ext_int_context_t), GFP_KERNEL);
1036                 if (!ext_int_context) {
1037                         printk(KERN_ERR
1038                                "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1039                         return -ENOMEM;
1040                 }
1041                 memset(ext_int_context, 0, sizeof(me4000_ext_int_context_t));
1042
1043                 info->ext_int_context = ext_int_context;
1044
1045                 spin_lock_init(&ext_int_context->use_lock);
1046                 ext_int_context->board_info = info;
1047
1048                 ext_int_context->fasync_ptr = NULL;
1049                 ext_int_context->irq = info->irq;
1050
1051                 ext_int_context->ctrl_reg =
1052                     info->me4000_regbase + ME4000_AI_CTRL_REG;
1053                 ext_int_context->irq_status_reg =
1054                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1055         }
1056
1057         return 0;
1058 }
1059
1060 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1061 {
1062         int result = 0;
1063         me4000_info_t *board_info;
1064
1065         CALL_PDEBUG("me4000_probe() is executed\n");
1066
1067         /* Allocate structure for board context */
1068         board_info = kmalloc(sizeof(me4000_info_t), GFP_KERNEL);
1069         if (!board_info) {
1070                 printk(KERN_ERR
1071                        "ME4000:Can't get memory for board info structure\n");
1072                 result = -ENOMEM;
1073                 goto PROBE_ERROR_1;
1074         }
1075         memset(board_info, 0, sizeof(me4000_info_t));
1076
1077         /* Add to global linked list */
1078         list_add_tail(&board_info->list, &me4000_board_info_list);
1079
1080         /* Get the PCI base registers */
1081         result = get_registers(dev, board_info);
1082         if (result) {
1083                 printk(KERN_ERR "me4000_probe():Cannot get registers\n");
1084                 goto PROBE_ERROR_2;
1085         }
1086
1087         /* Enable the device */
1088         result = pci_enable_device(dev);
1089         if (result < 0) {
1090                 printk(KERN_ERR "me4000_probe():Cannot enable PCI device\n");
1091                 goto PROBE_ERROR_2;
1092         }
1093
1094         /* Request the PCI register regions */
1095         result = pci_request_regions(dev, ME4000_NAME);
1096         if (result < 0) {
1097                 printk(KERN_ERR "me4000_probe():Cannot request I/O regions\n");
1098                 goto PROBE_ERROR_2;
1099         }
1100
1101         /* Initialize board info */
1102         result = init_board_info(dev, board_info);
1103         if (result) {
1104                 printk(KERN_ERR "me4000_probe():Cannot init baord info\n");
1105                 goto PROBE_ERROR_3;
1106         }
1107
1108         /* Download the xilinx firmware */
1109         result = me4000_xilinx_download(board_info);
1110         if (result) {
1111                 printk(KERN_ERR "me4000_probe:Can't download firmware\n");
1112                 goto PROBE_ERROR_3;
1113         }
1114
1115         /* Make a hardware reset */
1116         result = me4000_reset_board(board_info);
1117         if (result) {
1118                 printk(KERN_ERR "me4000_probe:Can't reset board\n");
1119                 goto PROBE_ERROR_3;
1120         }
1121
1122         /* Allocate analog output context structures */
1123         result = alloc_ao_contexts(board_info);
1124         if (result) {
1125                 printk(KERN_ERR "me4000_probe():Cannot allocate ao contexts\n");
1126                 goto PROBE_ERROR_3;
1127         }
1128
1129         /* Allocate analog input context */
1130         result = alloc_ai_context(board_info);
1131         if (result) {
1132                 printk(KERN_ERR "me4000_probe():Cannot allocate ai context\n");
1133                 goto PROBE_ERROR_4;
1134         }
1135
1136         /* Allocate digital I/O context */
1137         result = alloc_dio_context(board_info);
1138         if (result) {
1139                 printk(KERN_ERR "me4000_probe():Cannot allocate dio context\n");
1140                 goto PROBE_ERROR_5;
1141         }
1142
1143         /* Allocate counter context */
1144         result = alloc_cnt_context(board_info);
1145         if (result) {
1146                 printk(KERN_ERR "me4000_probe():Cannot allocate cnt context\n");
1147                 goto PROBE_ERROR_6;
1148         }
1149
1150         /* Allocate external interrupt context */
1151         result = alloc_ext_int_context(board_info);
1152         if (result) {
1153                 printk(KERN_ERR
1154                        "me4000_probe():Cannot allocate ext_int context\n");
1155                 goto PROBE_ERROR_7;
1156         }
1157
1158         return 0;
1159
1160       PROBE_ERROR_7:
1161         kfree(board_info->cnt_context);
1162
1163       PROBE_ERROR_6:
1164         kfree(board_info->dio_context);
1165
1166       PROBE_ERROR_5:
1167         kfree(board_info->ai_context);
1168
1169       PROBE_ERROR_4:
1170         release_ao_contexts(board_info);
1171
1172       PROBE_ERROR_3:
1173         pci_release_regions(dev);
1174
1175       PROBE_ERROR_2:
1176         list_del(&board_info->list);
1177         kfree(board_info);
1178
1179       PROBE_ERROR_1:
1180         return result;
1181 }
1182
1183 static int me4000_xilinx_download(me4000_info_t * info)
1184 {
1185         int size = 0;
1186         u32 value = 0;
1187         int idx = 0;
1188         unsigned char *firm;
1189         wait_queue_head_t queue;
1190
1191         CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1192
1193         init_waitqueue_head(&queue);
1194
1195         firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1196
1197         /*
1198          * Set PLX local interrupt 2 polarity to high.
1199          * Interrupt is thrown by init pin of xilinx.
1200          */
1201         outl(0x10, info->plx_regbase + PLX_INTCSR);
1202
1203         /* Set /CS and /WRITE of the Xilinx */
1204         value = inl(info->plx_regbase + PLX_ICR);
1205         value |= 0x100;
1206         outl(value, info->plx_regbase + PLX_ICR);
1207
1208         /* Init Xilinx with CS1 */
1209         inb(info->program_regbase + 0xC8);
1210
1211         /* Wait until /INIT pin is set */
1212         udelay(20);
1213         if (!inl(info->plx_regbase + PLX_INTCSR) & 0x20) {
1214                 printk(KERN_ERR "me4000_xilinx_download():Can't init Xilinx\n");
1215                 return -EIO;
1216         }
1217
1218         /* Reset /CS and /WRITE of the Xilinx */
1219         value = inl(info->plx_regbase + PLX_ICR);
1220         value &= ~0x100;
1221         outl(value, info->plx_regbase + PLX_ICR);
1222
1223         /* Download Xilinx firmware */
1224         size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1225         udelay(10);
1226
1227         for (idx = 0; idx < size; idx++) {
1228                 outb(firm[16 + idx], info->program_regbase);
1229
1230                 udelay(10);
1231
1232                 /* Check if BUSY flag is low */
1233                 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1234                         printk(KERN_ERR
1235                                "me4000_xilinx_download():Xilinx is still busy (idx = %d)\n",
1236                                idx);
1237                         return -EIO;
1238                 }
1239         }
1240
1241         PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1242
1243         /* If done flag is high download was successful */
1244         if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1245                 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1246                 PDEBUG("me4000_xilinx_download():Download was successful\n");
1247         } else {
1248                 printk(KERN_ERR
1249                        "ME4000:me4000_xilinx_download():DONE flag is not set\n");
1250                 printk(KERN_ERR
1251                        "ME4000:me4000_xilinx_download():Download not succesful\n");
1252                 return -EIO;
1253         }
1254
1255         /* Set /CS and /WRITE */
1256         value = inl(info->plx_regbase + PLX_ICR);
1257         value |= 0x100;
1258         outl(value, info->plx_regbase + PLX_ICR);
1259
1260         return 0;
1261 }
1262
1263 static int me4000_reset_board(me4000_info_t * info)
1264 {
1265         unsigned long icr;
1266
1267         CALL_PDEBUG("me4000_reset_board() is executed\n");
1268
1269         /* Make a hardware reset */
1270         icr = me4000_inl(info->plx_regbase + PLX_ICR);
1271         icr |= 0x40000000;
1272         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1273         icr &= ~0x40000000;
1274         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1275
1276         /* Set both stop bits in the analog input control register */
1277         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1278                     info->me4000_regbase + ME4000_AI_CTRL_REG);
1279
1280         /* Set both stop bits in the analog output control register */
1281         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1282                     info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1283         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1284                     info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1285         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1286                     info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1287         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1288                     info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1289
1290         /* 0x8000 to the DACs means an output voltage of 0V */
1291         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1292         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1293         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1294         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1295
1296         /* Enable interrupts on the PLX */
1297         me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1298
1299         /* Set the adustment register for AO demux */
1300         me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1301                     info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1302
1303         /* Set digital I/O direction for port 0 to output on isolated versions */
1304         if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1305                 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1306         }
1307
1308         return 0;
1309 }
1310
1311 static int me4000_open(struct inode *inode_p, struct file *file_p)
1312 {
1313         int board, dev, mode;
1314         int err = 0;
1315         int i;
1316         struct list_head *ptr;
1317         me4000_info_t *board_info = NULL;
1318         me4000_ao_context_t *ao_context = NULL;
1319         me4000_ai_context_t *ai_context = NULL;
1320         me4000_dio_context_t *dio_context = NULL;
1321         me4000_cnt_context_t *cnt_context = NULL;
1322         me4000_ext_int_context_t *ext_int_context = NULL;
1323
1324         CALL_PDEBUG("me4000_open() is executed\n");
1325
1326         /* Analog output */
1327         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1328                 board = AO_BOARD(inode_p->i_rdev);
1329                 dev = AO_PORT(inode_p->i_rdev);
1330                 mode = AO_MODE(inode_p->i_rdev);
1331
1332                 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1333                        dev, mode);
1334
1335                 /* Search for the board context */
1336                 for (ptr = me4000_board_info_list.next, i = 0;
1337                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1338                         board_info = list_entry(ptr, me4000_info_t, list);
1339                         if (i == board)
1340                                 break;
1341                 }
1342
1343                 if (ptr == &me4000_board_info_list) {
1344                         printk(KERN_ERR
1345                                "ME4000:me4000_open():Board %d not in device list\n",
1346                                board);
1347                         return -ENODEV;
1348                 }
1349
1350                 /* Search for the dac context */
1351                 for (ptr = board_info->ao_context_list.next, i = 0;
1352                      ptr != &board_info->ao_context_list;
1353                      ptr = ptr->next, i++) {
1354                         ao_context = list_entry(ptr, me4000_ao_context_t, list);
1355                         if (i == dev)
1356                                 break;
1357                 }
1358
1359                 if (ptr == &board_info->ao_context_list) {
1360                         printk(KERN_ERR
1361                                "ME4000:me4000_open():Device %d not in device list\n",
1362                                dev);
1363                         return -ENODEV;
1364                 }
1365
1366                 /* Check if mode is valid */
1367                 if (mode > 2) {
1368                         printk(KERN_ERR
1369                                "ME4000:me4000_open():Mode is not valid\n");
1370                         return -ENODEV;
1371                 }
1372
1373                 /* Check if mode is valid for this AO */
1374                 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1375                     && (dev >= board_info->board_p->ao.fifo_count)) {
1376                         printk(KERN_ERR
1377                                "ME4000:me4000_open():AO %d only in single mode available\n",
1378                                dev);
1379                         return -ENODEV;
1380                 }
1381
1382                 /* Check if already opened */
1383                 spin_lock(&ao_context->use_lock);
1384                 if (ao_context->dac_in_use) {
1385                         printk(KERN_ERR
1386                                "ME4000:me4000_open():AO %d already in use\n",
1387                                dev);
1388                         spin_unlock(&ao_context->use_lock);
1389                         return -EBUSY;
1390                 }
1391                 ao_context->dac_in_use = 1;
1392                 spin_unlock(&ao_context->use_lock);
1393
1394                 ao_context->mode = mode;
1395
1396                 /* Hold the context in private data */
1397                 file_p->private_data = ao_context;
1398
1399                 /* Set file operations pointer */
1400                 file_p->f_op = me4000_ao_fops_array[mode];
1401
1402                 err = me4000_ao_prepare(ao_context);
1403                 if (err) {
1404                         ao_context->dac_in_use = 0;
1405                         return 1;
1406                 }
1407         }
1408         /* Analog input */
1409         else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1410                 board = AI_BOARD(inode_p->i_rdev);
1411                 mode = AI_MODE(inode_p->i_rdev);
1412
1413                 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1414
1415                 /* Search for the board context */
1416                 for (ptr = me4000_board_info_list.next, i = 0;
1417                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1418                         board_info = list_entry(ptr, me4000_info_t, list);
1419                         if (i == board)
1420                                 break;
1421                 }
1422
1423                 if (ptr == &me4000_board_info_list) {
1424                         printk(KERN_ERR
1425                                "ME4000:me4000_open():Board %d not in device list\n",
1426                                board);
1427                         return -ENODEV;
1428                 }
1429
1430                 ai_context = board_info->ai_context;
1431
1432                 /* Check if mode is valid */
1433                 if (mode > 5) {
1434                         printk(KERN_ERR
1435                                "ME4000:me4000_open():Mode is not valid\n");
1436                         return -EINVAL;
1437                 }
1438
1439                 /* Check if already opened */
1440                 spin_lock(&ai_context->use_lock);
1441                 if (ai_context->in_use) {
1442                         printk(KERN_ERR
1443                                "ME4000:me4000_open():AI already in use\n");
1444                         spin_unlock(&ai_context->use_lock);
1445                         return -EBUSY;
1446                 }
1447                 ai_context->in_use = 1;
1448                 spin_unlock(&ai_context->use_lock);
1449
1450                 ai_context->mode = mode;
1451
1452                 /* Hold the context in private data */
1453                 file_p->private_data = ai_context;
1454
1455                 /* Set file operations pointer */
1456                 file_p->f_op = me4000_ai_fops_array[mode];
1457
1458                 /* Prepare analog input */
1459                 me4000_ai_prepare(ai_context);
1460         }
1461         /* Digital I/O */
1462         else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1463                 board = DIO_BOARD(inode_p->i_rdev);
1464                 dev = 0;
1465                 mode = 0;
1466
1467                 PDEBUG("me4000_open():board = %d\n", board);
1468
1469                 /* Search for the board context */
1470                 for (ptr = me4000_board_info_list.next;
1471                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1472                         board_info = list_entry(ptr, me4000_info_t, list);
1473                         if (board_info->board_count == board)
1474                                 break;
1475                 }
1476
1477                 if (ptr == &me4000_board_info_list) {
1478                         printk(KERN_ERR
1479                                "ME4000:me4000_open():Board %d not in device list\n",
1480                                board);
1481                         return -ENODEV;
1482                 }
1483
1484                 /* Search for the dio context */
1485                 dio_context = board_info->dio_context;
1486
1487                 /* Check if already opened */
1488                 spin_lock(&dio_context->use_lock);
1489                 if (dio_context->in_use) {
1490                         printk(KERN_ERR
1491                                "ME4000:me4000_open():DIO already in use\n");
1492                         spin_unlock(&dio_context->use_lock);
1493                         return -EBUSY;
1494                 }
1495                 dio_context->in_use = 1;
1496                 spin_unlock(&dio_context->use_lock);
1497
1498                 /* Hold the context in private data */
1499                 file_p->private_data = dio_context;
1500
1501                 /* Set file operations pointer to single functions */
1502                 file_p->f_op = &me4000_dio_fops;
1503
1504                 //me4000_dio_reset(dio_context);
1505         }
1506         /* Counters */
1507         else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1508                 board = CNT_BOARD(inode_p->i_rdev);
1509                 dev = 0;
1510                 mode = 0;
1511
1512                 PDEBUG("me4000_open():board = %d\n", board);
1513
1514                 /* Search for the board context */
1515                 for (ptr = me4000_board_info_list.next;
1516                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1517                         board_info = list_entry(ptr, me4000_info_t, list);
1518                         if (board_info->board_count == board)
1519                                 break;
1520                 }
1521
1522                 if (ptr == &me4000_board_info_list) {
1523                         printk(KERN_ERR
1524                                "ME4000:me4000_open():Board %d not in device list\n",
1525                                board);
1526                         return -ENODEV;
1527                 }
1528
1529                 /* Get the cnt context */
1530                 cnt_context = board_info->cnt_context;
1531
1532                 /* Check if already opened */
1533                 spin_lock(&cnt_context->use_lock);
1534                 if (cnt_context->in_use) {
1535                         printk(KERN_ERR
1536                                "ME4000:me4000_open():CNT already in use\n");
1537                         spin_unlock(&cnt_context->use_lock);
1538                         return -EBUSY;
1539                 }
1540                 cnt_context->in_use = 1;
1541                 spin_unlock(&cnt_context->use_lock);
1542
1543                 /* Hold the context in private data */
1544                 file_p->private_data = cnt_context;
1545
1546                 /* Set file operations pointer to single functions */
1547                 file_p->f_op = &me4000_cnt_fops;
1548         }
1549         /* External Interrupt */
1550         else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1551                 board = EXT_INT_BOARD(inode_p->i_rdev);
1552                 dev = 0;
1553                 mode = 0;
1554
1555                 PDEBUG("me4000_open():board = %d\n", board);
1556
1557                 /* Search for the board context */
1558                 for (ptr = me4000_board_info_list.next;
1559                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1560                         board_info = list_entry(ptr, me4000_info_t, list);
1561                         if (board_info->board_count == board)
1562                                 break;
1563                 }
1564
1565                 if (ptr == &me4000_board_info_list) {
1566                         printk(KERN_ERR
1567                                "ME4000:me4000_open():Board %d not in device list\n",
1568                                board);
1569                         return -ENODEV;
1570                 }
1571
1572                 /* Get the external interrupt context */
1573                 ext_int_context = board_info->ext_int_context;
1574
1575                 /* Check if already opened */
1576                 spin_lock(&cnt_context->use_lock);
1577                 if (ext_int_context->in_use) {
1578                         printk(KERN_ERR
1579                                "ME4000:me4000_open():External interrupt already in use\n");
1580                         spin_unlock(&ext_int_context->use_lock);
1581                         return -EBUSY;
1582                 }
1583                 ext_int_context->in_use = 1;
1584                 spin_unlock(&ext_int_context->use_lock);
1585
1586                 /* Hold the context in private data */
1587                 file_p->private_data = ext_int_context;
1588
1589                 /* Set file operations pointer to single functions */
1590                 file_p->f_op = &me4000_ext_int_fops;
1591
1592                 /* Request the interrupt line */
1593                 err =
1594                     request_irq(ext_int_context->irq, me4000_ext_int_isr,
1595                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1596                                 ext_int_context);
1597                 if (err) {
1598                         printk(KERN_ERR
1599                                "ME4000:me4000_open():Can't get interrupt line");
1600                         ext_int_context->in_use = 0;
1601                         return -ENODEV;
1602                 }
1603
1604                 /* Reset the counter */
1605                 me4000_ext_int_disable(ext_int_context);
1606         } else {
1607                 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1608                 return -EINVAL;
1609         }
1610
1611         return 0;
1612 }
1613
1614 static int me4000_release(struct inode *inode_p, struct file *file_p)
1615 {
1616         me4000_ao_context_t *ao_context;
1617         me4000_ai_context_t *ai_context;
1618         me4000_dio_context_t *dio_context;
1619         me4000_cnt_context_t *cnt_context;
1620         me4000_ext_int_context_t *ext_int_context;
1621
1622         CALL_PDEBUG("me4000_release() is executed\n");
1623
1624         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1625                 ao_context = file_p->private_data;
1626
1627                 /* Mark DAC as unused */
1628                 ao_context->dac_in_use = 0;
1629         } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1630                 ai_context = file_p->private_data;
1631
1632                 /* Reset the analog input */
1633                 me4000_ai_reset(ai_context);
1634
1635                 /* Free the interrupt and the circular buffer */
1636                 if (ai_context->mode) {
1637                         free_irq(ai_context->irq, ai_context);
1638                         kfree(ai_context->circ_buf.buf);
1639                         ai_context->circ_buf.buf = NULL;
1640                         ai_context->circ_buf.head = 0;
1641                         ai_context->circ_buf.tail = 0;
1642                 }
1643
1644                 /* Mark AI as unused */
1645                 ai_context->in_use = 0;
1646         } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1647                 dio_context = file_p->private_data;
1648
1649                 /* Mark digital I/O as unused */
1650                 dio_context->in_use = 0;
1651         } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1652                 cnt_context = file_p->private_data;
1653
1654                 /* Mark counters as unused */
1655                 cnt_context->in_use = 0;
1656         } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1657                 ext_int_context = file_p->private_data;
1658
1659                 /* Disable the externel interrupt */
1660                 me4000_ext_int_disable(ext_int_context);
1661
1662                 free_irq(ext_int_context->irq, ext_int_context);
1663
1664                 /* Delete the fasync structure and free memory */
1665                 me4000_ext_int_fasync(0, file_p, 0);
1666
1667                 /* Mark as unused */
1668                 ext_int_context->in_use = 0;
1669         } else {
1670                 printk(KERN_ERR
1671                        "ME4000:me4000_release():Major number unknown\n");
1672                 return -EINVAL;
1673         }
1674
1675         return 0;
1676 }
1677
1678 /*------------------------------- Analog output stuff --------------------------------------*/
1679
1680 static int me4000_ao_prepare(me4000_ao_context_t * ao_context)
1681 {
1682         unsigned long flags;
1683
1684         CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1685
1686         if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1687                 /* Only do anything if not already in the correct mode */
1688                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1689                 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1690                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1691                         return 0;
1692                 }
1693
1694                 /* Stop any conversion */
1695                 me4000_ao_immediate_stop(ao_context);
1696
1697                 /* Set the control register to default state  */
1698                 spin_lock_irqsave(&ao_context->int_lock, flags);
1699                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1700                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1701                             ME4000_AO_CTRL_BIT_STOP |
1702                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1703                             ao_context->ctrl_reg);
1704                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1705
1706                 /* Set to fastest sample rate */
1707                 me4000_outl(65, ao_context->timer_reg);
1708         } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1709                 /* Only do anything if not already in the correct mode */
1710                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1711                 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1712                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1713                         return 0;
1714                 }
1715
1716                 /* Stop any conversion */
1717                 me4000_ao_immediate_stop(ao_context);
1718
1719                 /* Set the control register to default state  */
1720                 spin_lock_irqsave(&ao_context->int_lock, flags);
1721                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1722                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1723                             ME4000_AO_CTRL_BIT_STOP |
1724                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1725                             ao_context->ctrl_reg);
1726                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1727
1728                 /* Set to fastest sample rate */
1729                 me4000_outl(65, ao_context->timer_reg);
1730         } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1731                 /* Only do anything if not already in the correct mode */
1732                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1733                 if (!
1734                     (mode &
1735                      (ME4000_AO_CONV_MODE_WRAPAROUND |
1736                       ME4000_AO_CONV_MODE_CONTINUOUS))) {
1737                         return 0;
1738                 }
1739
1740                 /* Stop any conversion */
1741                 me4000_ao_immediate_stop(ao_context);
1742
1743                 /* Clear the control register */
1744                 spin_lock_irqsave(&ao_context->int_lock, flags);
1745                 me4000_outl(0x0, ao_context->ctrl_reg);
1746                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1747
1748                 /* Set voltage to 0V */
1749                 me4000_outl(0x8000, ao_context->single_reg);
1750         } else {
1751                 printk(KERN_ERR
1752                        "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1753                 return -EINVAL;
1754         }
1755
1756         return 0;
1757 }
1758
1759 static int me4000_ao_reset(me4000_ao_context_t * ao_context)
1760 {
1761         u32 tmp;
1762         wait_queue_head_t queue;
1763         unsigned long flags;
1764
1765         CALL_PDEBUG("me4000_ao_reset() is executed\n");
1766
1767         init_waitqueue_head(&queue);
1768
1769         if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1770                 /*
1771                  * First stop conversion of the DAC before reconfigure.
1772                  * This is essantial, cause of the state machine.
1773                  * If not stopped before configuring mode, it could
1774                  * walk in a undefined state.
1775                  */
1776                 tmp = me4000_inl(ao_context->ctrl_reg);
1777                 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1778                 me4000_outl(tmp, ao_context->ctrl_reg);
1779
1780                 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1781                         sleep_on_timeout(&queue, 1);
1782                 }
1783
1784                 /* Set to transparent mode */
1785                 me4000_ao_simultaneous_disable(ao_context);
1786
1787                 /* Set to single mode in order to set default voltage */
1788                 me4000_outl(0x0, ao_context->ctrl_reg);
1789
1790                 /* Set voltage to 0V */
1791                 me4000_outl(0x8000, ao_context->single_reg);
1792
1793                 /* Set to fastest sample rate */
1794                 me4000_outl(65, ao_context->timer_reg);
1795
1796                 /* Set the original mode and enable FIFO */
1797                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1798                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1799                             ME4000_AO_CTRL_BIT_STOP |
1800                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1801                             ao_context->ctrl_reg);
1802         } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1803                 /*
1804                  * First stop conversion of the DAC before reconfigure.
1805                  * This is essantial, cause of the state machine.
1806                  * If not stopped before configuring mode, it could
1807                  * walk in a undefined state.
1808                  */
1809                 spin_lock_irqsave(&ao_context->int_lock, flags);
1810                 tmp = me4000_inl(ao_context->ctrl_reg);
1811                 tmp |= ME4000_AO_CTRL_BIT_STOP;
1812                 me4000_outl(tmp, ao_context->ctrl_reg);
1813                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1814
1815                 while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1816                         sleep_on_timeout(&queue, 1);
1817                 }
1818
1819                 /* Clear the circular buffer */
1820                 ao_context->circ_buf.head = 0;
1821                 ao_context->circ_buf.tail = 0;
1822
1823                 /* Set to transparent mode */
1824                 me4000_ao_simultaneous_disable(ao_context);
1825
1826                 /* Set to single mode in order to set default voltage */
1827                 spin_lock_irqsave(&ao_context->int_lock, flags);
1828                 tmp = me4000_inl(ao_context->ctrl_reg);
1829                 me4000_outl(0x0, ao_context->ctrl_reg);
1830
1831                 /* Set voltage to 0V */
1832                 me4000_outl(0x8000, ao_context->single_reg);
1833
1834                 /* Set to fastest sample rate */
1835                 me4000_outl(65, ao_context->timer_reg);
1836
1837                 /* Set the original mode and enable FIFO */
1838                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1839                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1840                             ME4000_AO_CTRL_BIT_STOP |
1841                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1842                             ao_context->ctrl_reg);
1843                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1844         } else {
1845                 /* Set to transparent mode */
1846                 me4000_ao_simultaneous_disable(ao_context);
1847
1848                 /* Set voltage to 0V */
1849                 me4000_outl(0x8000, ao_context->single_reg);
1850         }
1851
1852         return 0;
1853 }
1854
1855 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1856                                     size_t cnt, loff_t * offp)
1857 {
1858         me4000_ao_context_t *ao_context = filep->private_data;
1859         u32 value;
1860         const u16 *buffer = (const u16 *)buff;
1861
1862         CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1863
1864         if (cnt != 2) {
1865                 printk(KERN_ERR
1866                        "me4000_ao_write_sing():Write count is not 2\n");
1867                 return -EINVAL;
1868         }
1869
1870         if (get_user(value, buffer)) {
1871                 printk(KERN_ERR
1872                        "me4000_ao_write_sing():Cannot copy data from user\n");
1873                 return -EFAULT;
1874         }
1875
1876         me4000_outl(value, ao_context->single_reg);
1877
1878         return 2;
1879 }
1880
1881 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1882                                     size_t cnt, loff_t * offp)
1883 {
1884         me4000_ao_context_t *ao_context = filep->private_data;
1885         size_t i;
1886         u32 value;
1887         u32 tmp;
1888         const u16 *buffer = (const u16 *)buff;
1889         size_t count = cnt / 2;
1890
1891         CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1892
1893         /* Check if a conversion is already running */
1894         if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1895                 printk(KERN_ERR
1896                        "ME4000:me4000_ao_write_wrap():There is already a conversion running\n");
1897                 return -EBUSY;
1898         }
1899
1900         if (count > ME4000_AO_FIFO_COUNT) {
1901                 printk(KERN_ERR
1902                        "me4000_ao_write_wrap():Can't load more than %d values\n",
1903                        ME4000_AO_FIFO_COUNT);
1904                 return -ENOSPC;
1905         }
1906
1907         /* Reset the FIFO */
1908         tmp = inl(ao_context->ctrl_reg);
1909         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1910         outl(tmp, ao_context->ctrl_reg);
1911         tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1912         outl(tmp, ao_context->ctrl_reg);
1913
1914         for (i = 0; i < count; i++) {
1915                 if (get_user(value, buffer + i)) {
1916                         printk(KERN_ERR
1917                                "me4000_ao_write_single():Cannot copy data from user\n");
1918                         return -EFAULT;
1919                 }
1920                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1921                     || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1922                         value = value << 16;
1923                 outl(value, ao_context->fifo_reg);
1924         }
1925         CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1926
1927         return i * 2;
1928 }
1929
1930 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1931                                     size_t cnt, loff_t * offp)
1932 {
1933         me4000_ao_context_t *ao_context = filep->private_data;
1934         const u16 *buffer = (const u16 *)buff;
1935         size_t count = cnt / 2;
1936         unsigned long flags;
1937         u32 tmp;
1938         int c = 0;
1939         int k = 0;
1940         int ret = 0;
1941         u16 svalue;
1942         u32 lvalue;
1943         int i;
1944         wait_queue_head_t queue;
1945
1946         CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1947
1948         init_waitqueue_head(&queue);
1949
1950         /* Check count */
1951         if (count <= 0) {
1952                 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1953                 return 0;
1954         }
1955
1956         if (filep->f_flags & O_APPEND) {
1957                 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1958                 while (count > 0) {
1959                         if (filep->f_flags & O_NONBLOCK) {
1960                                 if (ao_context->pipe_flag) {
1961                                         printk(KERN_ERR
1962                                                "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1963                                         return -EPIPE;
1964                                 }
1965                                 c = me4000_space_to_end(ao_context->circ_buf,
1966                                                         ME4000_AO_BUFFER_COUNT);
1967                                 if (!c) {
1968                                         PDEBUG
1969                                             ("me4000_ao_write_cont():Returning from nonblocking write\n");
1970                                         break;
1971                                 }
1972                         } else {
1973                                 wait_event_interruptible(ao_context->wait_queue,
1974                                                          (c =
1975                                                           me4000_space_to_end
1976                                                           (ao_context->circ_buf,
1977                                                            ME4000_AO_BUFFER_COUNT)));
1978                                 if (ao_context->pipe_flag) {
1979                                         printk(KERN_ERR
1980                                                "me4000_ao_write_cont():Broken pipe in blocking write\n");
1981                                         return -EPIPE;
1982                                 }
1983                                 if (signal_pending(current)) {
1984                                         printk(KERN_ERR
1985                                                "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1986                                         return -EINTR;
1987                                 }
1988                         }
1989
1990                         PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1991
1992                         /* Only able to write size of free buffer or size of count */
1993                         if (count < c)
1994                                 c = count;
1995
1996                         k = 2 * c;
1997                         k -= copy_from_user(ao_context->circ_buf.buf +
1998                                             ao_context->circ_buf.head, buffer,
1999                                             k);
2000                         c = k / 2;
2001                         PDEBUG
2002                             ("me4000_ao_write_cont():Copy %d values from user space\n",
2003                              c);
2004
2005                         if (!c)
2006                                 return -EFAULT;
2007
2008                         ao_context->circ_buf.head =
2009                             (ao_context->circ_buf.head +
2010                              c) & (ME4000_AO_BUFFER_COUNT - 1);
2011                         buffer += c;
2012                         count -= c;
2013                         ret += c;
2014
2015                         /* Values are now available so enable interrupts */
2016                         spin_lock_irqsave(&ao_context->int_lock, flags);
2017                         if (me4000_buf_count
2018                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2019                                 tmp = me4000_inl(ao_context->ctrl_reg);
2020                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2021                                 me4000_outl(tmp, ao_context->ctrl_reg);
2022                         }
2023                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2024                 }
2025
2026                 /* Wait until the state machine is stopped if O_SYNC is set */
2027                 if (filep->f_flags & O_SYNC) {
2028                         while (inl(ao_context->status_reg) &
2029                                ME4000_AO_STATUS_BIT_FSM) {
2030                                 interruptible_sleep_on_timeout(&queue, 1);
2031                                 if (ao_context->pipe_flag) {
2032                                         PDEBUG
2033                                             ("me4000_ao_write_cont():Broken pipe detected after sync\n");
2034                                         return -EPIPE;
2035                                 }
2036                                 if (signal_pending(current)) {
2037                                         printk(KERN_ERR
2038                                                "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
2039                                         return -EINTR;
2040                                 }
2041                         }
2042                 }
2043         } else {
2044                 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2045                 if ((me4000_inl(ao_context->status_reg) &
2046                      ME4000_AO_STATUS_BIT_FSM)) {
2047                         printk(KERN_ERR
2048                                "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2049                         return -EBUSY;
2050                 }
2051
2052                 /* Clear the FIFO */
2053                 spin_lock_irqsave(&ao_context->int_lock, flags);
2054                 tmp = me4000_inl(ao_context->ctrl_reg);
2055                 tmp &=
2056                     ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2057                       ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2058                 me4000_outl(tmp, ao_context->ctrl_reg);
2059                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2060                 me4000_outl(tmp, ao_context->ctrl_reg);
2061                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2062
2063                 /* Clear the circular buffer */
2064                 ao_context->circ_buf.head = 0;
2065                 ao_context->circ_buf.tail = 0;
2066
2067                 /* Reset the broken pipe flag */
2068                 ao_context->pipe_flag = 0;
2069
2070                 /* Only able to write size of fifo or count */
2071                 c = ME4000_AO_FIFO_COUNT;
2072                 if (count < c)
2073                         c = count;
2074
2075                 PDEBUG
2076                     ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2077                      c, ao_context->fifo_reg);
2078
2079                 /* Write values to the fifo */
2080                 for (i = 0; i < c; i++) {
2081                         if (get_user(svalue, buffer))
2082                                 return -EFAULT;
2083
2084                         if (((ao_context->fifo_reg & 0xFF) ==
2085                              ME4000_AO_01_FIFO_REG)
2086                             || ((ao_context->fifo_reg & 0xFF) ==
2087                                 ME4000_AO_03_FIFO_REG)) {
2088                                 lvalue = ((u32) svalue) << 16;
2089                         } else
2090                                 lvalue = (u32) svalue;
2091
2092                         outl(lvalue, ao_context->fifo_reg);
2093                         buffer++;
2094                 }
2095                 count -= c;
2096                 ret += c;
2097
2098                 while (1) {
2099                         /* Get free buffer */
2100                         c = me4000_space_to_end(ao_context->circ_buf,
2101                                                 ME4000_AO_BUFFER_COUNT);
2102
2103                         if (c == 0)
2104                                 return (2 * ret);
2105
2106                         /* Only able to write size of free buffer or size of count */
2107                         if (count < c)
2108                                 c = count;
2109
2110                         /* If count = 0 return to user */
2111                         if (c <= 0) {
2112                                 PDEBUG
2113                                     ("me4000_ao_write_cont():Count reached 0\n");
2114                                 break;
2115                         }
2116
2117                         k = 2 * c;
2118                         k -= copy_from_user(ao_context->circ_buf.buf +
2119                                             ao_context->circ_buf.head, buffer,
2120                                             k);
2121                         c = k / 2;
2122                         PDEBUG
2123                             ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2124                              c);
2125
2126                         if (!c)
2127                                 return -EFAULT;
2128
2129                         ao_context->circ_buf.head =
2130                             (ao_context->circ_buf.head +
2131                              c) & (ME4000_AO_BUFFER_COUNT - 1);
2132                         buffer += c;
2133                         count -= c;
2134                         ret += c;
2135
2136                         /* If values in the buffer are available so enable interrupts */
2137                         spin_lock_irqsave(&ao_context->int_lock, flags);
2138                         if (me4000_buf_count
2139                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2140                                 PDEBUG
2141                                     ("me4000_ao_write_cont():Enable Interrupts\n");
2142                                 tmp = me4000_inl(ao_context->ctrl_reg);
2143                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2144                                 me4000_outl(tmp, ao_context->ctrl_reg);
2145                         }
2146                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2147                 }
2148         }
2149
2150         if (filep->f_flags & O_NONBLOCK) {
2151                 return (ret == 0) ? -EAGAIN : 2 * ret;
2152         }
2153
2154         return 2 * ret;
2155 }
2156
2157 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table * wait)
2158 {
2159         me4000_ao_context_t *ao_context;
2160         unsigned long mask = 0;
2161
2162         CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2163
2164         ao_context = file_p->private_data;
2165
2166         poll_wait(file_p, &ao_context->wait_queue, wait);
2167
2168         /* Get free buffer */
2169         if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2170                 mask |= POLLOUT | POLLWRNORM;
2171
2172         CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2173
2174         return mask;
2175 }
2176
2177 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2178                                 int datasync)
2179 {
2180         me4000_ao_context_t *ao_context;
2181         wait_queue_head_t queue;
2182
2183         CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2184
2185         ao_context = file_p->private_data;
2186         init_waitqueue_head(&queue);
2187
2188         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2189                 interruptible_sleep_on_timeout(&queue, 1);
2190                 if (ao_context->pipe_flag) {
2191                         printk(KERN_ERR
2192                                "me4000_ao_fsync_cont():Broken pipe detected\n");
2193                         return -EPIPE;
2194                 }
2195
2196                 if (signal_pending(current)) {
2197                         printk(KERN_ERR
2198                                "me4000_ao_fsync_cont():Wait on state machine interrupted\n");
2199                         return -EINTR;
2200                 }
2201         }
2202
2203         return 0;
2204 }
2205
2206 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2207                                 unsigned int service, unsigned long arg)
2208 {
2209         me4000_ao_context_t *ao_context;
2210
2211         CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2212
2213         ao_context = file_p->private_data;
2214
2215         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2216                 return -ENOTTY;
2217                 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2218         }
2219
2220         switch (service) {
2221         case ME4000_AO_EX_TRIG_SETUP:
2222                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2223         case ME4000_AO_EX_TRIG_ENABLE:
2224                 return me4000_ao_ex_trig_enable(ao_context);
2225         case ME4000_AO_EX_TRIG_DISABLE:
2226                 return me4000_ao_ex_trig_disable(ao_context);
2227         case ME4000_AO_PRELOAD:
2228                 return me4000_ao_preload(ao_context);
2229         case ME4000_AO_PRELOAD_UPDATE:
2230                 return me4000_ao_preload_update(ao_context);
2231         case ME4000_GET_USER_INFO:
2232                 return me4000_get_user_info((me4000_user_info_t *) arg,
2233                                             ao_context->board_info);
2234         case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2235                 return me4000_ao_simultaneous_ex_trig(ao_context);
2236         case ME4000_AO_SIMULTANEOUS_SW:
2237                 return me4000_ao_simultaneous_sw(ao_context);
2238         case ME4000_AO_SIMULTANEOUS_DISABLE:
2239                 return me4000_ao_simultaneous_disable(ao_context);
2240         case ME4000_AO_SIMULTANEOUS_UPDATE:
2241                 return
2242                     me4000_ao_simultaneous_update((me4000_ao_channel_list_t *)
2243                                                   arg, ao_context);
2244         case ME4000_AO_EX_TRIG_TIMEOUT:
2245                 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2246                                                  ao_context);
2247         case ME4000_AO_DISABLE_DO:
2248                 return me4000_ao_disable_do(ao_context);
2249         default:
2250                 printk(KERN_ERR
2251                        "me4000_ao_ioctl_sing():Service number invalid\n");
2252                 return -ENOTTY;
2253         }
2254
2255         return 0;
2256 }
2257
2258 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2259                                 unsigned int service, unsigned long arg)
2260 {
2261         me4000_ao_context_t *ao_context;
2262
2263         CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2264
2265         ao_context = file_p->private_data;
2266
2267         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2268                 return -ENOTTY;
2269                 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2270         }
2271
2272         switch (service) {
2273         case ME4000_AO_START:
2274                 return me4000_ao_start((unsigned long *)arg, ao_context);
2275         case ME4000_AO_STOP:
2276                 return me4000_ao_stop(ao_context);
2277         case ME4000_AO_IMMEDIATE_STOP:
2278                 return me4000_ao_immediate_stop(ao_context);
2279         case ME4000_AO_RESET:
2280                 return me4000_ao_reset(ao_context);
2281         case ME4000_AO_TIMER_SET_DIVISOR:
2282                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2283         case ME4000_AO_EX_TRIG_SETUP:
2284                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2285         case ME4000_AO_EX_TRIG_ENABLE:
2286                 return me4000_ao_ex_trig_enable(ao_context);
2287         case ME4000_AO_EX_TRIG_DISABLE:
2288                 return me4000_ao_ex_trig_disable(ao_context);
2289         case ME4000_GET_USER_INFO:
2290                 return me4000_get_user_info((me4000_user_info_t *) arg,
2291                                             ao_context->board_info);
2292         case ME4000_AO_FSM_STATE:
2293                 return me4000_ao_fsm_state((int *)arg, ao_context);
2294         case ME4000_AO_ENABLE_DO:
2295                 return me4000_ao_enable_do(ao_context);
2296         case ME4000_AO_DISABLE_DO:
2297                 return me4000_ao_disable_do(ao_context);
2298         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2299                 return me4000_ao_synchronous_ex_trig(ao_context);
2300         case ME4000_AO_SYNCHRONOUS_SW:
2301                 return me4000_ao_synchronous_sw(ao_context);
2302         case ME4000_AO_SYNCHRONOUS_DISABLE:
2303                 return me4000_ao_synchronous_disable(ao_context);
2304         default:
2305                 return -ENOTTY;
2306         }
2307         return 0;
2308 }
2309
2310 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2311                                 unsigned int service, unsigned long arg)
2312 {
2313         me4000_ao_context_t *ao_context;
2314
2315         CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2316
2317         ao_context = file_p->private_data;
2318
2319         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2320                 return -ENOTTY;
2321                 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2322         }
2323
2324         switch (service) {
2325         case ME4000_AO_START:
2326                 return me4000_ao_start((unsigned long *)arg, ao_context);
2327         case ME4000_AO_STOP:
2328                 return me4000_ao_stop(ao_context);
2329         case ME4000_AO_IMMEDIATE_STOP:
2330                 return me4000_ao_immediate_stop(ao_context);
2331         case ME4000_AO_RESET:
2332                 return me4000_ao_reset(ao_context);
2333         case ME4000_AO_TIMER_SET_DIVISOR:
2334                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2335         case ME4000_AO_EX_TRIG_SETUP:
2336                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2337         case ME4000_AO_EX_TRIG_ENABLE:
2338                 return me4000_ao_ex_trig_enable(ao_context);
2339         case ME4000_AO_EX_TRIG_DISABLE:
2340                 return me4000_ao_ex_trig_disable(ao_context);
2341         case ME4000_AO_ENABLE_DO:
2342                 return me4000_ao_enable_do(ao_context);
2343         case ME4000_AO_DISABLE_DO:
2344                 return me4000_ao_disable_do(ao_context);
2345         case ME4000_AO_FSM_STATE:
2346                 return me4000_ao_fsm_state((int *)arg, ao_context);
2347         case ME4000_GET_USER_INFO:
2348                 return me4000_get_user_info((me4000_user_info_t *) arg,
2349                                             ao_context->board_info);
2350         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2351                 return me4000_ao_synchronous_ex_trig(ao_context);
2352         case ME4000_AO_SYNCHRONOUS_SW:
2353                 return me4000_ao_synchronous_sw(ao_context);
2354         case ME4000_AO_SYNCHRONOUS_DISABLE:
2355                 return me4000_ao_synchronous_disable(ao_context);
2356         case ME4000_AO_GET_FREE_BUFFER:
2357                 return me4000_ao_get_free_buffer((unsigned long *)arg,
2358                                                  ao_context);
2359         default:
2360                 return -ENOTTY;
2361         }
2362         return 0;
2363 }
2364
2365 static int me4000_ao_start(unsigned long *arg, me4000_ao_context_t * ao_context)
2366 {
2367         u32 tmp;
2368         wait_queue_head_t queue;
2369         unsigned long ref;
2370         unsigned long timeout;
2371         unsigned long flags;
2372
2373         CALL_PDEBUG("me4000_ao_start() is executed\n");
2374
2375         if (get_user(timeout, arg)) {
2376                 printk(KERN_ERR
2377                        "me4000_ao_start():Cannot copy data from user\n");
2378                 return -EFAULT;
2379         }
2380
2381         init_waitqueue_head(&queue);
2382
2383         spin_lock_irqsave(&ao_context->int_lock, flags);
2384         tmp = inl(ao_context->ctrl_reg);
2385         tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2386         me4000_outl(tmp, ao_context->ctrl_reg);
2387         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2388
2389         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2390                 if (timeout) {
2391                         ref = jiffies;
2392                         while (!
2393                                (inl(ao_context->status_reg) &
2394                                 ME4000_AO_STATUS_BIT_FSM)) {
2395                                 interruptible_sleep_on_timeout(&queue, 1);
2396                                 if (signal_pending(current)) {
2397                                         printk(KERN_ERR
2398                                                "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2399                                         return -EINTR;
2400                                 }
2401                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2402                                         printk(KERN_ERR
2403                                                "ME4000:me4000_ao_start():Timeout reached\n");
2404                                         return -EIO;
2405                                 }
2406                         }
2407                 }
2408         } else {
2409                 me4000_outl(0x8000, ao_context->single_reg);
2410         }
2411
2412         return 0;
2413 }
2414
2415 static int me4000_ao_stop(me4000_ao_context_t * ao_context)
2416 {
2417         u32 tmp;
2418         wait_queue_head_t queue;
2419         unsigned long flags;
2420
2421         init_waitqueue_head(&queue);
2422
2423         CALL_PDEBUG("me4000_ao_stop() is executed\n");
2424
2425         /* Set the stop bit */
2426         spin_lock_irqsave(&ao_context->int_lock, flags);
2427         tmp = inl(ao_context->ctrl_reg);
2428         tmp |= ME4000_AO_CTRL_BIT_STOP;
2429         me4000_outl(tmp, ao_context->ctrl_reg);
2430         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2431
2432         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2433                 interruptible_sleep_on_timeout(&queue, 1);
2434                 if (signal_pending(current)) {
2435                         printk(KERN_ERR
2436                                "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2437                         return -EINTR;
2438                 }
2439         }
2440
2441         /* Clear the stop bit */
2442         //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2443         //me4000_outl(tmp, ao_context->ctrl_reg);
2444
2445         return 0;
2446 }
2447
2448 static int me4000_ao_immediate_stop(me4000_ao_context_t * ao_context)
2449 {
2450         u32 tmp;
2451         wait_queue_head_t queue;
2452         unsigned long flags;
2453
2454         init_waitqueue_head(&queue);
2455
2456         CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2457
2458         spin_lock_irqsave(&ao_context->int_lock, flags);
2459         tmp = inl(ao_context->ctrl_reg);
2460         tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2461         me4000_outl(tmp, ao_context->ctrl_reg);
2462         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2463
2464         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2465                 interruptible_sleep_on_timeout(&queue, 1);
2466                 if (signal_pending(current)) {
2467                         printk(KERN_ERR
2468                                "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2469                         return -EINTR;
2470                 }
2471         }
2472
2473         /* Clear the stop bits */
2474         //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2475         //me4000_outl(tmp, ao_context->ctrl_reg);
2476
2477         return 0;
2478 }
2479
2480 static int me4000_ao_timer_set_divisor(u32 * arg,
2481                                        me4000_ao_context_t * ao_context)
2482 {
2483         u32 divisor;
2484         u32 tmp;
2485
2486         CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2487
2488         if (get_user(divisor, arg))
2489                 return -EFAULT;
2490
2491         /* Check if the state machine is stopped */
2492         tmp = me4000_inl(ao_context->status_reg);
2493         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2494                 printk(KERN_ERR
2495                        "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2496                 return -EBUSY;
2497         }
2498
2499         PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2500                divisor);
2501
2502         /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2503         if (divisor < ME4000_AO_MIN_TICKS) {
2504                 printk(KERN_ERR
2505                        "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2506                 return -EINVAL;
2507         }
2508
2509         /* Fix bug in Firmware */
2510         divisor -= 2;
2511
2512         PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2513
2514         /* Write the divisor */
2515         me4000_outl(divisor, ao_context->timer_reg);
2516
2517         return 0;
2518 }
2519
2520 static int me4000_ao_ex_trig_set_edge(int *arg,
2521                                       me4000_ao_context_t * ao_context)
2522 {
2523         int mode;
2524         u32 tmp;
2525         unsigned long flags;
2526
2527         CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2528
2529         if (get_user(mode, arg))
2530                 return -EFAULT;
2531
2532         /* Check if the state machine is stopped */
2533         tmp = me4000_inl(ao_context->status_reg);
2534         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2535                 printk(KERN_ERR
2536                        "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2537                 return -EBUSY;
2538         }
2539
2540         if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2541                 spin_lock_irqsave(&ao_context->int_lock, flags);
2542                 tmp = me4000_inl(ao_context->ctrl_reg);
2543                 tmp &=
2544                     ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2545                       ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2546                 me4000_outl(tmp, ao_context->ctrl_reg);
2547                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2548         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2549                 spin_lock_irqsave(&ao_context->int_lock, flags);
2550                 tmp = me4000_inl(ao_context->ctrl_reg);
2551                 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2552                 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2553                 me4000_outl(tmp, ao_context->ctrl_reg);
2554                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2555         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2556                 spin_lock_irqsave(&ao_context->int_lock, flags);
2557                 tmp = me4000_inl(ao_context->ctrl_reg);
2558                 tmp |=
2559                     ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2560                     ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2561                 me4000_outl(tmp, ao_context->ctrl_reg);
2562                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2563         } else {
2564                 printk(KERN_ERR
2565                        "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2566                 return -EINVAL;
2567         }
2568
2569         return 0;
2570 }
2571
2572 static int me4000_ao_ex_trig_enable(me4000_ao_context_t * ao_context)
2573 {
2574         u32 tmp;
2575         unsigned long flags;
2576
2577         CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2578
2579         /* Check if the state machine is stopped */
2580         tmp = me4000_inl(ao_context->status_reg);
2581         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2582                 printk(KERN_ERR
2583                        "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2584                 return -EBUSY;
2585         }
2586
2587         spin_lock_irqsave(&ao_context->int_lock, flags);
2588         tmp = me4000_inl(ao_context->ctrl_reg);
2589         tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2590         me4000_outl(tmp, ao_context->ctrl_reg);
2591         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2592
2593         return 0;
2594 }
2595
2596 static int me4000_ao_ex_trig_disable(me4000_ao_context_t * ao_context)
2597 {
2598         u32 tmp;
2599         unsigned long flags;
2600
2601         CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2602
2603         /* Check if the state machine is stopped */
2604         tmp = me4000_inl(ao_context->status_reg);
2605         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2606                 printk(KERN_ERR
2607                        "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2608                 return -EBUSY;
2609         }
2610
2611         spin_lock_irqsave(&ao_context->int_lock, flags);
2612         tmp = me4000_inl(ao_context->ctrl_reg);
2613         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2614         me4000_outl(tmp, ao_context->ctrl_reg);
2615         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2616
2617         return 0;
2618 }
2619
2620 static int me4000_ao_simultaneous_disable(me4000_ao_context_t * ao_context)
2621 {
2622         u32 tmp;
2623
2624         CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2625
2626         /* Check if the state machine is stopped */
2627         /* Be careful here because this function is called from
2628            me4000_ao_synchronous disable */
2629         tmp = me4000_inl(ao_context->status_reg);
2630         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2631                 printk(KERN_ERR
2632                        "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2633                 return -EBUSY;
2634         }
2635
2636         spin_lock(&ao_context->board_info->preload_lock);
2637         tmp = me4000_inl(ao_context->preload_reg);
2638         tmp &= ~(0x1 << ao_context->index);     // Disable preload bit
2639         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2640         me4000_outl(tmp, ao_context->preload_reg);
2641         spin_unlock(&ao_context->board_info->preload_lock);
2642
2643         return 0;
2644 }
2645
2646 static int me4000_ao_simultaneous_ex_trig(me4000_ao_context_t * ao_context)
2647 {
2648         u32 tmp;
2649
2650         CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2651
2652         spin_lock(&ao_context->board_info->preload_lock);
2653         tmp = me4000_inl(ao_context->preload_reg);
2654         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2655         tmp |= (0x1 << (ao_context->index + 16));       // Enable hw simultaneous bit
2656         me4000_outl(tmp, ao_context->preload_reg);
2657         spin_unlock(&ao_context->board_info->preload_lock);
2658
2659         return 0;
2660 }
2661
2662 static int me4000_ao_simultaneous_sw(me4000_ao_context_t * ao_context)
2663 {
2664         u32 tmp;
2665
2666         CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2667
2668         spin_lock(&ao_context->board_info->preload_lock);
2669         tmp = me4000_inl(ao_context->preload_reg);
2670         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2671         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2672         me4000_outl(tmp, ao_context->preload_reg);
2673         spin_unlock(&ao_context->board_info->preload_lock);
2674
2675         return 0;
2676 }
2677
2678 static int me4000_ao_preload(me4000_ao_context_t * ao_context)
2679 {
2680         CALL_PDEBUG("me4000_ao_preload() is executed\n");
2681         return me4000_ao_simultaneous_sw(ao_context);
2682 }
2683
2684 static int me4000_ao_preload_update(me4000_ao_context_t * ao_context)
2685 {
2686         u32 tmp;
2687         u32 ctrl;
2688         struct list_head *entry;
2689
2690         CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2691
2692         spin_lock(&ao_context->board_info->preload_lock);
2693         tmp = me4000_inl(ao_context->preload_reg);
2694         list_for_each(entry, &ao_context->board_info->ao_context_list) {
2695                 /* The channels we update must be in the following state :
2696                    - Mode A
2697                    - Hardware trigger is disabled
2698                    - Corresponding simultaneous bit is reset
2699                  */
2700                 ctrl = me4000_inl(ao_context->ctrl_reg);
2701                 if (!
2702                     (ctrl &
2703                      (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2704                       ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2705                         if (!
2706                             (tmp &
2707                              (0x1 <<
2708                               (((me4000_ao_context_t *) entry)->index + 16)))) {
2709                                 tmp &=
2710                                     ~(0x1 <<
2711                                       (((me4000_ao_context_t *) entry)->index));
2712                         }
2713                 }
2714         }
2715         me4000_outl(tmp, ao_context->preload_reg);
2716         spin_unlock(&ao_context->board_info->preload_lock);
2717
2718         return 0;
2719 }
2720
2721 static int me4000_ao_simultaneous_update(me4000_ao_channel_list_t * arg,
2722                                          me4000_ao_context_t * ao_context)
2723 {
2724         int err;
2725         int i;
2726         u32 tmp;
2727         me4000_ao_channel_list_t channels;
2728
2729         CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2730
2731         /* Copy data from user */
2732         err = copy_from_user(&channels, arg, sizeof(me4000_ao_channel_list_t));
2733         if (err) {
2734                 printk(KERN_ERR
2735                        "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2736                 return -EFAULT;
2737         }
2738
2739         channels.list =
2740             kmalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2741         if (!channels.list) {
2742                 printk(KERN_ERR
2743                        "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2744                 return -ENOMEM;
2745         }
2746         memset(channels.list, 0, sizeof(unsigned long) * channels.count);
2747
2748         /* Copy channel list from user */
2749         err =
2750             copy_from_user(channels.list, arg->list,
2751                            sizeof(unsigned long) * channels.count);
2752         if (err) {
2753                 printk(KERN_ERR
2754                        "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2755                 kfree(channels.list);
2756                 return -EFAULT;
2757         }
2758
2759         spin_lock(&ao_context->board_info->preload_lock);
2760         tmp = me4000_inl(ao_context->preload_reg);
2761         for (i = 0; i < channels.count; i++) {
2762                 if (channels.list[i] >
2763                     ao_context->board_info->board_p->ao.count) {
2764                         spin_unlock(&ao_context->board_info->preload_lock);
2765                         kfree(channels.list);
2766                         printk(KERN_ERR
2767                                "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2768                         return -EFAULT;
2769                 }
2770                 tmp &= ~(0x1 << channels.list[i]);      // Clear the preload bit
2771                 tmp &= ~(0x1 << (channels.list[i] + 16));       // Clear the hw simultaneous bit
2772         }
2773         me4000_outl(tmp, ao_context->preload_reg);
2774         spin_unlock(&ao_context->board_info->preload_lock);
2775         kfree(channels.list);
2776
2777         return 0;
2778 }
2779
2780 static int me4000_ao_synchronous_ex_trig(me4000_ao_context_t * ao_context)
2781 {
2782         u32 tmp;
2783         unsigned long flags;
2784
2785         CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2786
2787         /* Check if the state machine is stopped */
2788         tmp = me4000_inl(ao_context->status_reg);
2789         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2790                 printk(KERN_ERR
2791                        "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2792                 return -EBUSY;
2793         }
2794
2795         spin_lock(&ao_context->board_info->preload_lock);
2796         tmp = me4000_inl(ao_context->preload_reg);
2797         tmp &= ~(0x1 << ao_context->index);     // Disable synchronous sw bit
2798         tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2799         me4000_outl(tmp, ao_context->preload_reg);
2800         spin_unlock(&ao_context->board_info->preload_lock);
2801
2802         /* Make runnable */
2803         spin_lock_irqsave(&ao_context->int_lock, flags);
2804         tmp = me4000_inl(ao_context->ctrl_reg);
2805         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2806                 tmp &=
2807                     ~(ME4000_AO_CTRL_BIT_STOP |
2808                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2809                 me4000_outl(tmp, ao_context->ctrl_reg);
2810         }
2811         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2812
2813         return 0;
2814 }
2815
2816 static int me4000_ao_synchronous_sw(me4000_ao_context_t * ao_context)
2817 {
2818         u32 tmp;
2819         unsigned long flags;
2820
2821         CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2822
2823         /* Check if the state machine is stopped */
2824         tmp = me4000_inl(ao_context->status_reg);
2825         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2826                 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2827                 return -EBUSY;
2828         }
2829
2830         spin_lock(&ao_context->board_info->preload_lock);
2831         tmp = me4000_inl(ao_context->preload_reg);
2832         tmp |= 0x1 << ao_context->index;        // Enable synchronous sw bit
2833         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable synchronous hw bit
2834         me4000_outl(tmp, ao_context->preload_reg);
2835         spin_unlock(&ao_context->board_info->preload_lock);
2836
2837         /* Make runnable */
2838         spin_lock_irqsave(&ao_context->int_lock, flags);
2839         tmp = me4000_inl(ao_context->ctrl_reg);
2840         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2841                 tmp &=
2842                     ~(ME4000_AO_CTRL_BIT_STOP |
2843                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2844                 me4000_outl(tmp, ao_context->ctrl_reg);
2845         }
2846         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2847
2848         return 0;
2849 }
2850
2851 static int me4000_ao_synchronous_disable(me4000_ao_context_t * ao_context)
2852 {
2853         return me4000_ao_simultaneous_disable(ao_context);
2854 }
2855
2856 static int me4000_ao_get_free_buffer(unsigned long *arg,
2857                                      me4000_ao_context_t * ao_context)
2858 {
2859         unsigned long c;
2860         int err;
2861
2862         c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2863
2864         err = copy_to_user(arg, &c, sizeof(unsigned long));
2865         if (err) {
2866                 printk(KERN_ERR
2867                        "ME4000:me4000_ao_get_free_buffer():Can't copy to user space\n");
2868                 return -EFAULT;
2869         }
2870
2871         return 0;
2872 }
2873
2874 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2875                                      me4000_ao_context_t * ao_context)
2876 {
2877         u32 tmp;
2878         wait_queue_head_t queue;
2879         unsigned long ref;
2880         unsigned long timeout;
2881
2882         CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2883
2884         if (get_user(timeout, arg)) {
2885                 printk(KERN_ERR
2886                        "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2887                 return -EFAULT;
2888         }
2889
2890         init_waitqueue_head(&queue);
2891
2892         tmp = inl(ao_context->ctrl_reg);
2893
2894         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2895                 if (timeout) {
2896                         ref = jiffies;
2897                         while ((inl(ao_context->status_reg) &
2898                                 ME4000_AO_STATUS_BIT_FSM)) {
2899                                 interruptible_sleep_on_timeout(&queue, 1);
2900                                 if (signal_pending(current)) {
2901                                         printk(KERN_ERR
2902                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2903                                         return -EINTR;
2904                                 }
2905                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2906                                         printk(KERN_ERR
2907                                                "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2908                                         return -EIO;
2909                                 }
2910                         }
2911                 } else {
2912                         while ((inl(ao_context->status_reg) &
2913                                 ME4000_AO_STATUS_BIT_FSM)) {
2914                                 interruptible_sleep_on_timeout(&queue, 1);
2915                                 if (signal_pending(current)) {
2916                                         printk(KERN_ERR
2917                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2918                                         return -EINTR;
2919                                 }
2920                         }
2921                 }
2922         } else {
2923                 printk(KERN_ERR
2924                        "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2925                 return -EINVAL;
2926         }
2927
2928         return 0;
2929 }
2930
2931 static int me4000_ao_enable_do(me4000_ao_context_t * ao_context)
2932 {
2933         u32 tmp;
2934         unsigned long flags;
2935
2936         CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2937
2938         /* Only available for analog output 3 */
2939         if (ao_context->index != 3) {
2940                 printk(KERN_ERR
2941                        "me4000_ao_enable_do():Only available for analog output 3\n");
2942                 return -ENOTTY;
2943         }
2944
2945         /* Check if the state machine is stopped */
2946         tmp = me4000_inl(ao_context->status_reg);
2947         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2948                 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2949                 return -EBUSY;
2950         }
2951
2952         /* Set the stop bit */
2953         spin_lock_irqsave(&ao_context->int_lock, flags);
2954         tmp = inl(ao_context->ctrl_reg);
2955         tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2956         me4000_outl(tmp, ao_context->ctrl_reg);
2957         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2958
2959         return 0;
2960 }
2961
2962 static int me4000_ao_disable_do(me4000_ao_context_t * ao_context)
2963 {
2964         u32 tmp;
2965         unsigned long flags;
2966
2967         CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2968
2969         /* Only available for analog output 3 */
2970         if (ao_context->index != 3) {
2971                 printk(KERN_ERR
2972                        "me4000_ao_disable():Only available for analog output 3\n");
2973                 return -ENOTTY;
2974         }
2975
2976         /* Check if the state machine is stopped */
2977         tmp = me4000_inl(ao_context->status_reg);
2978         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2979                 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2980                 return -EBUSY;
2981         }
2982
2983         spin_lock_irqsave(&ao_context->int_lock, flags);
2984         tmp = inl(ao_context->ctrl_reg);
2985         tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2986         me4000_outl(tmp, ao_context->ctrl_reg);
2987         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2988
2989         return 0;
2990 }
2991
2992 static int me4000_ao_fsm_state(int *arg, me4000_ao_context_t * ao_context)
2993 {
2994         unsigned long tmp;
2995
2996         CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2997
2998         tmp =
2999             (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
3000             : 0;
3001
3002         if (ao_context->pipe_flag) {
3003                 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
3004                 return -EPIPE;
3005         }
3006
3007         if (put_user(tmp, arg)) {
3008                 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
3009                 return -EFAULT;
3010         }
3011
3012         return 0;
3013 }
3014
3015 /*------------------------------- Analog input stuff --------------------------------------*/
3016
3017 static int me4000_ai_prepare(me4000_ai_context_t * ai_context)
3018 {
3019         wait_queue_head_t queue;
3020         int err;
3021
3022         CALL_PDEBUG("me4000_ai_prepare() is executed\n");
3023
3024         init_waitqueue_head(&queue);
3025
3026         /* Set the new mode and stop bits */
3027         me4000_outl(ai_context->
3028                     mode | ME4000_AI_CTRL_BIT_STOP |
3029                     ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
3030
3031         /* Set the timer registers */
3032         ai_context->chan_timer = 66;
3033         ai_context->chan_pre_timer = 66;
3034         ai_context->scan_timer_low = 0;
3035         ai_context->scan_timer_high = 0;
3036
3037         me4000_outl(65, ai_context->chan_timer_reg);
3038         me4000_outl(65, ai_context->chan_pre_timer_reg);
3039         me4000_outl(0, ai_context->scan_timer_low_reg);
3040         me4000_outl(0, ai_context->scan_timer_high_reg);
3041         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3042         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3043
3044         ai_context->channel_list_count = 0;
3045
3046         if (ai_context->mode) {
3047                 /* Request the interrupt line */
3048                 err =
3049                     request_irq(ai_context->irq, me4000_ai_isr,
3050                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3051                                 ai_context);
3052                 if (err) {
3053                         printk(KERN_ERR
3054                                "ME4000:me4000_ai_prepare():Can't get interrupt line");
3055                         return -ENODEV;
3056                 }
3057
3058                 /* Allocate circular buffer */
3059                 ai_context->circ_buf.buf =
3060                     kmalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3061                 if (!ai_context->circ_buf.buf) {
3062                         printk(KERN_ERR
3063                                "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3064                         free_irq(ai_context->irq, ai_context);
3065                         return -ENOMEM;
3066                 }
3067                 memset(ai_context->circ_buf.buf, 0, ME4000_AI_BUFFER_SIZE);
3068
3069                 /* Clear the circular buffer */
3070                 ai_context->circ_buf.head = 0;
3071                 ai_context->circ_buf.tail = 0;
3072         }
3073
3074         return 0;
3075 }
3076
3077 static int me4000_ai_reset(me4000_ai_context_t * ai_context)
3078 {
3079         wait_queue_head_t queue;
3080         u32 tmp;
3081         unsigned long flags;
3082
3083         CALL_PDEBUG("me4000_ai_reset() is executed\n");
3084
3085         init_waitqueue_head(&queue);
3086
3087         /*
3088          * First stop conversion of the state machine before reconfigure.
3089          * If not stopped before configuring mode, it could
3090          * walk in a undefined state.
3091          */
3092         spin_lock_irqsave(&ai_context->int_lock, flags);
3093         tmp = me4000_inl(ai_context->ctrl_reg);
3094         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3095         me4000_outl(tmp, ai_context->ctrl_reg);
3096         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3097
3098         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3099                 interruptible_sleep_on_timeout(&queue, 1);
3100                 if (signal_pending(current)) {
3101                         printk(KERN_ERR
3102                                "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3103                         return -EINTR;
3104                 }
3105         }
3106
3107         /* Clear the control register and set the stop bits */
3108         spin_lock_irqsave(&ai_context->int_lock, flags);
3109         tmp = me4000_inl(ai_context->ctrl_reg);
3110         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3111                     ai_context->ctrl_reg);
3112         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3113
3114         /* Reset timer registers */
3115         ai_context->chan_timer = 66;
3116         ai_context->chan_pre_timer = 66;
3117         ai_context->scan_timer_low = 0;
3118         ai_context->scan_timer_high = 0;
3119         ai_context->sample_counter = 0;
3120         ai_context->sample_counter_reload = 0;
3121
3122         me4000_outl(65, ai_context->chan_timer_reg);
3123         me4000_outl(65, ai_context->chan_pre_timer_reg);
3124         me4000_outl(0, ai_context->scan_timer_low_reg);
3125         me4000_outl(0, ai_context->scan_timer_high_reg);
3126         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3127         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3128         me4000_outl(0, ai_context->sample_counter_reg);
3129
3130         ai_context->channel_list_count = 0;
3131
3132         /* Clear the circular buffer */
3133         ai_context->circ_buf.head = 0;
3134         ai_context->circ_buf.tail = 0;
3135
3136         return 0;
3137 }
3138
3139 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3140                                 unsigned int service, unsigned long arg)
3141 {
3142         me4000_ai_context_t *ai_context;
3143
3144         CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3145
3146         ai_context = file_p->private_data;
3147
3148         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3149                 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3150                 return -ENOTTY;
3151         }
3152         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3153                 printk(KERN_ERR
3154                        "me4000_ai_ioctl_sing():Service number to high\n");
3155                 return -ENOTTY;
3156         }
3157
3158         switch (service) {
3159         case ME4000_AI_SINGLE:
3160                 return me4000_ai_single((me4000_ai_single_t *) arg, ai_context);
3161         case ME4000_AI_EX_TRIG_ENABLE:
3162                 return me4000_ai_ex_trig_enable(ai_context);
3163         case ME4000_AI_EX_TRIG_DISABLE:
3164                 return me4000_ai_ex_trig_disable(ai_context);
3165         case ME4000_AI_EX_TRIG_SETUP:
3166                 return me4000_ai_ex_trig_setup((me4000_ai_trigger_t *) arg,
3167                                                ai_context);
3168         case ME4000_GET_USER_INFO:
3169                 return me4000_get_user_info((me4000_user_info_t *) arg,
3170                                             ai_context->board_info);
3171         case ME4000_AI_OFFSET_ENABLE:
3172                 return me4000_ai_offset_enable(ai_context);
3173         case ME4000_AI_OFFSET_DISABLE:
3174                 return me4000_ai_offset_disable(ai_context);
3175         case ME4000_AI_FULLSCALE_ENABLE:
3176                 return me4000_ai_fullscale_enable(ai_context);
3177         case ME4000_AI_FULLSCALE_DISABLE:
3178                 return me4000_ai_fullscale_disable(ai_context);
3179         case ME4000_AI_EEPROM_READ:
3180                 return me4000_eeprom_read((me4000_eeprom_t *) arg, ai_context);
3181         case ME4000_AI_EEPROM_WRITE:
3182                 return me4000_eeprom_write((me4000_eeprom_t *) arg, ai_context);
3183         default:
3184                 printk(KERN_ERR
3185                        "me4000_ai_ioctl_sing():Invalid service number\n");
3186                 return -ENOTTY;
3187         }
3188         return 0;
3189 }
3190
3191 static int me4000_ai_single(me4000_ai_single_t * arg,
3192                             me4000_ai_context_t * ai_context)
3193 {
3194         me4000_ai_single_t cmd;
3195         int err;
3196         u32 tmp;
3197         wait_queue_head_t queue;
3198         unsigned long jiffy;
3199
3200         CALL_PDEBUG("me4000_ai_single() is executed\n");
3201
3202         init_waitqueue_head(&queue);
3203
3204         /* Copy data from user */
3205         err = copy_from_user(&cmd, arg, sizeof(me4000_ai_single_t));
3206         if (err) {
3207                 printk(KERN_ERR
3208                        "ME4000:me4000_ai_single():Can't copy from user space\n");
3209                 return -EFAULT;
3210         }
3211
3212         /* Check range parameter */
3213         switch (cmd.range) {
3214         case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3215         case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3216         case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3217         case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3218                 break;
3219         default:
3220                 printk(KERN_ERR
3221                        "ME4000:me4000_ai_single():Invalid range specified\n");
3222                 return -EINVAL;
3223         }
3224
3225         /* Check mode and channel number */
3226         switch (cmd.mode) {
3227         case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3228                 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3229                         printk(KERN_ERR
3230                                "ME4000:me4000_ai_single():Analog input is not available\n");
3231                         return -EINVAL;
3232                 }
3233                 break;
3234         case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3235                 if (cmd.channel >=
3236                     ai_context->board_info->board_p->ai.diff_count) {
3237                         printk(KERN_ERR
3238                                "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3239                         return -EINVAL;
3240                 }
3241                 break;
3242         default:
3243                 printk(KERN_ERR
3244                        "ME4000:me4000_ai_single():Invalid mode specified\n");
3245                 return -EINVAL;
3246         }
3247
3248         /* Clear channel list, data fifo and both stop bits */
3249         tmp = me4000_inl(ai_context->ctrl_reg);
3250         tmp &=
3251             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3252               ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3253         me4000_outl(tmp, ai_context->ctrl_reg);
3254
3255         /* Enable channel list and data fifo */
3256         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3257         me4000_outl(tmp, ai_context->ctrl_reg);
3258
3259         /* Generate channel list entry */
3260         me4000_outl(cmd.channel | cmd.range | cmd.
3261                     mode | ME4000_AI_LIST_LAST_ENTRY,
3262                     ai_context->channel_list_reg);
3263
3264         /* Set the timer to maximum */
3265         me4000_outl(66, ai_context->chan_timer_reg);
3266         me4000_outl(66, ai_context->chan_pre_timer_reg);
3267
3268         if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3269                 jiffy = jiffies;
3270                 while (!
3271                        (me4000_inl(ai_context->status_reg) &
3272                         ME4000_AI_STATUS_BIT_EF_DATA)) {
3273                         interruptible_sleep_on_timeout(&queue, 1);
3274                         if (signal_pending(current)) {
3275                                 printk(KERN_ERR
3276                                        "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3277                                 return -EINTR;
3278                         }
3279                         if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) {        // 2.6 has diffrent definitions for HZ in user and kernel space
3280                                 printk(KERN_ERR
3281                                        "ME4000:me4000_ai_single():Timeout reached\n");
3282                                 return -EIO;
3283                         }
3284                 }
3285         } else {
3286                 /* Start conversion */
3287                 me4000_inl(ai_context->start_reg);
3288
3289                 /* Wait until ready */
3290                 udelay(10);
3291                 if (!
3292                     (me4000_inl(ai_context->status_reg) &
3293                      ME4000_AI_STATUS_BIT_EF_DATA)) {
3294                         printk(KERN_ERR
3295                                "ME4000:me4000_ai_single():Value not available after wait\n");
3296                         return -EIO;
3297                 }
3298         }
3299
3300         /* Read value from data fifo */
3301         cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3302
3303         /* Copy result back to user */
3304         err = copy_to_user(arg, &cmd, sizeof(me4000_ai_single_t));
3305         if (err) {
3306                 printk(KERN_ERR
3307                        "ME4000:me4000_ai_single():Can't copy to user space\n");
3308                 return -EFAULT;
3309         }
3310
3311         return 0;
3312 }
3313
3314 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3315                               unsigned int service, unsigned long arg)
3316 {
3317         me4000_ai_context_t *ai_context;
3318
3319         CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3320
3321         ai_context = file_p->private_data;
3322
3323         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3324                 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3325                 return -ENOTTY;
3326         }
3327         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3328                 printk(KERN_ERR
3329                        "me4000_ai_ioctl_sw():Service number to high\n");
3330                 return -ENOTTY;
3331         }
3332
3333         switch (service) {
3334         case ME4000_AI_SC_SETUP:
3335                 return me4000_ai_sc_setup((me4000_ai_sc_t *) arg, ai_context);
3336         case ME4000_AI_CONFIG:
3337                 return me4000_ai_config((me4000_ai_config_t *) arg, ai_context);
3338         case ME4000_AI_START:
3339                 return me4000_ai_start(ai_context);
3340         case ME4000_AI_STOP:
3341                 return me4000_ai_stop(ai_context);
3342         case ME4000_AI_IMMEDIATE_STOP:
3343                 return me4000_ai_immediate_stop(ai_context);
3344         case ME4000_AI_FSM_STATE:
3345                 return me4000_ai_fsm_state((int *)arg, ai_context);
3346         case ME4000_GET_USER_INFO:
3347                 return me4000_get_user_info((me4000_user_info_t *) arg,
3348                                             ai_context->board_info);
3349         case ME4000_AI_EEPROM_READ:
3350                 return me4000_eeprom_read((me4000_eeprom_t *) arg, ai_context);
3351         case ME4000_AI_EEPROM_WRITE:
3352                 return me4000_eeprom_write((me4000_eeprom_t *) arg, ai_context);
3353         case ME4000_AI_GET_COUNT_BUFFER:
3354                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3355                                                   ai_context);
3356         default:
3357                 printk(KERN_ERR
3358                        "ME4000:me4000_ai_ioctl_sw():Invalid service number %d\n",
3359                        service);
3360                 return -ENOTTY;
3361         }
3362         return 0;
3363 }
3364
3365 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3366                                unsigned int service, unsigned long arg)
3367 {
3368         me4000_ai_context_t *ai_context;
3369
3370         CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3371
3372         ai_context = file_p->private_data;
3373
3374         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3375                 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3376                 return -ENOTTY;
3377         }
3378         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3379                 printk(KERN_ERR
3380                        "me4000_ai_ioctl_ext():Service number to high\n");
3381                 return -ENOTTY;
3382         }
3383
3384         switch (service) {
3385         case ME4000_AI_SC_SETUP:
3386                 return me4000_ai_sc_setup((me4000_ai_sc_t *) arg, ai_context);
3387         case ME4000_AI_CONFIG:
3388                 return me4000_ai_config((me4000_ai_config_t *) arg, ai_context);
3389         case ME4000_AI_START:
3390                 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3391         case ME4000_AI_STOP:
3392                 return me4000_ai_stop(ai_context);
3393         case ME4000_AI_IMMEDIATE_STOP:
3394                 return me4000_ai_immediate_stop(ai_context);
3395         case ME4000_AI_EX_TRIG_ENABLE:
3396                 return me4000_ai_ex_trig_enable(ai_context);
3397         case ME4000_AI_EX_TRIG_DISABLE:
3398                 return me4000_ai_ex_trig_disable(ai_context);
3399         case ME4000_AI_EX_TRIG_SETUP:
3400                 return me4000_ai_ex_trig_setup((me4000_ai_trigger_t *) arg,
3401                                                ai_context);
3402         case ME4000_AI_FSM_STATE:
3403                 return me4000_ai_fsm_state((int *)arg, ai_context);
3404         case ME4000_GET_USER_INFO:
3405                 return me4000_get_user_info((me4000_user_info_t *) arg,
3406                                             ai_context->board_info);
3407         case ME4000_AI_GET_COUNT_BUFFER:
3408                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3409                                                   ai_context);
3410         default:
3411                 printk(KERN_ERR
3412                        "ME4000:me4000_ai_ioctl_ext():Invalid service number %d\n",
3413                        service);
3414                 return -ENOTTY;
3415         }
3416         return 0;
3417 }
3418
3419 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3420 {
3421         me4000_ai_context_t *ai_context;
3422
3423         CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3424
3425         ai_context = file_p->private_data;
3426         return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3427 }
3428
3429 static int me4000_ai_config(me4000_ai_config_t * arg,
3430                             me4000_ai_context_t * ai_context)
3431 {
3432         me4000_ai_config_t cmd;
3433         u32 *list = NULL;
3434         u32 mode;
3435         int i;
3436         int err;
3437         wait_queue_head_t queue;
3438         u64 scan;
3439         u32 tmp;
3440
3441         CALL_PDEBUG("me4000_ai_config() is executed\n");
3442
3443         init_waitqueue_head(&queue);
3444
3445         /* Check if conversion is stopped */
3446         if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3447                 printk(KERN_ERR
3448                        "ME4000:me4000_ai_config():Conversion is not stopped\n");
3449                 err = -EBUSY;
3450                 goto AI_CONFIG_ERR;
3451         }
3452
3453         /* Copy data from user */
3454         err = copy_from_user(&cmd, arg, sizeof(me4000_ai_config_t));
3455         if (err) {
3456                 printk(KERN_ERR
3457                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3458                 err = -EFAULT;
3459                 goto AI_CONFIG_ERR;
3460         }
3461
3462         PDEBUG
3463             ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3464              cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3465              cmd.timer.scan_high, cmd.channel_list.count);
3466
3467         /* Check whether sample and hold is available for this board */
3468         if (cmd.sh) {
3469                 if (!ai_context->board_info->board_p->ai.sh_count) {
3470                         printk(KERN_ERR
3471                                "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3472                         err = -ENODEV;
3473                         goto AI_CONFIG_ERR;
3474                 }
3475         }
3476
3477         /* Check the channel list size */
3478         if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3479                 printk(KERN_ERR
3480                        "me4000_ai_config():Channel list is to large\n");
3481                 err = -EINVAL;
3482                 goto AI_CONFIG_ERR;
3483         }
3484
3485         /* Copy channel list from user */
3486         list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3487         if (!list) {
3488                 printk(KERN_ERR
3489                        "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3490                 err = -ENOMEM;
3491                 goto AI_CONFIG_ERR;
3492         }
3493         err =
3494             copy_from_user(list, cmd.channel_list.list,
3495                            sizeof(u32) * cmd.channel_list.count);
3496         if (err) {
3497                 printk(KERN_ERR
3498                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3499                 err = -EFAULT;
3500                 goto AI_CONFIG_ERR;
3501         }
3502
3503         /* Check if last entry bit is set */
3504         if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3505                 printk(KERN_WARNING
3506                        "me4000_ai_config():Last entry bit is not set\n");
3507                 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3508         }
3509
3510         /* Check whether mode is equal for all entries */
3511         mode = list[0] & 0x20;
3512         for (i = 0; i < cmd.channel_list.count; i++) {
3513                 if ((list[i] & 0x20) != mode) {
3514                         printk(KERN_ERR
3515                                "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3516                         err = -EINVAL;
3517                         goto AI_CONFIG_ERR;
3518                 }
3519         }
3520
3521         /* Check whether channels are available for this mode */
3522         if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3523                 for (i = 0; i < cmd.channel_list.count; i++) {
3524                         if ((list[i] & 0x1F) >=
3525                             ai_context->board_info->board_p->ai.count) {
3526                                 printk(KERN_ERR
3527                                        "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3528                                 err = -EINVAL;
3529                                 goto AI_CONFIG_ERR;
3530                         }
3531                 }
3532         } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3533                 for (i = 0; i < cmd.channel_list.count; i++) {
3534                         if ((list[i] & 0x1F) >=
3535                             ai_context->board_info->board_p->ai.diff_count) {
3536                                 printk(KERN_ERR
3537                                        "ME4000:me4000_ai_config():Channel is not available for differential\n");
3538                                 err = -EINVAL;
3539                                 goto AI_CONFIG_ERR;
3540                         }
3541                 }
3542         }
3543
3544         /* Check if bipolar is set for all entries when in differential mode */
3545         if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3546                 for (i = 0; i < cmd.channel_list.count; i++) {
3547                         if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3548                             && (list[i] & 0xC0) !=
3549                             ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3550                                 printk(KERN_ERR
3551                                        "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3552                                 err = -EINVAL;
3553                                 goto AI_CONFIG_ERR;
3554                         }
3555                 }
3556         }
3557
3558         if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3559                 /* Check for minimum channel divisor */
3560                 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3561                         printk(KERN_ERR
3562                                "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3563                         err = -EINVAL;
3564                         goto AI_CONFIG_ERR;
3565                 }
3566
3567                 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3568                 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3569                         printk(KERN_ERR
3570                                "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3571                         err = -EINVAL;
3572                         goto AI_CONFIG_ERR;
3573                 }
3574
3575                 /* Check for minimum channel pre divisor */
3576                 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3577                         printk(KERN_ERR
3578                                "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3579                         err = -EINVAL;
3580                         goto AI_CONFIG_ERR;
3581                 }
3582
3583                 /* Write the channel timers */
3584                 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3585                 me4000_outl(cmd.timer.pre_chan - 1,
3586                             ai_context->chan_pre_timer_reg);
3587
3588                 /* Save the timer values in the board context */
3589                 ai_context->chan_timer = cmd.timer.chan;
3590                 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3591
3592                 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3593                         /* Check for scan timer divisor */
3594                         scan =
3595                             (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3596                                                         scan_high << 32);
3597                         if (scan != 0) {
3598                                 if (scan <
3599                                     cmd.channel_list.count * cmd.timer.chan +
3600                                     1) {
3601                                         printk(KERN_ERR
3602                                                "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3603                                         err = -EINVAL;
3604                                         goto AI_CONFIG_ERR;
3605                                 }
3606                         }
3607
3608                         /* Write the scan timers */
3609                         if (scan != 0) {
3610                                 scan--;
3611                                 tmp = (u32) (scan & 0xFFFFFFFF);
3612                                 me4000_outl(tmp,
3613                                             ai_context->scan_timer_low_reg);
3614                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3615                                 me4000_outl(tmp,
3616                                             ai_context->scan_timer_high_reg);
3617
3618                                 scan =
3619                                     scan - (cmd.timer.chan - 1) +
3620                                     (cmd.timer.pre_chan - 1);
3621                                 tmp = (u32) (scan & 0xFFFFFFFF);
3622                                 me4000_outl(tmp,
3623                                             ai_context->scan_pre_timer_low_reg);
3624                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3625                                 me4000_outl(tmp,
3626                                             ai_context->
3627                                             scan_pre_timer_high_reg);
3628                         } else {
3629                                 me4000_outl(0x0,
3630                                             ai_context->scan_timer_low_reg);
3631                                 me4000_outl(0x0,
3632                                             ai_context->scan_timer_high_reg);
3633
3634                                 me4000_outl(0x0,
3635                                             ai_context->scan_pre_timer_low_reg);
3636                                 me4000_outl(0x0,
3637                                             ai_context->
3638                                             scan_pre_timer_high_reg);
3639                         }
3640
3641                         ai_context->scan_timer_low = cmd.timer.scan_low;
3642                         ai_context->scan_timer_high = cmd.timer.scan_high;
3643                 }
3644         }
3645
3646         /* Clear the channel list */
3647         tmp = me4000_inl(ai_context->ctrl_reg);
3648         tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3649         me4000_outl(tmp, ai_context->ctrl_reg);
3650         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3651         me4000_outl(tmp, ai_context->ctrl_reg);
3652
3653         /* Write the channel list */
3654         for (i = 0; i < cmd.channel_list.count; i++) {
3655                 me4000_outl(list[i], ai_context->channel_list_reg);
3656         }
3657
3658         /* Setup sample and hold */
3659         if (cmd.sh) {
3660                 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3661                 me4000_outl(tmp, ai_context->ctrl_reg);
3662         } else {
3663                 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3664                 me4000_outl(tmp, ai_context->ctrl_reg);
3665         }
3666
3667         /* Save the channel list size in the board context */
3668         ai_context->channel_list_count = cmd.channel_list.count;
3669
3670         kfree(list);
3671
3672         return 0;
3673
3674       AI_CONFIG_ERR:
3675
3676         /* Reset the timers */
3677         ai_context->chan_timer = 66;
3678         ai_context->chan_pre_timer = 66;
3679         ai_context->scan_timer_low = 0;
3680         ai_context->scan_timer_high = 0;
3681
3682         me4000_outl(65, ai_context->chan_timer_reg);
3683         me4000_outl(65, ai_context->chan_pre_timer_reg);
3684         me4000_outl(0, ai_context->scan_timer_high_reg);
3685         me4000_outl(0, ai_context->scan_timer_low_reg);
3686         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3687         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3688
3689         ai_context->channel_list_count = 0;
3690
3691         tmp = me4000_inl(ai_context->ctrl_reg);
3692         tmp &=
3693             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3694
3695         if (list)
3696                 kfree(list);
3697
3698         return err;
3699
3700 }
3701
3702 static int ai_common_start(me4000_ai_context_t * ai_context)
3703 {
3704         u32 tmp;
3705         CALL_PDEBUG("ai_common_start() is executed\n");
3706
3707         tmp = me4000_inl(ai_context->ctrl_reg);
3708
3709         /* Check if conversion is stopped */
3710         if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3711                 printk(KERN_ERR
3712                        "ME4000:ai_common_start():Conversion is not stopped\n");
3713                 return -EBUSY;
3714         }
3715
3716         /* Clear data fifo, disable all interrupts, clear sample counter reload */
3717         tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3718                  ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3719                  ME4000_AI_CTRL_BIT_SC_RELOAD);
3720
3721         me4000_outl(tmp, ai_context->ctrl_reg);
3722
3723         /* Clear circular buffer */
3724         ai_context->circ_buf.head = 0;
3725         ai_context->circ_buf.tail = 0;
3726
3727         /* Enable data fifo */
3728         tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3729
3730         /* Determine interrupt setup */
3731         if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3732                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3733                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3734         } else if (ai_context->sample_counter
3735                    && ai_context->sample_counter_reload) {
3736                 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3737                         /* Enable only Sample Counter Interrupt */
3738                         tmp |=
3739                             ME4000_AI_CTRL_BIT_SC_IRQ |
3740                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3741                 } else {
3742                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
3743                         tmp |=
3744                             ME4000_AI_CTRL_BIT_SC_IRQ |
3745                             ME4000_AI_CTRL_BIT_HF_IRQ |
3746                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3747                 }
3748         } else {
3749                 /* Enable only Half Full Interrupt */
3750                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3751         }
3752
3753         /* Clear the stop bits */
3754         tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3755
3756         /* Write setup to hardware */
3757         me4000_outl(tmp, ai_context->ctrl_reg);
3758
3759         /* Write sample counter */
3760         me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3761
3762         return 0;
3763 }
3764
3765 static int me4000_ai_start(me4000_ai_context_t * ai_context)
3766 {
3767         int err;
3768         CALL_PDEBUG("me4000_ai_start() is executed\n");
3769
3770         /* Prepare Hardware */
3771         err = ai_common_start(ai_context);
3772         if (err)
3773                 return err;
3774
3775         /* Start conversion by dummy read */
3776         me4000_inl(ai_context->start_reg);
3777
3778         return 0;
3779 }
3780
3781 static int me4000_ai_start_ex(unsigned long *arg,
3782                               me4000_ai_context_t * ai_context)
3783 {
3784         int err;
3785         wait_queue_head_t queue;
3786         unsigned long ref;
3787         unsigned long timeout;
3788
3789         CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3790
3791         if (get_user(timeout, arg)) {
3792                 printk(KERN_ERR
3793                        "me4000_ai_start_ex():Cannot copy data from user\n");
3794                 return -EFAULT;
3795         }
3796
3797         init_waitqueue_head(&queue);
3798
3799         /* Prepare Hardware */
3800         err = ai_common_start(ai_context);
3801         if (err)
3802                 return err;
3803
3804         if (timeout) {
3805                 ref = jiffies;
3806                 while (!
3807                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3808                 {
3809                         interruptible_sleep_on_timeout(&queue, 1);
3810                         if (signal_pending(current)) {
3811                                 printk(KERN_ERR
3812                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3813                                 return -EINTR;
3814                         }
3815                         if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
3816                                 printk(KERN_ERR
3817                                        "ME4000:me4000_ai_start_ex():Timeout reached\n");
3818                                 return -EIO;
3819                         }
3820                 }
3821         } else {
3822                 while (!
3823                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3824                 {
3825                         interruptible_sleep_on_timeout(&queue, 1);
3826                         if (signal_pending(current)) {
3827                                 printk(KERN_ERR
3828                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3829                                 return -EINTR;
3830                         }
3831                 }
3832         }
3833
3834         return 0;
3835 }
3836
3837 static int me4000_ai_stop(me4000_ai_context_t * ai_context)
3838 {
3839         wait_queue_head_t queue;
3840         u32 tmp;
3841         unsigned long flags;
3842
3843         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3844
3845         init_waitqueue_head(&queue);
3846
3847         /* Disable irqs and clear data fifo */
3848         spin_lock_irqsave(&ai_context->int_lock, flags);
3849         tmp = me4000_inl(ai_context->ctrl_reg);
3850         tmp &=
3851             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3852               ME4000_AI_CTRL_BIT_DATA_FIFO);
3853         /* Stop conversion of the state machine */
3854         tmp |= ME4000_AI_CTRL_BIT_STOP;
3855         me4000_outl(tmp, ai_context->ctrl_reg);
3856         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3857
3858         /* Clear circular buffer */
3859         ai_context->circ_buf.head = 0;
3860         ai_context->circ_buf.tail = 0;
3861
3862         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3863                 interruptible_sleep_on_timeout(&queue, 1);
3864                 if (signal_pending(current)) {
3865                         printk(KERN_ERR
3866                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3867                         return -EINTR;
3868                 }
3869         }
3870
3871         return 0;
3872 }
3873
3874 static int me4000_ai_immediate_stop(me4000_ai_context_t * ai_context)
3875 {
3876         wait_queue_head_t queue;
3877         u32 tmp;
3878         unsigned long flags;
3879
3880         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3881
3882         init_waitqueue_head(&queue);
3883
3884         /* Disable irqs and clear data fifo */
3885         spin_lock_irqsave(&ai_context->int_lock, flags);
3886         tmp = me4000_inl(ai_context->ctrl_reg);
3887         tmp &=
3888             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3889               ME4000_AI_CTRL_BIT_DATA_FIFO);
3890         /* Stop conversion of the state machine */
3891         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3892         me4000_outl(tmp, ai_context->ctrl_reg);
3893         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3894
3895         /* Clear circular buffer */
3896         ai_context->circ_buf.head = 0;
3897         ai_context->circ_buf.tail = 0;
3898
3899         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3900                 interruptible_sleep_on_timeout(&queue, 1);
3901                 if (signal_pending(current)) {
3902                         printk(KERN_ERR
3903                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3904                         return -EINTR;
3905                 }
3906         }
3907
3908         return 0;
3909 }
3910
3911 static int me4000_ai_ex_trig_enable(me4000_ai_context_t * ai_context)
3912 {
3913         u32 tmp;
3914         unsigned long flags;
3915
3916         CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3917
3918         spin_lock_irqsave(&ai_context->int_lock, flags);
3919         tmp = me4000_inl(ai_context->ctrl_reg);
3920         tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3921         me4000_outl(tmp, ai_context->ctrl_reg);
3922         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3923
3924         return 0;
3925 }
3926
3927 static int me4000_ai_ex_trig_disable(me4000_ai_context_t * ai_context)
3928 {
3929         u32 tmp;
3930         unsigned long flags;
3931
3932         CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3933
3934         spin_lock_irqsave(&ai_context->int_lock, flags);
3935         tmp = me4000_inl(ai_context->ctrl_reg);
3936         tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3937         me4000_outl(tmp, ai_context->ctrl_reg);
3938         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3939
3940         return 0;
3941 }
3942
3943 static int me4000_ai_ex_trig_setup(me4000_ai_trigger_t * arg,
3944                                    me4000_ai_context_t * ai_context)
3945 {
3946         me4000_ai_trigger_t cmd;
3947         int err;
3948         u32 tmp;
3949         unsigned long flags;
3950
3951         CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3952
3953         /* Copy data from user */
3954         err = copy_from_user(&cmd, arg, sizeof(me4000_ai_trigger_t));
3955         if (err) {
3956                 printk(KERN_ERR
3957                        "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3958                 return -EFAULT;
3959         }
3960
3961         spin_lock_irqsave(&ai_context->int_lock, flags);
3962         tmp = me4000_inl(ai_context->ctrl_reg);
3963
3964         if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3965                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3966         } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3967                 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3968                         printk(KERN_ERR
3969                                "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3970                         return -EINVAL;
3971                 }
3972                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3973         } else {
3974                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3975                 printk(KERN_ERR
3976                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3977                 return -EINVAL;
3978         }
3979
3980         if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3981                 tmp &=
3982                     ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3983                       ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3984         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3985                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3986                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3987         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3988                 tmp |=
3989                     ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3990                     ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3991         } else {
3992                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3993                 printk(KERN_ERR
3994                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3995                 return -EINVAL;
3996         }
3997
3998         me4000_outl(tmp, ai_context->ctrl_reg);
3999         spin_unlock_irqrestore(&ai_context->int_lock, flags);
4000         return 0;
4001 }
4002
4003 static int me4000_ai_sc_setup(me4000_ai_sc_t * arg,
4004                               me4000_ai_context_t * ai_context)
4005 {
4006         me4000_ai_sc_t cmd;
4007         int err;
4008
4009         CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
4010
4011         /* Copy data from user */
4012         err = copy_from_user(&cmd, arg, sizeof(me4000_ai_sc_t));
4013         if (err) {
4014                 printk(KERN_ERR
4015                        "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
4016                 return -EFAULT;
4017         }
4018
4019         ai_context->sample_counter = cmd.value;
4020         ai_context->sample_counter_reload = cmd.reload;
4021
4022         return 0;
4023 }
4024
4025 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
4026                               loff_t * offp)
4027 {
4028         me4000_ai_context_t *ai_context = filep->private_data;
4029         s16 *buffer = (s16 *) buff;
4030         size_t count = cnt / 2;
4031         unsigned long flags;
4032         int tmp;
4033         int c = 0;
4034         int k = 0;
4035         int ret = 0;
4036         wait_queue_t wait;
4037
4038         CALL_PDEBUG("me4000_ai_read() is executed\n");
4039
4040         init_waitqueue_entry(&wait, current);
4041
4042         /* Check count */
4043         if (count <= 0) {
4044                 PDEBUG("me4000_ai_read():Count is 0\n");
4045                 return 0;
4046         }
4047
4048         while (count > 0) {
4049                 if (filep->f_flags & O_NONBLOCK) {
4050                         c = me4000_values_to_end(ai_context->circ_buf,
4051                                                  ME4000_AI_BUFFER_COUNT);
4052                         if (!c) {
4053                                 PDEBUG
4054                                     ("me4000_ai_read():Returning from nonblocking read\n");
4055                                 break;
4056                         }
4057                 } else {
4058                         /* Check if conversion is still running */
4059                         if (!
4060                             (me4000_inl(ai_context->status_reg) &
4061                              ME4000_AI_STATUS_BIT_FSM)) {
4062                                 printk(KERN_ERR
4063                                        "ME4000:me4000_ai_read():Conversion interrupted\n");
4064                                 return -EPIPE;
4065                         }
4066
4067                         wait_event_interruptible(ai_context->wait_queue,
4068                                                  (me4000_values_to_end
4069                                                   (ai_context->circ_buf,
4070                                                    ME4000_AI_BUFFER_COUNT)));
4071                         if (signal_pending(current)) {
4072                                 printk(KERN_ERR
4073                                        "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4074                                 return -EINTR;
4075                         }
4076                 }
4077
4078                 /* Only read count values or as much as available */
4079                 c = me4000_values_to_end(ai_context->circ_buf,
4080                                          ME4000_AI_BUFFER_COUNT);
4081                 PDEBUG("me4000_ai_read():%d values to end\n", c);
4082                 if (count < c)
4083                         c = count;
4084
4085                 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4086                 k = 2 * c;
4087                 k -= copy_to_user(buffer,
4088                                   ai_context->circ_buf.buf +
4089                                   ai_context->circ_buf.tail, k);
4090                 c = k / 2;
4091                 if (!c) {
4092                         printk(KERN_ERR
4093                                "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4094                         return -EFAULT;
4095                 }
4096
4097                 ai_context->circ_buf.tail =
4098                     (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4099                                                        1);
4100                 buffer += c;
4101                 count -= c;
4102                 ret += c;
4103
4104                 spin_lock_irqsave(&ai_context->int_lock, flags);
4105                 if (me4000_buf_space
4106                     (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4107                         tmp = me4000_inl(ai_context->ctrl_reg);
4108
4109                         /* Determine interrupt setup */
4110                         if (ai_context->sample_counter
4111                             && !ai_context->sample_counter_reload) {
4112                                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4113                                 tmp |=
4114                                     ME4000_AI_CTRL_BIT_SC_IRQ |
4115                                     ME4000_AI_CTRL_BIT_HF_IRQ;
4116                         } else if (ai_context->sample_counter
4117                                    && ai_context->sample_counter_reload) {
4118                                 if (ai_context->sample_counter <
4119                                     ME4000_AI_FIFO_COUNT / 2) {
4120                                         /* Enable only Sample Counter Interrupt */
4121                                         tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4122                                 } else {
4123                                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
4124                                         tmp |=
4125                                             ME4000_AI_CTRL_BIT_SC_IRQ |
4126                                             ME4000_AI_CTRL_BIT_HF_IRQ;
4127                                 }
4128                         } else {
4129                                 /* Enable only Half Full Interrupt */
4130                                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4131                         }
4132
4133                         me4000_outl(tmp, ai_context->ctrl_reg);
4134                 }
4135                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4136         }
4137
4138         /* Check if conversion is still running */
4139         if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4140                 printk(KERN_ERR
4141                        "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4142                 return -EPIPE;
4143         }
4144
4145         if (filep->f_flags & O_NONBLOCK) {
4146                 return (k == 0) ? -EAGAIN : 2 * ret;
4147         }
4148
4149         CALL_PDEBUG("me4000_ai_read() is leaved\n");
4150         return ret * 2;
4151 }
4152
4153 static unsigned int me4000_ai_poll(struct file *file_p, poll_table * wait)
4154 {
4155         me4000_ai_context_t *ai_context;
4156         unsigned long mask = 0;
4157
4158         CALL_PDEBUG("me4000_ai_poll() is executed\n");
4159
4160         ai_context = file_p->private_data;
4161
4162         /* Register wait queue */
4163         poll_wait(file_p, &ai_context->wait_queue, wait);
4164
4165         /* Get available values */
4166         if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4167                 mask |= POLLIN | POLLRDNORM;
4168
4169         PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4170
4171         return mask;
4172 }
4173
4174 static int me4000_ai_offset_enable(me4000_ai_context_t * ai_context)
4175 {
4176         unsigned long tmp;
4177
4178         CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4179
4180         tmp = me4000_inl(ai_context->ctrl_reg);
4181         tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4182         me4000_outl(tmp, ai_context->ctrl_reg);
4183
4184         return 0;
4185 }
4186
4187 static int me4000_ai_offset_disable(me4000_ai_context_t * ai_context)
4188 {
4189         unsigned long tmp;
4190
4191         CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4192
4193         tmp = me4000_inl(ai_context->ctrl_reg);
4194         tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4195         me4000_outl(tmp, ai_context->ctrl_reg);
4196
4197         return 0;
4198 }
4199
4200 static int me4000_ai_fullscale_enable(me4000_ai_context_t * ai_context)
4201 {
4202         unsigned long tmp;
4203
4204         CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4205
4206         tmp = me4000_inl(ai_context->ctrl_reg);
4207         tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4208         me4000_outl(tmp, ai_context->ctrl_reg);
4209
4210         return 0;
4211 }
4212
4213 static int me4000_ai_fullscale_disable(me4000_ai_context_t * ai_context)
4214 {
4215         unsigned long tmp;
4216
4217         CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4218
4219         tmp = me4000_inl(ai_context->ctrl_reg);
4220         tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4221         me4000_outl(tmp, ai_context->ctrl_reg);
4222
4223         return 0;
4224 }
4225
4226 static int me4000_ai_fsm_state(int *arg, me4000_ai_context_t * ai_context)
4227 {
4228         unsigned long tmp;
4229
4230         CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4231
4232         tmp =
4233             (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4234             : 0;
4235
4236         if (put_user(tmp, arg)) {
4237                 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4238                 return -EFAULT;
4239         }
4240
4241         return 0;
4242 }
4243
4244 static int me4000_ai_get_count_buffer(unsigned long *arg,
4245                                       me4000_ai_context_t * ai_context)
4246 {
4247         unsigned long c;
4248         int err;
4249
4250         c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4251
4252         err = copy_to_user(arg, &c, sizeof(unsigned long));
4253         if (err) {
4254                 printk(KERN_ERR
4255                        "ME4000:me4000_ai_get_count_buffer():Can't copy to user space\n");
4256                 return -EFAULT;
4257         }
4258
4259         return 0;
4260 }
4261
4262 /*---------------------------------- EEPROM stuff ---------------------------*/
4263
4264 static int eeprom_write_cmd(me4000_ai_context_t * ai_context, unsigned long cmd,
4265                             int length)
4266 {
4267         int i;
4268         unsigned long value;
4269
4270         CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4271
4272         PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4273                cmd, length);
4274
4275         /* Get the ICR register and clear the related bits */
4276         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4277         value &= ~(PLX_ICR_MASK_EEPROM);
4278         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4279
4280         /* Raise the chip select */
4281         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4282         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4283         udelay(EEPROM_DELAY);
4284
4285         for (i = 0; i < length; i++) {
4286                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4287                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4288                 } else {
4289                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4290                 }
4291
4292                 /* Write to EEPROM */
4293                 me4000_outl(value,
4294                             ai_context->board_info->plx_regbase + PLX_ICR);
4295                 udelay(EEPROM_DELAY);
4296
4297                 /* Raising edge of the clock */
4298                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4299                 me4000_outl(value,
4300                             ai_context->board_info->plx_regbase + PLX_ICR);
4301                 udelay(EEPROM_DELAY);
4302
4303                 /* Falling edge of the clock */
4304                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4305                 me4000_outl(value,
4306                             ai_context->board_info->plx_regbase + PLX_ICR);
4307                 udelay(EEPROM_DELAY);
4308         }
4309
4310         /* Clear the chip select */
4311         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4312         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4313         udelay(EEPROM_DELAY);
4314
4315         /* Wait until hardware is ready for sure */
4316         mdelay(10);
4317
4318         return 0;
4319 }
4320
4321 static unsigned short eeprom_read_cmd(me4000_ai_context_t * ai_context,
4322                                       unsigned long cmd, int length)
4323 {
4324         int i;
4325         unsigned long value;
4326         unsigned short id = 0;
4327
4328         CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4329
4330         PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4331                length);
4332
4333         /* Get the ICR register and clear the related bits */
4334         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4335         value &= ~(PLX_ICR_MASK_EEPROM);
4336
4337         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4338
4339         /* Raise the chip select */
4340         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4341         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4342         udelay(EEPROM_DELAY);
4343
4344         /* Write the read command to the eeprom */
4345         for (i = 0; i < length; i++) {
4346                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4347                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4348                 } else {
4349                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4350                 }
4351                 me4000_outl(value,
4352                             ai_context->board_info->plx_regbase + PLX_ICR);
4353                 udelay(EEPROM_DELAY);
4354
4355                 /* Raising edge of the clock */
4356                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4357                 me4000_outl(value,
4358                             ai_context->board_info->plx_regbase + PLX_ICR);
4359                 udelay(EEPROM_DELAY);
4360
4361                 /* Falling edge of the clock */
4362                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4363                 me4000_outl(value,
4364                             ai_context->board_info->plx_regbase + PLX_ICR);
4365                 udelay(EEPROM_DELAY);
4366         }
4367
4368         /* Read the value from the eeprom */
4369         for (i = 0; i < 16; i++) {
4370                 /* Raising edge of the clock */
4371                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4372                 me4000_outl(value,
4373                             ai_context->board_info->plx_regbase + PLX_ICR);
4374                 udelay(EEPROM_DELAY);
4375
4376                 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4377                     PLX_ICR_BIT_EEPROM_READ) {
4378                         id |= (0x8000 >> i);
4379                         PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4380                                (0x8000 >> i));
4381                 } else {
4382                         PDEBUG("eeprom_read_cmd():Dont't OR\n");
4383                 }
4384
4385                 /* Falling edge of the clock */
4386                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4387                 me4000_outl(value,
4388                             ai_context->board_info->plx_regbase + PLX_ICR);
4389                 udelay(EEPROM_DELAY);
4390         }
4391
4392         /* Clear the chip select */
4393         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4394         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4395         udelay(EEPROM_DELAY);
4396
4397         return id;
4398 }
4399
4400 static int me4000_eeprom_write(me4000_eeprom_t * arg,
4401                                me4000_ai_context_t * ai_context)
4402 {
4403         int err;
4404         me4000_eeprom_t setup;
4405         unsigned long cmd;
4406         unsigned long date_high;
4407         unsigned long date_low;
4408
4409         CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4410
4411         err = copy_from_user(&setup, arg, sizeof(setup));
4412         if (err) {
4413                 printk(KERN_ERR
4414                        "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4415                 return err;
4416         }
4417
4418         /* Enable writing */
4419         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4420                          ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4421
4422         /* Command for date */
4423         date_high = (setup.date & 0xFFFF0000) >> 16;
4424         date_low = (setup.date & 0x0000FFFF);
4425
4426         cmd =
4427             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4428                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4429                                                                      (unsigned
4430                                                                       long)
4431                                                                      date_high);
4432         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4433         if (err)
4434                 return err;
4435
4436         cmd =
4437             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4438                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4439                                                                      (unsigned
4440                                                                       long)
4441                                                                      date_low);
4442         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4443         if (err)
4444                 return err;
4445
4446         /* Command for unipolar 10V offset */
4447         cmd =
4448             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4449                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4450                                                                      (unsigned
4451                                                                       long)
4452                                                                      setup.
4453                                                                      uni_10_offset);
4454         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4455         if (err)
4456                 return err;
4457
4458         /* Command for unipolar 10V fullscale */
4459         cmd =
4460             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4461                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4462                                                                      (unsigned
4463                                                                       long)
4464                                                                      setup.
4465                                                                      uni_10_fullscale);
4466         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4467         if (err)
4468                 return err;
4469
4470         /* Command for unipolar 2,5V offset */
4471         cmd =
4472             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4473                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4474                                                                      (unsigned
4475                                                                       long)
4476                                                                      setup.
4477                                                                      uni_2_5_offset);
4478         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4479         if (err)
4480                 return err;
4481
4482         /* Command for unipolar 2,5V fullscale */
4483         cmd =
4484             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4485                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4486                                                                      (unsigned
4487                                                                       long)
4488                                                                      setup.
4489                                                                      uni_2_5_fullscale);
4490         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4491         if (err)
4492                 return err;
4493
4494         /* Command for bipolar 10V offset */
4495         cmd =
4496             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4497                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4498                                                                      (unsigned
4499                                                                       long)
4500                                                                      setup.
4501                                                                      bi_10_offset);
4502         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4503         if (err)
4504                 return err;
4505
4506         /* Command for bipolar 10V fullscale */
4507         cmd =
4508             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4509                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4510                                                                      (unsigned
4511                                                                       long)
4512                                                                      setup.
4513                                                                      bi_10_fullscale);
4514         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4515         if (err)
4516                 return err;
4517
4518         /* Command for bipolar 2,5V offset */
4519         cmd =
4520             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4521                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4522                                                                      (unsigned
4523                                                                       long)
4524                                                                      setup.
4525                                                                      bi_2_5_offset);
4526         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4527         if (err)
4528                 return err;
4529
4530         /* Command for bipolar 2,5V fullscale */
4531         cmd =
4532             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4533                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4534                                                                      (unsigned
4535                                                                       long)
4536                                                                      setup.
4537                                                                      bi_2_5_fullscale);
4538         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4539         if (err)
4540                 return err;
4541
4542         /* Command for differential 10V offset */
4543         cmd =
4544             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4545                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4546                                                                      (unsigned
4547                                                                       long)
4548                                                                      setup.
4549                                                                      diff_10_offset);
4550         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4551         if (err)
4552                 return err;
4553
4554         /* Command for differential 10V fullscale */
4555         cmd =
4556             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4557                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4558                                                                         (unsigned
4559                                                                          long)
4560                                                                         setup.
4561                                                                         diff_10_fullscale);
4562         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4563         if (err)
4564                 return err;
4565
4566         /* Command for differential 2,5V offset */
4567         cmd =
4568             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4569                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4570                                                                      (unsigned
4571                                                                       long)
4572                                                                      setup.
4573                                                                      diff_2_5_offset);
4574         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4575         if (err)
4576                 return err;
4577
4578         /* Command for differential 2,5V fullscale */
4579         cmd =
4580             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4581                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4582                                                                         (unsigned
4583                                                                          long)
4584                                                                         setup.
4585                                                                         diff_2_5_fullscale);
4586         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4587         if (err)
4588                 return err;
4589
4590         /* Disable writing */
4591         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4592                          ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4593
4594         return 0;
4595 }
4596
4597 static int me4000_eeprom_read(me4000_eeprom_t * arg,
4598                               me4000_ai_context_t * ai_context)
4599 {
4600         int err;
4601         unsigned long cmd;
4602         me4000_eeprom_t setup;
4603
4604         CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4605
4606         /* Command for date */
4607         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4608         setup.date =
4609             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4610         setup.date <<= 16;
4611         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4612         setup.date |=
4613             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4614
4615         /* Command for unipolar 10V offset */
4616         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4617         setup.uni_10_offset =
4618             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4619
4620         /* Command for unipolar 10V fullscale */
4621         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4622         setup.uni_10_fullscale =
4623             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4624
4625         /* Command for unipolar 2,5V offset */
4626         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4627         setup.uni_2_5_offset =
4628             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4629
4630         /* Command for unipolar 2,5V fullscale */
4631         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4632         setup.uni_2_5_fullscale =
4633             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4634
4635         /* Command for bipolar 10V offset */
4636         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4637         setup.bi_10_offset =
4638             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4639
4640         /* Command for bipolar 10V fullscale */
4641         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4642         setup.bi_10_fullscale =
4643             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4644
4645         /* Command for bipolar 2,5V offset */
4646         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4647         setup.bi_2_5_offset =
4648             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4649
4650         /* Command for bipolar 2,5V fullscale */
4651         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4652         setup.bi_2_5_fullscale =
4653             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4654
4655         /* Command for differntial 10V offset */
4656         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4657         setup.diff_10_offset =
4658             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4659
4660         /* Command for differential 10V fullscale */
4661         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4662         setup.diff_10_fullscale =
4663             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4664
4665         /* Command for differntial 2,5V offset */
4666         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4667         setup.diff_2_5_offset =
4668             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4669
4670         /* Command for differential 2,5V fullscale */
4671         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4672         setup.diff_2_5_fullscale =
4673             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4674
4675         err = copy_to_user(arg, &setup, sizeof(setup));
4676         if (err) {
4677                 printk(KERN_ERR
4678                        "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4679                 return err;
4680         }
4681
4682         return 0;
4683 }
4684
4685 /*------------------------------------ DIO stuff ----------------------------------------------*/
4686
4687 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4688                             unsigned int service, unsigned long arg)
4689 {
4690         me4000_dio_context_t *dio_context;
4691
4692         CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4693
4694         dio_context = file_p->private_data;
4695
4696         if (_IOC_TYPE(service) != ME4000_MAGIC) {
4697                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4698                 return -ENOTTY;
4699         }
4700         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4701                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4702                 return -ENOTTY;
4703         }
4704
4705         switch (service) {
4706         case ME4000_DIO_CONFIG:
4707                 return me4000_dio_config((me4000_dio_config_t *) arg,
4708                                          dio_context);
4709         case ME4000_DIO_SET_BYTE:
4710                 return me4000_dio_set_byte((me4000_dio_byte_t *) arg,
4711                                            dio_context);
4712         case ME4000_DIO_GET_BYTE:
4713                 return me4000_dio_get_byte((me4000_dio_byte_t *) arg,
4714                                            dio_context);
4715         case ME4000_DIO_RESET:
4716                 return me4000_dio_reset(dio_context);
4717         default:
4718                 printk(KERN_ERR
4719                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4720                        service);
4721                 return -ENOTTY;
4722         }
4723         return 0;
4724 }
4725
4726 static int me4000_dio_config(me4000_dio_config_t * arg,
4727                              me4000_dio_context_t * dio_context)
4728 {
4729         me4000_dio_config_t cmd;
4730         u32 tmp;
4731         int err;
4732
4733         CALL_PDEBUG("me4000_dio_config() is executed\n");
4734
4735         /* Copy data from user */
4736         err = copy_from_user(&cmd, arg, sizeof(me4000_dio_config_t));
4737         if (err) {
4738                 printk(KERN_ERR
4739                        "ME4000:me4000_dio_config():Can't copy from user space\n");
4740                 return -EFAULT;
4741         }
4742
4743         /* Check port parameter */
4744         if (cmd.port >= dio_context->dio_count) {
4745                 printk(KERN_ERR
4746                        "ME4000:me4000_dio_config():Port %d is not available\n",
4747                        cmd.port);
4748                 return -EINVAL;
4749         }
4750
4751         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4752                cmd.mode, cmd.function);
4753
4754         if (cmd.port == ME4000_DIO_PORT_A) {
4755                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4756                         /* Check if opto isolated version */
4757                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4758                                 printk(KERN_ERR
4759                                        "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4760                                 return -EIO;
4761                         }
4762
4763                         tmp = me4000_inl(dio_context->ctrl_reg);
4764                         tmp &=
4765                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4766                               ME4000_DIO_CTRL_BIT_MODE_1);
4767                         me4000_outl(tmp, dio_context->ctrl_reg);
4768                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4769                         tmp = me4000_inl(dio_context->ctrl_reg);
4770                         tmp &=
4771                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4772                               ME4000_DIO_CTRL_BIT_MODE_1);
4773                         tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4774                         me4000_outl(tmp, dio_context->ctrl_reg);
4775                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4776                         tmp = me4000_inl(dio_context->ctrl_reg);
4777                         tmp &=
4778                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4779                               ME4000_DIO_CTRL_BIT_MODE_1 |
4780                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4781                         tmp |=
4782                             ME4000_DIO_CTRL_BIT_MODE_0 |
4783                             ME4000_DIO_CTRL_BIT_MODE_1;
4784                         me4000_outl(tmp, dio_context->ctrl_reg);
4785                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4786                         tmp = me4000_inl(dio_context->ctrl_reg);
4787                         tmp |=
4788                             ME4000_DIO_CTRL_BIT_MODE_0 |
4789                             ME4000_DIO_CTRL_BIT_MODE_1 |
4790                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4791                         me4000_outl(tmp, dio_context->ctrl_reg);
4792                 } else {
4793                         printk(KERN_ERR
4794                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4795                                cmd.mode);
4796                         return -EINVAL;
4797                 }
4798         } else if (cmd.port == ME4000_DIO_PORT_B) {
4799                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4800                         /* Only do anything when TTL version is installed */
4801                         if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4802                                 tmp = me4000_inl(dio_context->ctrl_reg);
4803                                 tmp &=
4804                                     ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4805                                       ME4000_DIO_CTRL_BIT_MODE_3);
4806                                 me4000_outl(tmp, dio_context->ctrl_reg);
4807                         }
4808                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4809                         /* Check if opto isolated version */
4810                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4811                                 printk(KERN_ERR
4812                                        "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4813                                 return -EIO;
4814                         }
4815
4816                         tmp = me4000_inl(dio_context->ctrl_reg);
4817                         tmp &=
4818                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4819                               ME4000_DIO_CTRL_BIT_MODE_3);
4820                         tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4821                         me4000_outl(tmp, dio_context->ctrl_reg);
4822                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4823                         /* Check if opto isolated version */
4824                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4825                                 printk(KERN_ERR
4826                                        "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4827                                 return -EIO;
4828                         }
4829
4830                         tmp = me4000_inl(dio_context->ctrl_reg);
4831                         tmp &=
4832                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4833                               ME4000_DIO_CTRL_BIT_MODE_3 |
4834                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4835                         tmp |=
4836                             ME4000_DIO_CTRL_BIT_MODE_2 |
4837                             ME4000_DIO_CTRL_BIT_MODE_3;
4838                         me4000_outl(tmp, dio_context->ctrl_reg);
4839                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4840                         /* Check if opto isolated version */
4841                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4842                                 printk(KERN_ERR
4843                                        "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4844                                 return -EIO;
4845                         }
4846
4847                         tmp = me4000_inl(dio_context->ctrl_reg);
4848                         tmp |=
4849                             ME4000_DIO_CTRL_BIT_MODE_2 |
4850                             ME4000_DIO_CTRL_BIT_MODE_3 |
4851                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4852                         me4000_outl(tmp, dio_context->ctrl_reg);
4853                 } else {
4854                         printk(KERN_ERR
4855                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4856                                cmd.mode);
4857                         return -EINVAL;
4858                 }
4859         } else if (cmd.port == ME4000_DIO_PORT_C) {
4860                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4861                         tmp = me4000_inl(dio_context->ctrl_reg);
4862                         tmp &=
4863                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4864                               ME4000_DIO_CTRL_BIT_MODE_5);
4865                         me4000_outl(tmp, dio_context->ctrl_reg);
4866                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4867                         tmp = me4000_inl(dio_context->ctrl_reg);
4868                         tmp &=
4869                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4870                               ME4000_DIO_CTRL_BIT_MODE_5);
4871                         tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4872                         me4000_outl(tmp, dio_context->ctrl_reg);
4873                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4874                         tmp = me4000_inl(dio_context->ctrl_reg);
4875                         tmp &=
4876                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4877                               ME4000_DIO_CTRL_BIT_MODE_5 |
4878                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4879                         tmp |=
4880                             ME4000_DIO_CTRL_BIT_MODE_4 |
4881                             ME4000_DIO_CTRL_BIT_MODE_5;
4882                         me4000_outl(tmp, dio_context->ctrl_reg);
4883                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4884                         tmp = me4000_inl(dio_context->ctrl_reg);
4885                         tmp |=
4886                             ME4000_DIO_CTRL_BIT_MODE_4 |
4887                             ME4000_DIO_CTRL_BIT_MODE_5 |
4888                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4889                         me4000_outl(tmp, dio_context->ctrl_reg);
4890                 } else {
4891                         printk(KERN_ERR
4892                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4893                                cmd.mode);
4894                         return -EINVAL;
4895                 }
4896         } else if (cmd.port == ME4000_DIO_PORT_D) {
4897                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4898                         tmp = me4000_inl(dio_context->ctrl_reg);
4899                         tmp &=
4900                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4901                               ME4000_DIO_CTRL_BIT_MODE_7);
4902                         me4000_outl(tmp, dio_context->ctrl_reg);
4903                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4904                         tmp = me4000_inl(dio_context->ctrl_reg);
4905                         tmp &=
4906                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4907                               ME4000_DIO_CTRL_BIT_MODE_7);
4908                         tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4909                         me4000_outl(tmp, dio_context->ctrl_reg);
4910                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4911                         tmp = me4000_inl(dio_context->ctrl_reg);
4912                         tmp &=
4913                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4914                               ME4000_DIO_CTRL_BIT_MODE_7 |
4915                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4916                         tmp |=
4917                             ME4000_DIO_CTRL_BIT_MODE_6 |
4918                             ME4000_DIO_CTRL_BIT_MODE_7;
4919                         me4000_outl(tmp, dio_context->ctrl_reg);
4920                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4921                         tmp = me4000_inl(dio_context->ctrl_reg);
4922                         tmp |=
4923                             ME4000_DIO_CTRL_BIT_MODE_6 |
4924                             ME4000_DIO_CTRL_BIT_MODE_7 |
4925                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4926                         me4000_outl(tmp, dio_context->ctrl_reg);
4927                 } else {
4928                         printk(KERN_ERR
4929                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4930                                cmd.mode);
4931                         return -EINVAL;
4932                 }
4933         } else {
4934                 printk(KERN_ERR
4935                        "ME4000:me4000_dio_config():Port %d is not available\n",
4936                        cmd.port);
4937                 return -EINVAL;
4938         }
4939
4940         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4941                cmd.mode, cmd.function);
4942
4943         if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4944             || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4945                 tmp = me4000_inl(dio_context->ctrl_reg);
4946                 tmp &=
4947                     ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4948                       ME4000_DIO_CTRL_BIT_FUNCTION_1);
4949                 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4950                         me4000_outl(tmp, dio_context->ctrl_reg);
4951                 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4952                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4953                         me4000_outl(tmp, dio_context->ctrl_reg);
4954                 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4955                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4956                         me4000_outl(tmp, dio_context->ctrl_reg);
4957                 } else {
4958                         printk(KERN_ERR
4959                                "ME4000:me4000_dio_config():Invalid port function specified\n");
4960                         return -EINVAL;
4961                 }
4962         }
4963
4964         return 0;
4965 }
4966
4967 static int me4000_dio_set_byte(me4000_dio_byte_t * arg,
4968                                me4000_dio_context_t * dio_context)
4969 {
4970         me4000_dio_byte_t cmd;
4971         int err;
4972
4973         CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4974
4975         /* Copy data from user */
4976         err = copy_from_user(&cmd, arg, sizeof(me4000_dio_byte_t));
4977         if (err) {
4978                 printk(KERN_ERR
4979                        "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4980                 return -EFAULT;
4981         }
4982
4983         /* Check port parameter */
4984         if (cmd.port >= dio_context->dio_count) {
4985                 printk(KERN_ERR
4986                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4987                        cmd.port);
4988                 return -EINVAL;
4989         }
4990
4991         if (cmd.port == ME4000_DIO_PORT_A) {
4992                 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4993                         printk(KERN_ERR
4994                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4995                                cmd.port);
4996                         return -EIO;
4997                 }
4998                 me4000_outl(cmd.byte, dio_context->port_0_reg);
4999         } else if (cmd.port == ME4000_DIO_PORT_B) {
5000                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
5001                         printk(KERN_ERR
5002                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5003                                cmd.port);
5004                         return -EIO;
5005                 }
5006                 me4000_outl(cmd.byte, dio_context->port_1_reg);
5007         } else if (cmd.port == ME4000_DIO_PORT_C) {
5008                 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
5009                         printk(KERN_ERR
5010                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5011                                cmd.port);
5012                         return -EIO;
5013                 }
5014                 me4000_outl(cmd.byte, dio_context->port_2_reg);
5015         } else if (cmd.port == ME4000_DIO_PORT_D) {
5016                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
5017                         printk(KERN_ERR
5018                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5019                                cmd.port);
5020                         return -EIO;
5021                 }
5022                 me4000_outl(cmd.byte, dio_context->port_3_reg);
5023         } else {
5024                 printk(KERN_ERR
5025                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
5026                        cmd.port);
5027                 return -EINVAL;
5028         }
5029
5030         return 0;
5031 }
5032
5033 static int me4000_dio_get_byte(me4000_dio_byte_t * arg,
5034                                me4000_dio_context_t * dio_context)
5035 {
5036         me4000_dio_byte_t cmd;
5037         int err;
5038
5039         CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5040
5041         /* Copy data from user */
5042         err = copy_from_user(&cmd, arg, sizeof(me4000_dio_byte_t));
5043         if (err) {
5044                 printk(KERN_ERR
5045                        "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5046                 return -EFAULT;
5047         }
5048
5049         /* Check port parameter */
5050         if (cmd.port >= dio_context->dio_count) {
5051                 printk(KERN_ERR
5052                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5053                        cmd.port);
5054                 return -EINVAL;
5055         }
5056
5057         if (cmd.port == ME4000_DIO_PORT_A) {
5058                 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5059         } else if (cmd.port == ME4000_DIO_PORT_B) {
5060                 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5061         } else if (cmd.port == ME4000_DIO_PORT_C) {
5062                 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5063         } else if (cmd.port == ME4000_DIO_PORT_D) {
5064                 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5065         } else {
5066                 printk(KERN_ERR
5067                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5068                        cmd.port);
5069                 return -EINVAL;
5070         }
5071
5072         /* Copy result back to user */
5073         err = copy_to_user(arg, &cmd, sizeof(me4000_dio_byte_t));
5074         if (err) {
5075                 printk(KERN_ERR
5076                        "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5077                 return -EFAULT;
5078         }
5079
5080         return 0;
5081 }
5082
5083 static int me4000_dio_reset(me4000_dio_context_t * dio_context)
5084 {
5085         CALL_PDEBUG("me4000_dio_reset() is executed\n");
5086
5087         /* Clear the control register */
5088         me4000_outl(0, dio_context->ctrl_reg);
5089
5090         /* Check for opto isolated version */
5091         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5092                 me4000_outl(0x1, dio_context->ctrl_reg);
5093                 me4000_outl(0x0, dio_context->port_0_reg);
5094         }
5095
5096         return 0;
5097 }
5098
5099 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5100
5101 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5102                             unsigned int service, unsigned long arg)
5103 {
5104         me4000_cnt_context_t *cnt_context;
5105
5106         CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5107
5108         cnt_context = file_p->private_data;
5109
5110         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5111                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5112                 return -ENOTTY;
5113         }
5114         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5115                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5116                 return -ENOTTY;
5117         }
5118
5119         switch (service) {
5120         case ME4000_CNT_READ:
5121                 return me4000_cnt_read((me4000_cnt_t *) arg, cnt_context);
5122         case ME4000_CNT_WRITE:
5123                 return me4000_cnt_write((me4000_cnt_t *) arg, cnt_context);
5124         case ME4000_CNT_CONFIG:
5125                 return me4000_cnt_config((me4000_cnt_config_t *) arg,
5126                                          cnt_context);
5127         case ME4000_CNT_RESET:
5128                 return me4000_cnt_reset(cnt_context);
5129         default:
5130                 printk(KERN_ERR
5131                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5132                        service);
5133                 return -ENOTTY;
5134         }
5135         return 0;
5136 }
5137
5138 static int me4000_cnt_config(me4000_cnt_config_t * arg,
5139                              me4000_cnt_context_t * cnt_context)
5140 {
5141         me4000_cnt_config_t cmd;
5142         u8 counter;
5143         u8 mode;
5144         int err;
5145
5146         CALL_PDEBUG("me4000_cnt_config() is executed\n");
5147
5148         /* Copy data from user */
5149         err = copy_from_user(&cmd, arg, sizeof(me4000_cnt_config_t));
5150         if (err) {
5151                 printk(KERN_ERR
5152                        "ME4000:me4000_cnt_config():Can't copy from user space\n");
5153                 return -EFAULT;
5154         }
5155
5156         /* Check counter parameter */
5157         switch (cmd.counter) {
5158         case ME4000_CNT_COUNTER_0:
5159                 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5160                 break;
5161         case ME4000_CNT_COUNTER_1:
5162                 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5163                 break;
5164         case ME4000_CNT_COUNTER_2:
5165                 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5166                 break;
5167         default:
5168                 printk(KERN_ERR
5169                        "ME4000:me4000_cnt_config():Counter %d is not available\n",
5170                        cmd.counter);
5171                 return -EINVAL;
5172         }
5173
5174         /* Check mode parameter */
5175         switch (cmd.mode) {
5176         case ME4000_CNT_MODE_0:
5177                 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5178                 break;
5179         case ME4000_CNT_MODE_1:
5180                 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5181                 break;
5182         case ME4000_CNT_MODE_2:
5183                 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5184                 break;
5185         case ME4000_CNT_MODE_3:
5186                 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5187                 break;
5188         case ME4000_CNT_MODE_4:
5189                 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5190                 break;
5191         case ME4000_CNT_MODE_5:
5192                 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5193                 break;
5194         default:
5195                 printk(KERN_ERR
5196                        "ME4000:me4000_cnt_config():Mode %d is not available\n",
5197                        cmd.mode);
5198                 return -EINVAL;
5199         }
5200
5201         /* Write the control word */
5202         me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5203
5204         return 0;
5205 }
5206
5207 static int me4000_cnt_read(me4000_cnt_t * arg,
5208                            me4000_cnt_context_t * cnt_context)
5209 {
5210         me4000_cnt_t cmd;
5211         u8 tmp;
5212         int err;
5213
5214         CALL_PDEBUG("me4000_cnt_read() is executed\n");
5215
5216         /* Copy data from user */
5217         err = copy_from_user(&cmd, arg, sizeof(me4000_cnt_t));
5218         if (err) {
5219                 printk(KERN_ERR
5220                        "ME4000:me4000_cnt_read():Can't copy from user space\n");
5221                 return -EFAULT;
5222         }
5223
5224         /* Read counter */
5225         switch (cmd.counter) {
5226         case ME4000_CNT_COUNTER_0:
5227                 tmp = me4000_inb(cnt_context->counter_0_reg);
5228                 cmd.value = tmp;
5229                 tmp = me4000_inb(cnt_context->counter_0_reg);
5230                 cmd.value |= ((u16) tmp) << 8;
5231                 break;
5232         case ME4000_CNT_COUNTER_1:
5233                 tmp = me4000_inb(cnt_context->counter_1_reg);
5234                 cmd.value = tmp;
5235                 tmp = me4000_inb(cnt_context->counter_1_reg);
5236                 cmd.value |= ((u16) tmp) << 8;
5237                 break;
5238         case ME4000_CNT_COUNTER_2:
5239                 tmp = me4000_inb(cnt_context->counter_2_reg);
5240                 cmd.value = tmp;
5241                 tmp = me4000_inb(cnt_context->counter_2_reg);
5242                 cmd.value |= ((u16) tmp) << 8;
5243                 break;
5244         default:
5245                 printk(KERN_ERR
5246                        "ME4000:me4000_cnt_read():Counter %d is not available\n",
5247                        cmd.counter);
5248                 return -EINVAL;
5249         }
5250
5251         /* Copy result back to user */
5252         err = copy_to_user(arg, &cmd, sizeof(me4000_cnt_t));
5253         if (err) {
5254                 printk(KERN_ERR
5255                        "ME4000:me4000_cnt_read():Can't copy to user space\n");
5256                 return -EFAULT;
5257         }
5258
5259         return 0;
5260 }
5261
5262 static int me4000_cnt_write(me4000_cnt_t * arg,
5263                             me4000_cnt_context_t * cnt_context)
5264 {
5265         me4000_cnt_t cmd;
5266         u8 tmp;
5267         int err;
5268
5269         CALL_PDEBUG("me4000_cnt_write() is executed\n");
5270
5271         /* Copy data from user */
5272         err = copy_from_user(&cmd, arg, sizeof(me4000_cnt_t));
5273         if (err) {
5274                 printk(KERN_ERR
5275                        "ME4000:me4000_cnt_write():Can't copy from user space\n");
5276                 return -EFAULT;
5277         }
5278
5279         /* Write counter */
5280         switch (cmd.counter) {
5281         case ME4000_CNT_COUNTER_0:
5282                 tmp = cmd.value & 0xFF;
5283                 me4000_outb(tmp, cnt_context->counter_0_reg);
5284                 tmp = (cmd.value >> 8) & 0xFF;
5285                 me4000_outb(tmp, cnt_context->counter_0_reg);
5286                 break;
5287         case ME4000_CNT_COUNTER_1:
5288                 tmp = cmd.value & 0xFF;
5289                 me4000_outb(tmp, cnt_context->counter_1_reg);
5290                 tmp = (cmd.value >> 8) & 0xFF;
5291                 me4000_outb(tmp, cnt_context->counter_1_reg);
5292                 break;
5293         case ME4000_CNT_COUNTER_2:
5294                 tmp = cmd.value & 0xFF;
5295                 me4000_outb(tmp, cnt_context->counter_2_reg);
5296                 tmp = (cmd.value >> 8) & 0xFF;
5297                 me4000_outb(tmp, cnt_context->counter_2_reg);
5298                 break;
5299         default:
5300                 printk(KERN_ERR
5301                        "ME4000:me4000_cnt_write():Counter %d is not available\n",
5302                        cmd.counter);
5303                 return -EINVAL;
5304         }
5305
5306         return 0;
5307 }
5308
5309 static int me4000_cnt_reset(me4000_cnt_context_t * cnt_context)
5310 {
5311         CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5312
5313         /* Set the mode and value for counter 0 */
5314         me4000_outb(0x30, cnt_context->ctrl_reg);
5315         me4000_outb(0x00, cnt_context->counter_0_reg);
5316         me4000_outb(0x00, cnt_context->counter_0_reg);
5317
5318         /* Set the mode and value for counter 1 */
5319         me4000_outb(0x70, cnt_context->ctrl_reg);
5320         me4000_outb(0x00, cnt_context->counter_1_reg);
5321         me4000_outb(0x00, cnt_context->counter_1_reg);
5322
5323         /* Set the mode and value for counter 2 */
5324         me4000_outb(0xB0, cnt_context->ctrl_reg);
5325         me4000_outb(0x00, cnt_context->counter_2_reg);
5326         me4000_outb(0x00, cnt_context->counter_2_reg);
5327
5328         return 0;
5329 }
5330
5331 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5332
5333 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5334                                 unsigned int service, unsigned long arg)
5335 {
5336         me4000_ext_int_context_t *ext_int_context;
5337
5338         CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5339
5340         ext_int_context = file_p->private_data;
5341
5342         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5343                 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5344                 return -ENOTTY;
5345         }
5346         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5347                 printk(KERN_ERR
5348                        "me4000_ext_int_ioctl():Service number to high\n");
5349                 return -ENOTTY;
5350         }
5351
5352         switch (service) {
5353         case ME4000_EXT_INT_ENABLE:
5354                 return me4000_ext_int_enable(ext_int_context);
5355         case ME4000_EXT_INT_DISABLE:
5356                 return me4000_ext_int_disable(ext_int_context);
5357         case ME4000_EXT_INT_COUNT:
5358                 return me4000_ext_int_count((unsigned long *)arg,
5359                                             ext_int_context);
5360         default:
5361                 printk(KERN_ERR
5362                        "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5363                        service);
5364                 return -ENOTTY;
5365         }
5366         return 0;
5367 }
5368
5369 static int me4000_ext_int_enable(me4000_ext_int_context_t * ext_int_context)
5370 {
5371         unsigned long tmp;
5372
5373         CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5374
5375         tmp = me4000_inl(ext_int_context->ctrl_reg);
5376         tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5377         me4000_outl(tmp, ext_int_context->ctrl_reg);
5378
5379         return 0;
5380 }
5381
5382 static int me4000_ext_int_disable(me4000_ext_int_context_t * ext_int_context)
5383 {
5384         unsigned long tmp;
5385
5386         CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5387
5388         tmp = me4000_inl(ext_int_context->ctrl_reg);
5389         tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5390         me4000_outl(tmp, ext_int_context->ctrl_reg);
5391
5392         return 0;
5393 }
5394
5395 static int me4000_ext_int_count(unsigned long *arg,
5396                                 me4000_ext_int_context_t * ext_int_context)
5397 {
5398
5399         CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5400
5401         put_user(ext_int_context->int_count, arg);
5402         return 0;
5403 }
5404
5405 /*------------------------------------ General stuff ------------------------------------*/
5406
5407 static int me4000_get_user_info(me4000_user_info_t * arg,
5408                                 me4000_info_t * board_info)
5409 {
5410         me4000_user_info_t user_info;
5411
5412         CALL_PDEBUG("me4000_get_user_info() is executed\n");
5413
5414         user_info.board_count = board_info->board_count;
5415         user_info.plx_regbase = board_info->plx_regbase;
5416         user_info.plx_regbase_size = board_info->plx_regbase_size;
5417         user_info.me4000_regbase = board_info->me4000_regbase;
5418         user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5419         user_info.serial_no = board_info->serial_no;
5420         user_info.hw_revision = board_info->hw_revision;
5421         user_info.vendor_id = board_info->vendor_id;
5422         user_info.device_id = board_info->device_id;
5423         user_info.pci_bus_no = board_info->pci_bus_no;
5424         user_info.pci_dev_no = board_info->pci_dev_no;
5425         user_info.pci_func_no = board_info->pci_func_no;
5426         user_info.irq = board_info->irq;
5427         user_info.irq_count = board_info->irq_count;
5428         user_info.driver_version = ME4000_DRIVER_VERSION;
5429         user_info.ao_count = board_info->board_p->ao.count;
5430         user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5431
5432         user_info.ai_count = board_info->board_p->ai.count;
5433         user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5434         user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5435
5436         user_info.dio_count = board_info->board_p->dio.count;
5437
5438         user_info.cnt_count = board_info->board_p->cnt.count;
5439
5440         if (copy_to_user(arg, &user_info, sizeof(me4000_user_info_t)))
5441                 return -EFAULT;
5442
5443         return 0;
5444 }
5445
5446 /*------------------------------------ ISR STUFF ------------------------------------*/
5447
5448 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5449 {
5450         int result = 0;
5451         me4000_ext_int_context_t *ext_int_context;
5452
5453         CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5454
5455         ext_int_context = file_ptr->private_data;
5456
5457         result =
5458             fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5459
5460         CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5461         return result;
5462 }
5463
5464 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5465 {
5466         u32 tmp;
5467         u32 value;
5468         me4000_ao_context_t *ao_context;
5469         int i;
5470         int c = 0;
5471         int c1 = 0;
5472         //unsigned long before;
5473         //unsigned long after;
5474
5475         ISR_PDEBUG("me4000_ao_isr() is executed\n");
5476
5477         ao_context = dev_id;
5478
5479         /* Check if irq number is right */
5480         if (irq != ao_context->irq) {
5481                 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5482                            irq);
5483                 return IRQ_NONE;
5484         }
5485
5486         /* Check if this DAC rised an interrupt */
5487         if (!
5488             ((0x1 << (ao_context->index + 3)) &
5489              me4000_inl(ao_context->irq_status_reg))) {
5490                 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5491                 return IRQ_NONE;
5492         }
5493
5494         /* Read status register to find out what happened */
5495         tmp = me4000_inl(ao_context->status_reg);
5496
5497         if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5498             && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5499                 c = ME4000_AO_FIFO_COUNT;
5500                 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5501         } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5502                    && (tmp & ME4000_AO_STATUS_BIT_HF)
5503                    && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5504                 c = ME4000_AO_FIFO_COUNT / 2;
5505                 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5506         } else {
5507                 c = 0;
5508                 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5509         }
5510
5511         ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5512
5513         while (1) {
5514                 c1 = me4000_values_to_end(ao_context->circ_buf,
5515                                           ME4000_AO_BUFFER_COUNT);
5516                 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5517                 if (c1 > c)
5518                         c1 = c;
5519
5520                 if (c1 <= 0) {
5521                         ISR_PDEBUG
5522                             ("me4000_ao_isr():Work done or buffer empty\n");
5523                         break;
5524                 }
5525                 //rdtscl(before);
5526                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5527                     ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5528                         for (i = 0; i < c1; i++) {
5529                                 value =
5530                                     ((u32)
5531                                      (*
5532                                       (ao_context->circ_buf.buf +
5533                                        ao_context->circ_buf.tail + i))) << 16;
5534                                 outl(value, ao_context->fifo_reg);
5535                         }
5536                 } else
5537                         outsw(ao_context->fifo_reg,
5538                               ao_context->circ_buf.buf +
5539                               ao_context->circ_buf.tail, c1);
5540
5541                 //rdtscl(after);
5542                 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5543
5544                 ao_context->circ_buf.tail =
5545                     (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5546                                                         1);
5547                 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5548                            c1, ao_context->fifo_reg);
5549                 c -= c1;
5550         }
5551
5552         /* If there are no values left in the buffer, disable interrupts */
5553         spin_lock(&ao_context->int_lock);
5554         if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5555                 ISR_PDEBUG
5556                     ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5557                 tmp = me4000_inl(ao_context->ctrl_reg);
5558                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5559                 me4000_outl(tmp, ao_context->ctrl_reg);
5560         }
5561         spin_unlock(&ao_context->int_lock);
5562
5563         /* Reset the interrupt */
5564         spin_lock(&ao_context->int_lock);
5565         tmp = me4000_inl(ao_context->ctrl_reg);
5566         tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5567         me4000_outl(tmp, ao_context->ctrl_reg);
5568         tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5569         me4000_outl(tmp, ao_context->ctrl_reg);
5570
5571         /* If state machine is stopped, flow was interrupted */
5572         if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5573                 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5574                 ao_context->pipe_flag = 1;      // Set flag in order to inform write routine
5575                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;  // Disable interrupt
5576         }
5577         me4000_outl(tmp, ao_context->ctrl_reg);
5578         spin_unlock(&ao_context->int_lock);
5579
5580         /* Wake up waiting process */
5581         wake_up_interruptible(&(ao_context->wait_queue));
5582
5583         /* Count the interrupt */
5584         ao_context->board_info->irq_count++;
5585
5586         return IRQ_HANDLED;
5587 }
5588
5589 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5590 {
5591         u32 tmp;
5592         me4000_ai_context_t *ai_context;
5593         int i;
5594         int c = 0;
5595         int c1 = 0;
5596 #ifdef ME4000_ISR_DEBUG
5597         unsigned long before;
5598         unsigned long after;
5599 #endif
5600
5601         ISR_PDEBUG("me4000_ai_isr() is executed\n");
5602
5603 #ifdef ME4000_ISR_DEBUG
5604         rdtscl(before);
5605 #endif
5606
5607         ai_context = dev_id;
5608
5609         /* Check if irq number is right */
5610         if (irq != ai_context->irq) {
5611                 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5612                            irq);
5613                 return IRQ_NONE;
5614         }
5615
5616         if (me4000_inl(ai_context->irq_status_reg) &
5617             ME4000_IRQ_STATUS_BIT_AI_HF) {
5618                 ISR_PDEBUG
5619                     ("me4000_ai_isr():Fifo half full interrupt occured\n");
5620
5621                 /* Read status register to find out what happened */
5622                 tmp = me4000_inl(ai_context->ctrl_reg);
5623
5624                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5625                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5626                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5627                         ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5628                         c = ME4000_AI_FIFO_COUNT;
5629
5630                         /* FIFO overflow, so stop conversion and disable all interrupts */
5631                         spin_lock(&ai_context->int_lock);
5632                         tmp = me4000_inl(ai_context->ctrl_reg);
5633                         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5634                         tmp &=
5635                             ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5636                               ME4000_AI_CTRL_BIT_SC_IRQ);
5637                         outl(tmp, ai_context->ctrl_reg);
5638                         spin_unlock(&ai_context->int_lock);
5639                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5640                            !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5641                            && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5642                         ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5643                         c = ME4000_AI_FIFO_COUNT / 2;
5644                 } else {
5645                         c = 0;
5646                         ISR_PDEBUG
5647                             ("me4000_ai_isr():Can't determine state of fifo\n");
5648                 }
5649
5650                 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5651
5652                 while (1) {
5653                         c1 = me4000_space_to_end(ai_context->circ_buf,
5654                                                  ME4000_AI_BUFFER_COUNT);
5655                         ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5656                         if (c1 > c)
5657                                 c1 = c;
5658
5659                         if (c1 <= 0) {
5660                                 ISR_PDEBUG
5661                                     ("me4000_ai_isr():Work done or buffer full\n");
5662                                 break;
5663                         }
5664
5665                         insw(ai_context->data_reg,
5666                              ai_context->circ_buf.buf +
5667                              ai_context->circ_buf.head, c1);
5668                         ai_context->circ_buf.head =
5669                             (ai_context->circ_buf.head +
5670                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5671                         c -= c1;
5672                 }
5673
5674                 /* Work is done, so reset the interrupt */
5675                 ISR_PDEBUG
5676                     ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5677                 spin_lock(&ai_context->int_lock);
5678                 tmp = me4000_inl(ai_context->ctrl_reg);
5679                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5680                 me4000_outl(tmp, ai_context->ctrl_reg);
5681                 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5682                 me4000_outl(tmp, ai_context->ctrl_reg);
5683                 spin_unlock(&ai_context->int_lock);
5684         }
5685
5686         if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5687                 ISR_PDEBUG
5688                     ("me4000_ai_isr():Sample counter interrupt occured\n");
5689
5690                 if (!ai_context->sample_counter_reload) {
5691                         ISR_PDEBUG
5692                             ("me4000_ai_isr():Single data block available\n");
5693
5694                         /* Poll data until fifo empty */
5695                         for (i = 0;
5696                              (i < ME4000_AI_FIFO_COUNT / 2)
5697                              && (inl(ai_context->ctrl_reg) &
5698                                  ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5699                                 if (me4000_space_to_end
5700                                     (ai_context->circ_buf,
5701                                      ME4000_AI_BUFFER_COUNT)) {
5702                                         *(ai_context->circ_buf.buf +
5703                                           ai_context->circ_buf.head) =
5704                  inw(ai_context->data_reg);
5705                                         ai_context->circ_buf.head =
5706                                             (ai_context->circ_buf.head +
5707                                              1) & (ME4000_AI_BUFFER_COUNT - 1);
5708                                 } else
5709                                         break;
5710                         }
5711                         ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5712                 } else {
5713                         if (ai_context->sample_counter <=
5714                             ME4000_AI_FIFO_COUNT / 2) {
5715                                 ISR_PDEBUG
5716                                     ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5717
5718                                 /* Read status register to find out what happened */
5719                                 tmp = me4000_inl(ai_context->ctrl_reg);
5720
5721                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5722                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5723                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5724                                         ISR_PDEBUG
5725                                             ("me4000_ai_isr():Fifo full\n");
5726                                         c = ME4000_AI_FIFO_COUNT;
5727
5728                                         /* FIFO overflow, so stop conversion */
5729                                         spin_lock(&ai_context->int_lock);
5730                                         tmp = me4000_inl(ai_context->ctrl_reg);
5731                                         tmp |=
5732                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5733                                         outl(tmp, ai_context->ctrl_reg);
5734                                         spin_unlock(&ai_context->int_lock);
5735                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5736                                            && !(tmp &
5737                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5738                                            && (tmp &
5739                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5740                                         ISR_PDEBUG
5741                                             ("me4000_ai_isr():Fifo half full\n");
5742                                         c = ME4000_AI_FIFO_COUNT / 2;
5743                                 } else {
5744                                         c = ai_context->sample_counter;
5745                                         ISR_PDEBUG
5746                                             ("me4000_ai_isr():Sample count values\n");
5747                                 }
5748
5749                                 ISR_PDEBUG
5750                                     ("me4000_ai_isr():Try to read %d values\n",
5751                                      c);
5752
5753                                 while (1) {
5754                                         c1 = me4000_space_to_end(ai_context->
5755                                                                  circ_buf,
5756                                                                  ME4000_AI_BUFFER_COUNT);
5757                                         ISR_PDEBUG
5758                                             ("me4000_ai_isr():Space to end = %d\n",
5759                                              c1);
5760                                         if (c1 > c)
5761                                                 c1 = c;
5762
5763                                         if (c1 <= 0) {
5764                                                 ISR_PDEBUG
5765                                                     ("me4000_ai_isr():Work done or buffer full\n");
5766                                                 break;
5767                                         }
5768
5769                                         insw(ai_context->data_reg,
5770                                              ai_context->circ_buf.buf +
5771                                              ai_context->circ_buf.head, c1);
5772                                         ai_context->circ_buf.head =
5773                                             (ai_context->circ_buf.head +
5774                                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5775                                         c -= c1;
5776                                 }
5777                         } else {
5778                                 ISR_PDEBUG
5779                                     ("me4000_ai_isr():Multiple data block available\n");
5780
5781                                 /* Read status register to find out what happened */
5782                                 tmp = me4000_inl(ai_context->ctrl_reg);
5783
5784                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5785                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5786                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5787                                         ISR_PDEBUG
5788                                             ("me4000_ai_isr():Fifo full\n");
5789                                         c = ME4000_AI_FIFO_COUNT;
5790
5791                                         /* FIFO overflow, so stop conversion */
5792                                         spin_lock(&ai_context->int_lock);
5793                                         tmp = me4000_inl(ai_context->ctrl_reg);
5794                                         tmp |=
5795                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5796                                         outl(tmp, ai_context->ctrl_reg);
5797                                         spin_unlock(&ai_context->int_lock);
5798
5799                                         while (1) {
5800                                                 c1 = me4000_space_to_end
5801                                                     (ai_context->circ_buf,
5802                                                      ME4000_AI_BUFFER_COUNT);
5803                                                 ISR_PDEBUG
5804                                                     ("me4000_ai_isr():Space to end = %d\n",
5805                                                      c1);
5806                                                 if (c1 > c)
5807                                                         c1 = c;
5808
5809                                                 if (c1 <= 0) {
5810                                                         ISR_PDEBUG
5811                                                             ("me4000_ai_isr():Work done or buffer full\n");
5812                                                         break;
5813                                                 }
5814
5815                                                 insw(ai_context->data_reg,
5816                                                      ai_context->circ_buf.buf +
5817                                                      ai_context->circ_buf.head,
5818                                                      c1);
5819                                                 ai_context->circ_buf.head =
5820                                                     (ai_context->circ_buf.head +
5821                                                      c1) &
5822                                                     (ME4000_AI_BUFFER_COUNT -
5823                                                      1);
5824                                                 c -= c1;
5825                                         }
5826                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5827                                            && !(tmp &
5828                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5829                                            && (tmp &
5830                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5831                                         ISR_PDEBUG
5832                                             ("me4000_ai_isr():Fifo half full\n");
5833                                         c = ME4000_AI_FIFO_COUNT / 2;
5834
5835                                         while (1) {
5836                                                 c1 = me4000_space_to_end
5837                                                     (ai_context->circ_buf,
5838                                                      ME4000_AI_BUFFER_COUNT);
5839                                                 ISR_PDEBUG
5840                                                     ("me4000_ai_isr():Space to end = %d\n",
5841                                                      c1);
5842                                                 if (c1 > c)
5843                                                         c1 = c;
5844
5845                                                 if (c1 <= 0) {
5846                                                         ISR_PDEBUG
5847                                                             ("me4000_ai_isr():Work done or buffer full\n");
5848                                                         break;
5849                                                 }
5850
5851                                                 insw(ai_context->data_reg,
5852                                                      ai_context->circ_buf.buf +
5853                                                      ai_context->circ_buf.head,
5854                                                      c1);
5855                                                 ai_context->circ_buf.head =
5856                                                     (ai_context->circ_buf.head +
5857                                                      c1) &
5858                                                     (ME4000_AI_BUFFER_COUNT -
5859                                                      1);
5860                                                 c -= c1;
5861                                         }
5862                                 } else {
5863                                         /* Poll data until fifo empty */
5864                                         for (i = 0;
5865                                              (i < ME4000_AI_FIFO_COUNT / 2)
5866                                              && (inl(ai_context->ctrl_reg) &
5867                                                  ME4000_AI_STATUS_BIT_EF_DATA);
5868                                              i++) {
5869                                                 if (me4000_space_to_end
5870                                                     (ai_context->circ_buf,
5871                                                      ME4000_AI_BUFFER_COUNT)) {
5872                                                         *(ai_context->circ_buf.
5873                                                           buf +
5874                                                           ai_context->circ_buf.
5875                                                           head) =
5876                                        inw(ai_context->data_reg);
5877                                                         ai_context->circ_buf.
5878                                                             head =
5879                                                             (ai_context->
5880                                                              circ_buf.head +
5881                                                              1) &
5882                                                             (ME4000_AI_BUFFER_COUNT
5883                                                              - 1);
5884                                                 } else
5885                                                         break;
5886                                         }
5887                                         ISR_PDEBUG
5888                                             ("me4000_ai_isr():%d values read\n",
5889                                              i);
5890                                 }
5891                         }
5892                 }
5893
5894                 /* Work is done, so reset the interrupt */
5895                 ISR_PDEBUG
5896                     ("me4000_ai_isr():reset interrupt from sample counter\n");
5897                 spin_lock(&ai_context->int_lock);
5898                 tmp = me4000_inl(ai_context->ctrl_reg);
5899                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5900                 me4000_outl(tmp, ai_context->ctrl_reg);
5901                 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5902                 me4000_outl(tmp, ai_context->ctrl_reg);
5903                 spin_unlock(&ai_context->int_lock);
5904         }
5905
5906         /* Values are now available, so wake up waiting process */
5907         if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5908                 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5909                 wake_up_interruptible(&(ai_context->wait_queue));
5910         }
5911
5912         /* If there is no space left in the buffer, disable interrupts */
5913         spin_lock(&ai_context->int_lock);
5914         if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5915                 ISR_PDEBUG
5916                     ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5917                 tmp = me4000_inl(ai_context->ctrl_reg);
5918                 tmp &=
5919                     ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5920                       ME4000_AI_CTRL_BIT_LE_IRQ);
5921                 me4000_outl(tmp, ai_context->ctrl_reg);
5922         }
5923         spin_unlock(&ai_context->int_lock);
5924
5925 #ifdef ME4000_ISR_DEBUG
5926         rdtscl(after);
5927         printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5928                after - before);
5929 #endif
5930
5931         return IRQ_HANDLED;
5932 }
5933
5934 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5935 {
5936         me4000_ext_int_context_t *ext_int_context;
5937         unsigned long tmp;
5938
5939         ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5940
5941         ext_int_context = dev_id;
5942
5943         /* Check if irq number is right */
5944         if (irq != ext_int_context->irq) {
5945                 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5946                            irq);
5947                 return IRQ_NONE;
5948         }
5949
5950         if (me4000_inl(ext_int_context->irq_status_reg) &
5951             ME4000_IRQ_STATUS_BIT_EX) {
5952                 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5953                 tmp = me4000_inl(ext_int_context->ctrl_reg);
5954                 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5955                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5956                 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5957                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5958
5959                 ext_int_context->int_count++;
5960
5961                 if (ext_int_context->fasync_ptr) {
5962                         ISR_PDEBUG
5963                             ("me2600_ext_int_isr():Send signal to process\n");
5964                         kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5965                                     POLL_IN);
5966                 }
5967         }
5968
5969         return IRQ_HANDLED;
5970 }
5971
5972 void __exit me4000_module_exit(void)
5973 {
5974         struct list_head *board_p;
5975         me4000_info_t *board_info;
5976
5977         CALL_PDEBUG("cleanup_module() is executed\n");
5978
5979         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5980
5981         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5982
5983         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5984
5985         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5986
5987         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5988
5989         remove_proc_entry("me4000", NULL);
5990
5991         pci_unregister_driver(&me4000_driver);
5992
5993         /* Reset the boards */
5994         for (board_p = me4000_board_info_list.next;
5995              board_p != &me4000_board_info_list; board_p = board_p->next) {
5996                 board_info = list_entry(board_p, me4000_info_t, list);
5997                 me4000_reset_board(board_info);
5998         }
5999
6000         clear_board_info_list();
6001 }
6002
6003 module_exit(me4000_module_exit);
6004
6005 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
6006                                int *eof, void *data)
6007 {
6008         int len = 0;
6009         int limit = count - 1000;
6010         me4000_info_t *board_info;
6011         struct list_head *ptr;
6012
6013         len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
6014                        (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
6015                        (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
6016                        (ME4000_DRIVER_VERSION & 0xFF));
6017
6018         /* Search for the board context */
6019         for (ptr = me4000_board_info_list.next;
6020              (ptr != &me4000_board_info_list) && (len < limit);
6021              ptr = ptr->next) {
6022                 board_info = list_entry(ptr, me4000_info_t, list);
6023
6024                 len +=
6025                     sprintf(buf + len, "Board number %d:\n",
6026                             board_info->board_count);
6027                 len += sprintf(buf + len, "---------------\n");
6028                 len +=
6029                     sprintf(buf + len, "PLX base register = 0x%lX\n",
6030                             board_info->plx_regbase);
6031                 len +=
6032                     sprintf(buf + len, "PLX base register size = 0x%lX\n",
6033                             board_info->plx_regbase_size);
6034                 len +=
6035                     sprintf(buf + len, "ME4000 base register = 0x%lX\n",
6036                             board_info->me4000_regbase);
6037                 len +=
6038                     sprintf(buf + len, "ME4000 base register size = 0x%lX\n",
6039                             board_info->me4000_regbase_size);
6040                 len +=
6041                     sprintf(buf + len, "Serial number = 0x%X\n",
6042                             board_info->serial_no);
6043                 len +=
6044                     sprintf(buf + len, "Hardware revision = 0x%X\n",
6045                             board_info->hw_revision);
6046                 len +=
6047                     sprintf(buf + len, "Vendor id = 0x%X\n",
6048                             board_info->vendor_id);
6049                 len +=
6050                     sprintf(buf + len, "Device id = 0x%X\n",
6051                             board_info->device_id);
6052                 len +=
6053                     sprintf(buf + len, "PCI bus number = %d\n",
6054                             board_info->pci_bus_no);
6055                 len +=
6056                     sprintf(buf + len, "PCI device number = %d\n",
6057                             board_info->pci_dev_no);
6058                 len +=
6059                     sprintf(buf + len, "PCI function number = %d\n",
6060                             board_info->pci_func_no);
6061                 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6062                 len +=
6063                     sprintf(buf + len,
6064                             "Count of interrupts since module was loaded = %d\n",
6065                             board_info->irq_count);
6066
6067                 len +=
6068                     sprintf(buf + len, "Count of analog outputs = %d\n",
6069                             board_info->board_p->ao.count);
6070                 len +=
6071                     sprintf(buf + len, "Count of analog output fifos = %d\n",
6072                             board_info->board_p->ao.fifo_count);
6073
6074                 len +=
6075                     sprintf(buf + len, "Count of analog inputs = %d\n",
6076                             board_info->board_p->ai.count);
6077                 len +=
6078                     sprintf(buf + len,
6079                             "Count of sample and hold devices for analog input = %d\n",
6080                             board_info->board_p->ai.sh_count);
6081                 len +=
6082                     sprintf(buf + len,
6083                             "Analog external trigger available for analog input = %d\n",
6084                             board_info->board_p->ai.ex_trig_analog);
6085
6086                 len +=
6087                     sprintf(buf + len, "Count of digital ports = %d\n",
6088                             board_info->board_p->dio.count);
6089
6090                 len +=
6091                     sprintf(buf + len, "Count of counter devices = %d\n",
6092                             board_info->board_p->cnt.count);
6093                 len +=
6094                     sprintf(buf + len, "AI control register = 0x%08X\n",
6095                             inl(board_info->me4000_regbase +
6096                                 ME4000_AI_CTRL_REG));
6097
6098                 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6099                                inl(board_info->me4000_regbase +
6100                                    ME4000_AO_00_CTRL_REG));
6101                 len +=
6102                     sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6103                             inl(board_info->me4000_regbase +
6104                                 ME4000_AO_00_STATUS_REG));
6105                 len +=
6106                     sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6107                             inl(board_info->me4000_regbase +
6108                                 ME4000_AO_01_CTRL_REG));
6109                 len +=
6110                     sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6111                             inl(board_info->me4000_regbase +
6112                                 ME4000_AO_01_STATUS_REG));
6113                 len +=
6114                     sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6115                             inl(board_info->me4000_regbase +
6116                                 ME4000_AO_02_CTRL_REG));
6117                 len +=
6118                     sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6119                             inl(board_info->me4000_regbase +
6120                                 ME4000_AO_02_STATUS_REG));
6121                 len +=
6122                     sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6123                             inl(board_info->me4000_regbase +
6124                                 ME4000_AO_03_CTRL_REG));
6125                 len +=
6126                     sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6127                             inl(board_info->me4000_regbase +
6128                                 ME4000_AO_03_STATUS_REG));
6129         }
6130
6131         *eof = 1;
6132         return len;
6133 }