drivers/staging/me4000/me4000.c

   1 /* Device driver for Meilhaus ME-4000 board family.
   2  * ================================================
   3  *
   4  *  Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
   5  *
   6  *  This file is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *  Author:     Guenter Gebhardt        <g.gebhardt@meilhaus.de>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/fs.h>
  25 #include <linux/sched.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/errno.h>
  29 #include <linux/delay.h>
  30 #include <linux/mm.h>
  31 #include <linux/unistd.h>
  32 #include <linux/list.h>
  33 #include <linux/proc_fs.h>
  34 #include <linux/types.h>
  35 #include <linux/poll.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/slab.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/io.h>
  41 #include <asm/system.h>
  42 #include <asm/uaccess.h>
  43
  44 /* Include-File for the Meilhaus ME-4000 I/O board */
  45 #include "me4000.h"
  46 #include "me4000_firmware.h"
  47 #include "me4610_firmware.h"
  48
  49 /* Administrative stuff for modinfo */
  50 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
  51 MODULE_DESCRIPTION
  52     ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
  53 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
  54 MODULE_LICENSE("GPL");
  55
  56 /* Board specific data are kept in a global list */
  57 static LIST_HEAD(me4000_board_info_list);
  58
  59 /* Major Device Numbers. 0 means to get it automatically from the System */
  60 static int me4000_ao_major_driver_no;
  61 static int me4000_ai_major_driver_no;
  62 static int me4000_dio_major_driver_no;
  63 static int me4000_cnt_major_driver_no;
  64 static int me4000_ext_int_major_driver_no;
  65
  66 /* Let the user specify a custom major driver number */
  67 module_param(me4000_ao_major_driver_no, int, 0);
  68 MODULE_PARM_DESC(me4000_ao_major_driver_no,
  69                  "Major driver number for analog output (default 0)");
  70
  71 module_param(me4000_ai_major_driver_no, int, 0);
  72 MODULE_PARM_DESC(me4000_ai_major_driver_no,
  73                  "Major driver number for analog input (default 0)");
  74
  75 module_param(me4000_dio_major_driver_no, int, 0);
  76 MODULE_PARM_DESC(me4000_dio_major_driver_no,
  77                  "Major driver number digital I/O (default 0)");
  78
  79 module_param(me4000_cnt_major_driver_no, int, 0);
  80 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
  81                  "Major driver number for counter (default 0)");
  82
  83 module_param(me4000_ext_int_major_driver_no, int, 0);
  84 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
  85                  "Major driver number for external interrupt (default 0)");
  86
  87 /*-----------------------------------------------------------------------------
  88   Board detection and initialization
  89   ---------------------------------------------------------------------------*/
  90 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
  91 static int me4000_xilinx_download(struct me4000_info *);
  92 static int me4000_reset_board(struct me4000_info *);
  93
  94 static void clear_board_info_list(void);
  95 static void release_ao_contexts(struct me4000_info *board_info);
  96 /*-----------------------------------------------------------------------------
  97   Stuff used by all device parts
  98   ---------------------------------------------------------------------------*/
  99 static int me4000_open(struct inode *, struct file *);
 100 static int me4000_release(struct inode *, struct file *);
 101
 102 static int me4000_get_user_info(struct me4000_user_info *,
 103                                 struct me4000_info *board_info);
 104 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
 105
 106 /*-----------------------------------------------------------------------------
 107   Analog output stuff
 108   ---------------------------------------------------------------------------*/
 109 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
 110                                     loff_t *);
 111 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
 112                                     loff_t *);
 113 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
 114                                     loff_t *);
 115
 116 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
 117                                 unsigned long);
 118 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
 119                                 unsigned long);
 120 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
 121                                 unsigned long);
 122
 123 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
 124 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
 125
 126 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
 127 static int me4000_ao_stop(struct me4000_ao_context *);
 128 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
 129 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
 130 static int me4000_ao_preload(struct me4000_ao_context *);
 131 static int me4000_ao_preload_update(struct me4000_ao_context *);
 132 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
 133 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
 134 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
 135 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
 136 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
 137 static int me4000_ao_enable_do(struct me4000_ao_context *);
 138 static int me4000_ao_disable_do(struct me4000_ao_context *);
 139 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
 140
 141 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
 142 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
 143 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
 144 static int me4000_ao_simultaneous_update(
 145                                         struct me4000_ao_channel_list *channels,
 146                                         struct me4000_ao_context *ao_context);
 147
 148 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
 149 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
 150 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
 151
 152 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
 153                                      struct me4000_ao_context *ao_context);
 154 static int me4000_ao_get_free_buffer(unsigned long *arg,
 155                                      struct me4000_ao_context *ao_context);
 156
 157 /*-----------------------------------------------------------------------------
 158   Analog input stuff
 159   ---------------------------------------------------------------------------*/
 160 static int me4000_ai_single(struct me4000_ai_single *,
 161                                 struct me4000_ai_context *);
 162 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
 163                                 unsigned long);
 164
 165 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
 166 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
 167                               unsigned long);
 168 static unsigned int me4000_ai_poll(struct file *, poll_table *);
 169 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
 170
 171 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
 172                                unsigned long);
 173
 174 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
 175 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
 176 static int me4000_ai_config(struct me4000_ai_config *,
 177                                 struct me4000_ai_context *);
 178 static int me4000_ai_start(struct me4000_ai_context *);
 179 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
 180 static int me4000_ai_stop(struct me4000_ai_context *);
 181 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
 182 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
 183 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
 184 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
 185                                    struct me4000_ai_context *);
 186 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
 187                               struct me4000_ai_context *ai_context);
 188 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
 189 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
 190 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
 191 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
 192 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
 193 static int me4000_ai_get_count_buffer(unsigned long *arg,
 194                                       struct me4000_ai_context *ai_context);
 195
 196 /*-----------------------------------------------------------------------------
 197   EEPROM stuff
 198   ---------------------------------------------------------------------------*/
 199 static int me4000_eeprom_read(struct me4000_eeprom *arg,
 200                               struct me4000_ai_context *ai_context);
 201 static int me4000_eeprom_write(struct me4000_eeprom *arg,
 202                                struct me4000_ai_context *ai_context);
 203
 204 /*-----------------------------------------------------------------------------
 205   Digital I/O stuff
 206   ---------------------------------------------------------------------------*/
 207 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
 208                             unsigned long);
 209 static int me4000_dio_config(struct me4000_dio_config *,
 210                                 struct me4000_dio_context *);
 211 static int me4000_dio_get_byte(struct me4000_dio_byte *,
 212                                 struct me4000_dio_context *);
 213 static int me4000_dio_set_byte(struct me4000_dio_byte *,
 214                                 struct me4000_dio_context *);
 215 static int me4000_dio_reset(struct me4000_dio_context *);
 216
 217 /*-----------------------------------------------------------------------------
 218   Counter stuff
 219   ---------------------------------------------------------------------------*/
 220 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
 221                             unsigned long);
 222 static int me4000_cnt_config(struct me4000_cnt_config *,
 223                                 struct me4000_cnt_context *);
 224 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
 225 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
 226 static int me4000_cnt_reset(struct me4000_cnt_context *);
 227
 228 /*-----------------------------------------------------------------------------
 229   External interrupt routines
 230   ---------------------------------------------------------------------------*/
 231 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
 232                                 unsigned long);
 233 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
 234 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
 235 static int me4000_ext_int_count(unsigned long *arg,
 236                                 struct me4000_ext_int_context *ext_int_context);
 237 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
 238
 239 /*-----------------------------------------------------------------------------
 240   The interrupt service routines
 241   ---------------------------------------------------------------------------*/
 242 static irqreturn_t me4000_ao_isr(int, void *);
 243 static irqreturn_t me4000_ai_isr(int, void *);
 244 static irqreturn_t me4000_ext_int_isr(int, void *);
 245
 246 /*-----------------------------------------------------------------------------
 247   Inline functions
 248   ---------------------------------------------------------------------------*/
 249
 250 static int inline me4000_buf_count(struct me4000_circ_buf buf, int size)
 251 {
 252         return ((buf.head - buf.tail) & (size - 1));
 253 }
 254
 255 static int inline me4000_buf_space(struct me4000_circ_buf buf, int size)
 256 {
 257         return ((buf.tail - (buf.head + 1)) & (size - 1));
 258 }
 259
 260 static int inline me4000_values_to_end(struct me4000_circ_buf buf, int size)
 261 {
 262         int end;
 263         int n;
 264         end = size - buf.tail;
 265         n = (buf.head + end) & (size - 1);
 266         return (n < end) ? n : end;
 267 }
 268
 269 static int inline me4000_space_to_end(struct me4000_circ_buf buf, int size)
 270 {
 271         int end;
 272         int n;
 273
 274         end = size - 1 - buf.head;
 275         n = (end + buf.tail) & (size - 1);
 276         return (n <= end) ? n : (end + 1);
 277 }
 278
 279 static void inline me4000_outb(unsigned char value, unsigned long port)
 280 {
 281         PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
 282         outb(value, port);
 283 }
 284
 285 static void inline me4000_outl(unsigned long value, unsigned long port)
 286 {
 287         PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
 288         outl(value, port);
 289 }
 290
 291 static unsigned long inline me4000_inl(unsigned long port)
 292 {
 293         unsigned long value;
 294         value = inl(port);
 295         PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
 296         return value;
 297 }
 298
 299 static unsigned char inline me4000_inb(unsigned long port)
 300 {
 301         unsigned char value;
 302         value = inb(port);
 303         PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
 304         return value;
 305 }
 306
 307 static struct pci_driver me4000_driver = {
 308         .name = ME4000_NAME,
 309         .id_table = me4000_pci_table,
 310         .probe = me4000_probe
 311 };
 312
 313 static struct file_operations me4000_ao_fops_sing = {
 314       .owner = THIS_MODULE,
 315       .write = me4000_ao_write_sing,
 316       .ioctl = me4000_ao_ioctl_sing,
 317       .open = me4000_open,
 318       .release = me4000_release,
 319 };
 320
 321 static struct file_operations me4000_ao_fops_wrap = {
 322       .owner = THIS_MODULE,
 323       .write = me4000_ao_write_wrap,
 324       .ioctl = me4000_ao_ioctl_wrap,
 325       .open = me4000_open,
 326       .release = me4000_release,
 327 };
 328
 329 static struct file_operations me4000_ao_fops_cont = {
 330       .owner = THIS_MODULE,
 331       .write = me4000_ao_write_cont,
 332       .poll = me4000_ao_poll_cont,
 333       .ioctl = me4000_ao_ioctl_cont,
 334       .open = me4000_open,
 335       .release = me4000_release,
 336       .fsync = me4000_ao_fsync_cont,
 337 };
 338
 339 static struct file_operations me4000_ai_fops_sing = {
 340       .owner = THIS_MODULE,
 341       .ioctl = me4000_ai_ioctl_sing,
 342       .open = me4000_open,
 343       .release = me4000_release,
 344 };
 345
 346 static struct file_operations me4000_ai_fops_cont_sw = {
 347       .owner = THIS_MODULE,
 348       .read = me4000_ai_read,
 349       .poll = me4000_ai_poll,
 350       .ioctl = me4000_ai_ioctl_sw,
 351       .open = me4000_open,
 352       .release = me4000_release,
 353       .fasync = me4000_ai_fasync,
 354 };
 355
 356 static struct file_operations me4000_ai_fops_cont_et = {
 357       .owner = THIS_MODULE,
 358       .read = me4000_ai_read,
 359       .poll = me4000_ai_poll,
 360       .ioctl = me4000_ai_ioctl_ext,
 361       .open = me4000_open,
 362       .release = me4000_release,
 363 };
 364
 365 static struct file_operations me4000_ai_fops_cont_et_value = {
 366       .owner = THIS_MODULE,
 367       .read = me4000_ai_read,
 368       .poll = me4000_ai_poll,
 369       .ioctl = me4000_ai_ioctl_ext,
 370       .open = me4000_open,
 371       .release = me4000_release,
 372 };
 373
 374 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
 375       .owner = THIS_MODULE,
 376       .read = me4000_ai_read,
 377       .poll = me4000_ai_poll,
 378       .ioctl = me4000_ai_ioctl_ext,
 379       .open = me4000_open,
 380       .release = me4000_release,
 381 };
 382
 383 static struct file_operations me4000_dio_fops = {
 384       .owner = THIS_MODULE,
 385       .ioctl = me4000_dio_ioctl,
 386       .open = me4000_open,
 387       .release = me4000_release,
 388 };
 389
 390 static struct file_operations me4000_cnt_fops = {
 391       .owner = THIS_MODULE,
 392       .ioctl = me4000_cnt_ioctl,
 393       .open = me4000_open,
 394       .release = me4000_release,
 395 };
 396
 397 static struct file_operations me4000_ext_int_fops = {
 398       .owner = THIS_MODULE,
 399       .ioctl = me4000_ext_int_ioctl,
 400       .open = me4000_open,
 401       .release = me4000_release,
 402       .fasync = me4000_ext_int_fasync,
 403 };
 404
 405 static struct file_operations *me4000_ao_fops_array[] = {
 406         &me4000_ao_fops_sing,   // single operations
 407         &me4000_ao_fops_wrap,   // wraparound operations
 408         &me4000_ao_fops_cont,   // continous operations
 409 };
 410
 411 static struct file_operations *me4000_ai_fops_array[] = {
 412         &me4000_ai_fops_sing,   // single operations
 413         &me4000_ai_fops_cont_sw,        // continuous operations with software start
 414         &me4000_ai_fops_cont_et,        // continous operations with external trigger
 415         &me4000_ai_fops_cont_et_value,  // sample values by external trigger
 416         &me4000_ai_fops_cont_et_chanlist,       // work through one channel list by external trigger
 417 };
 418
 419 static int __init me4000_init_module(void)
 420 {
 421         int result;
 422
 423         CALL_PDEBUG("init_module() is executed\n");
 424
 425         /* Register driver capabilities */
 426         result = pci_register_driver(&me4000_driver);
 427         PDEBUG("init_module():%d devices detected\n", result);
 428         if (result < 0) {
 429                 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
 430                 goto INIT_ERROR_1;
 431         }
 432
 433         /* Allocate major number for analog output */
 434         result =
 435             register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
 436                             &me4000_ao_fops_sing);
 437         if (result < 0) {
 438                 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
 439                 goto INIT_ERROR_2;
 440         } else {
 441                 me4000_ao_major_driver_no = result;
 442         }
 443         PDEBUG("init_module():Major driver number for AO = %ld\n",
 444                me4000_ao_major_driver_no);
 445
 446         /* Allocate major number for analog input  */
 447         result =
 448             register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
 449                             &me4000_ai_fops_sing);
 450         if (result < 0) {
 451                 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
 452                 goto INIT_ERROR_3;
 453         } else {
 454                 me4000_ai_major_driver_no = result;
 455         }
 456         PDEBUG("init_module():Major driver number for AI = %ld\n",
 457                me4000_ai_major_driver_no);
 458
 459         /* Allocate major number for digital I/O */
 460         result =
 461             register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
 462                             &me4000_dio_fops);
 463         if (result < 0) {
 464                 printk(KERN_ERR
 465                        "ME4000:init_module():Can't get DIO major no\n");
 466                 goto INIT_ERROR_4;
 467         } else {
 468                 me4000_dio_major_driver_no = result;
 469         }
 470         PDEBUG("init_module():Major driver number for DIO = %ld\n",
 471                me4000_dio_major_driver_no);
 472
 473         /* Allocate major number for counter */
 474         result =
 475             register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
 476                             &me4000_cnt_fops);
 477         if (result < 0) {
 478                 printk(KERN_ERR
 479                        "ME4000:init_module():Can't get CNT major no\n");
 480                 goto INIT_ERROR_5;
 481         } else {
 482                 me4000_cnt_major_driver_no = result;
 483         }
 484         PDEBUG("init_module():Major driver number for CNT = %ld\n",
 485                me4000_cnt_major_driver_no);
 486
 487         /* Allocate major number for external interrupt */
 488         result =
 489             register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
 490                             &me4000_ext_int_fops);
 491         if (result < 0) {
 492                 printk(KERN_ERR
 493                        "ME4000:init_module():Can't get major no for external interrupt\n");
 494                 goto INIT_ERROR_6;
 495         } else {
 496                 me4000_ext_int_major_driver_no = result;
 497         }
 498         PDEBUG
 499             ("init_module():Major driver number for external interrupt = %ld\n",
 500              me4000_ext_int_major_driver_no);
 501
 502         /* Create the /proc/me4000 entry */
 503         if (!create_proc_read_entry
 504             ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
 505                 result = -ENODEV;
 506                 printk(KERN_ERR
 507                        "ME4000:init_module():Can't create proc entry\n");
 508                 goto INIT_ERROR_7;
 509         }
 510
 511         return 0;
 512
 513 INIT_ERROR_7:
 514         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
 515
 516 INIT_ERROR_6:
 517         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
 518
 519 INIT_ERROR_5:
 520         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
 521
 522 INIT_ERROR_4:
 523         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
 524
 525 INIT_ERROR_3:
 526         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
 527
 528 INIT_ERROR_2:
 529         pci_unregister_driver(&me4000_driver);
 530         clear_board_info_list();
 531
 532 INIT_ERROR_1:
 533         return result;
 534 }
 535
 536 module_init(me4000_init_module);
 537
 538 static void clear_board_info_list(void)
 539 {
 540         struct list_head *board_p;
 541         struct list_head *dac_p;
 542         struct me4000_info *board_info;
 543         struct me4000_ao_context *ao_context;
 544
 545         /* Clear context lists */
 546         for (board_p = me4000_board_info_list.next;
 547              board_p != &me4000_board_info_list; board_p = board_p->next) {
 548                 board_info = list_entry(board_p, struct me4000_info, list);
 549                 /* Clear analog output context list */
 550                 while (!list_empty(&board_info->ao_context_list)) {
 551                         dac_p = board_info->ao_context_list.next;
 552                         ao_context =
 553                             list_entry(dac_p, struct me4000_ao_context, list);
 554                         me4000_ao_reset(ao_context);
 555                         free_irq(ao_context->irq, ao_context);
 556                         if (ao_context->circ_buf.buf)
 557                                 kfree(ao_context->circ_buf.buf);
 558                         list_del(dac_p);
 559                         kfree(ao_context);
 560                 }
 561
 562                 /* Clear analog input context */
 563                 if (board_info->ai_context->circ_buf.buf)
 564                         kfree(board_info->ai_context->circ_buf.buf);
 565                 kfree(board_info->ai_context);
 566
 567                 /* Clear digital I/O context */
 568                 kfree(board_info->dio_context);
 569
 570                 /* Clear counter context */
 571                 kfree(board_info->cnt_context);
 572
 573                 /* Clear external interrupt context */
 574                 kfree(board_info->ext_int_context);
 575         }
 576
 577         /* Clear the board info list */
 578         while (!list_empty(&me4000_board_info_list)) {
 579                 board_p = me4000_board_info_list.next;
 580                 board_info = list_entry(board_p, struct me4000_info, list);
 581                 pci_release_regions(board_info->pci_dev_p);
 582                 list_del(board_p);
 583                 kfree(board_info);
 584         }
 585 }
 586
 587 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
 588 {
 589
 590         /*--------------------------- plx regbase ---------------------------------*/
 591
 592         board_info->plx_regbase = pci_resource_start(dev, 1);
 593         if (board_info->plx_regbase == 0) {
 594                 printk(KERN_ERR
 595                        "ME4000:get_registers():PCI base address 1 is not available\n");
 596                 return -ENODEV;
 597         }
 598         board_info->plx_regbase_size = pci_resource_len(dev, 1);
 599
 600         PDEBUG
 601             ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
 602              board_info->plx_regbase, board_info->plx_regbase_size);
 603
 604         /*--------------------------- me4000 regbase ------------------------------*/
 605
 606         board_info->me4000_regbase = pci_resource_start(dev, 2);
 607         if (board_info->me4000_regbase == 0) {
 608                 printk(KERN_ERR
 609                        "ME4000:get_registers():PCI base address 2 is not available\n");
 610                 return -ENODEV;
 611         }
 612         board_info->me4000_regbase_size = pci_resource_len(dev, 2);
 613
 614         PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
 615                board_info->me4000_regbase, board_info->me4000_regbase_size);
 616
 617         /*--------------------------- timer regbase ------------------------------*/
 618
 619         board_info->timer_regbase = pci_resource_start(dev, 3);
 620         if (board_info->timer_regbase == 0) {
 621                 printk(KERN_ERR
 622                        "ME4000:get_registers():PCI base address 3 is not available\n");
 623                 return -ENODEV;
 624         }
 625         board_info->timer_regbase_size = pci_resource_len(dev, 3);
 626
 627         PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
 628                board_info->timer_regbase, board_info->timer_regbase_size);
 629
 630         /*--------------------------- program regbase ------------------------------*/
 631
 632         board_info->program_regbase = pci_resource_start(dev, 5);
 633         if (board_info->program_regbase == 0) {
 634                 printk(KERN_ERR
 635                        "get_registers():ME4000:PCI base address 5 is not available\n");
 636                 return -ENODEV;
 637         }
 638         board_info->program_regbase_size = pci_resource_len(dev, 5);
 639
 640         PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
 641                board_info->program_regbase, board_info->program_regbase_size);
 642
 643         return 0;
 644 }
 645
 646 static int init_board_info(struct pci_dev *pci_dev_p,
 647                            struct me4000_info *board_info)
 648 {
 649         int i;
 650         int result;
 651         struct list_head *board_p;
 652         board_info->pci_dev_p = pci_dev_p;
 653
 654         for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
 655                 if (me4000_boards[i].device_id == pci_dev_p->device) {
 656                         board_info->board_p = &me4000_boards[i];
 657                         break;
 658                 }
 659         }
 660         if (i == ARRAY_SIZE(me4000_boards)) {
 661                 printk(KERN_ERR
 662                        "ME4000:init_board_info():Device ID not valid\n");
 663                 return -ENODEV;
 664         }
 665
 666         /* Get the index of the board in the global list */
 667         for (board_p = me4000_board_info_list.next, i = 0;
 668              board_p != &me4000_board_info_list; board_p = board_p->next, i++) {
 669                 if (board_p == &board_info->list) {
 670                         board_info->board_count = i;
 671                         break;
 672                 }
 673         }
 674         if (board_p == &me4000_board_info_list) {
 675                 printk(KERN_ERR
 676                        "ME4000:init_board_info():Cannot get index of baord\n");
 677                 return -ENODEV;
 678         }
 679
 680         /* Init list head for analog output contexts */
 681         INIT_LIST_HEAD(&board_info->ao_context_list);
 682
 683         /* Init spin locks */
 684         spin_lock_init(&board_info->preload_lock);
 685         spin_lock_init(&board_info->ai_ctrl_lock);
 686
 687         /* Get the serial number */
 688         result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
 689         if (result != PCIBIOS_SUCCESSFUL) {
 690                 printk(KERN_WARNING
 691                        "ME4000:init_board_info: Can't get serial_no\n");
 692                 return result;
 693         }
 694         PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
 695
 696         /* Get the hardware revision */
 697         result =
 698             pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
 699         if (result != PCIBIOS_SUCCESSFUL) {
 700                 printk(KERN_WARNING
 701                        "ME4000:init_board_info():Can't get hw_revision\n");
 702                 return result;
 703         }
 704         PDEBUG("init_board_info():hw_revision = 0x%x\n",
 705                board_info->hw_revision);
 706
 707         /* Get the vendor id */
 708         board_info->vendor_id = pci_dev_p->vendor;
 709         PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
 710
 711         /* Get the device id */
 712         board_info->device_id = pci_dev_p->device;
 713         PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
 714
 715         /* Get the pci device number */
 716         board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
 717         PDEBUG("init_board_info():pci_func_no = 0x%x\n",
 718                board_info->pci_func_no);
 719
 720         /* Get the pci slot number */
 721         board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
 722         PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
 723
 724         /* Get the pci bus number */
 725         board_info->pci_bus_no = pci_dev_p->bus->number;
 726         PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
 727
 728         /* Get the irq assigned to the board */
 729         board_info->irq = pci_dev_p->irq;
 730         PDEBUG("init_board_info():irq = %d\n", board_info->irq);
 731
 732         return 0;
 733 }
 734
 735 static int alloc_ao_contexts(struct me4000_info *info)
 736 {
 737         int i;
 738         int err;
 739         struct me4000_ao_context *ao_context;
 740
 741         for (i = 0; i < info->board_p->ao.count; i++) {
 742                 ao_context = kzalloc(sizeof(struct me4000_ao_context),
 743                                                                 GFP_KERNEL);
 744                 if (!ao_context) {
 745                         printk(KERN_ERR
 746                                "alloc_ao_contexts():Can't get memory for ao context\n");
 747                         release_ao_contexts(info);
 748                         return -ENOMEM;
 749                 }
 750
 751                 spin_lock_init(&ao_context->use_lock);
 752                 spin_lock_init(&ao_context->int_lock);
 753                 ao_context->irq = info->irq;
 754                 init_waitqueue_head(&ao_context->wait_queue);
 755                 ao_context->board_info = info;
 756
 757                 if (info->board_p->ao.fifo_count) {
 758                         /* Allocate circular buffer */
 759                         ao_context->circ_buf.buf =
 760                             kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
 761                         if (!ao_context->circ_buf.buf) {
 762                                 printk(KERN_ERR
 763                                        "alloc_ao_contexts():Can't get circular buffer\n");
 764                                 release_ao_contexts(info);
 765                                 return -ENOMEM;
 766                         }
 767
 768                         /* Clear the circular buffer */
 769                         ao_context->circ_buf.head = 0;
 770                         ao_context->circ_buf.tail = 0;
 771                 }
 772
 773                 switch (i) {
 774                 case 0:
 775                         ao_context->ctrl_reg =
 776                             info->me4000_regbase + ME4000_AO_00_CTRL_REG;
 777                         ao_context->status_reg =
 778                             info->me4000_regbase + ME4000_AO_00_STATUS_REG;
 779                         ao_context->fifo_reg =
 780                             info->me4000_regbase + ME4000_AO_00_FIFO_REG;
 781                         ao_context->single_reg =
 782                             info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
 783                         ao_context->timer_reg =
 784                             info->me4000_regbase + ME4000_AO_00_TIMER_REG;
 785                         ao_context->irq_status_reg =
 786                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 787                         ao_context->preload_reg =
 788                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 789                         break;
 790                 case 1:
 791                         ao_context->ctrl_reg =
 792                             info->me4000_regbase + ME4000_AO_01_CTRL_REG;
 793                         ao_context->status_reg =
 794                             info->me4000_regbase + ME4000_AO_01_STATUS_REG;
 795                         ao_context->fifo_reg =
 796                             info->me4000_regbase + ME4000_AO_01_FIFO_REG;
 797                         ao_context->single_reg =
 798                             info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
 799                         ao_context->timer_reg =
 800                             info->me4000_regbase + ME4000_AO_01_TIMER_REG;
 801                         ao_context->irq_status_reg =
 802                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 803                         ao_context->preload_reg =
 804                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 805                         break;
 806                 case 2:
 807                         ao_context->ctrl_reg =
 808                             info->me4000_regbase + ME4000_AO_02_CTRL_REG;
 809                         ao_context->status_reg =
 810                             info->me4000_regbase + ME4000_AO_02_STATUS_REG;
 811                         ao_context->fifo_reg =
 812                             info->me4000_regbase + ME4000_AO_02_FIFO_REG;
 813                         ao_context->single_reg =
 814                             info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
 815                         ao_context->timer_reg =
 816                             info->me4000_regbase + ME4000_AO_02_TIMER_REG;
 817                         ao_context->irq_status_reg =
 818                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 819                         ao_context->preload_reg =
 820                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 821                         break;
 822                 case 3:
 823                         ao_context->ctrl_reg =
 824                             info->me4000_regbase + ME4000_AO_03_CTRL_REG;
 825                         ao_context->status_reg =
 826                             info->me4000_regbase + ME4000_AO_03_STATUS_REG;
 827                         ao_context->fifo_reg =
 828                             info->me4000_regbase + ME4000_AO_03_FIFO_REG;
 829                         ao_context->single_reg =
 830                             info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
 831                         ao_context->timer_reg =
 832                             info->me4000_regbase + ME4000_AO_03_TIMER_REG;
 833                         ao_context->irq_status_reg =
 834                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 835                         ao_context->preload_reg =
 836                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 837                         break;
 838                 default:
 839                         break;
 840                 }
 841
 842                 if (info->board_p->ao.fifo_count) {
 843                         /* Request the interrupt line */
 844                         err =
 845                             request_irq(ao_context->irq, me4000_ao_isr,
 846                                         IRQF_DISABLED | IRQF_SHARED,
 847                                         ME4000_NAME, ao_context);
 848                         if (err) {
 849                                 printk(KERN_ERR
 850                                        "%s:Can't get interrupt line", __func__);
 851                                 kfree(ao_context->circ_buf.buf);
 852                                 kfree(ao_context);
 853                                 release_ao_contexts(info);
 854                                 return -ENODEV;
 855                         }
 856                 }
 857
 858                 list_add_tail(&ao_context->list, &info->ao_context_list);
 859                 ao_context->index = i;
 860         }
 861
 862         return 0;
 863 }
 864
 865 static void release_ao_contexts(struct me4000_info *board_info)
 866 {
 867         struct list_head *dac_p;
 868         struct me4000_ao_context *ao_context;
 869
 870         /* Clear analog output context list */
 871         while (!list_empty(&board_info->ao_context_list)) {
 872                 dac_p = board_info->ao_context_list.next;
 873                 ao_context = list_entry(dac_p, struct me4000_ao_context, list);
 874                 free_irq(ao_context->irq, ao_context);
 875                 kfree(ao_context->circ_buf.buf);
 876                 list_del(dac_p);
 877                 kfree(ao_context);
 878         }
 879 }
 880
 881 static int alloc_ai_context(struct me4000_info *info)
 882 {
 883         struct me4000_ai_context *ai_context;
 884
 885         if (info->board_p->ai.count) {
 886                 ai_context = kzalloc(sizeof(struct me4000_ai_context),
 887                                                                 GFP_KERNEL);
 888                 if (!ai_context) {
 889                         printk(KERN_ERR
 890                                "ME4000:alloc_ai_context():Can't get memory for ai context\n");
 891                         return -ENOMEM;
 892                 }
 893
 894                 info->ai_context = ai_context;
 895
 896                 spin_lock_init(&ai_context->use_lock);
 897                 spin_lock_init(&ai_context->int_lock);
 898                 ai_context->number = 0;
 899                 ai_context->irq = info->irq;
 900                 init_waitqueue_head(&ai_context->wait_queue);
 901                 ai_context->board_info = info;
 902
 903                 ai_context->ctrl_reg =
 904                     info->me4000_regbase + ME4000_AI_CTRL_REG;
 905                 ai_context->status_reg =
 906                     info->me4000_regbase + ME4000_AI_STATUS_REG;
 907                 ai_context->channel_list_reg =
 908                     info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
 909                 ai_context->data_reg =
 910                     info->me4000_regbase + ME4000_AI_DATA_REG;
 911                 ai_context->chan_timer_reg =
 912                     info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
 913                 ai_context->chan_pre_timer_reg =
 914                     info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
 915                 ai_context->scan_timer_low_reg =
 916                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
 917                 ai_context->scan_timer_high_reg =
 918                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
 919                 ai_context->scan_pre_timer_low_reg =
 920                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
 921                 ai_context->scan_pre_timer_high_reg =
 922                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
 923                 ai_context->start_reg =
 924                     info->me4000_regbase + ME4000_AI_START_REG;
 925                 ai_context->irq_status_reg =
 926                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 927                 ai_context->sample_counter_reg =
 928                     info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
 929         }
 930
 931         return 0;
 932 }
 933
 934 static int alloc_dio_context(struct me4000_info *info)
 935 {
 936         struct me4000_dio_context *dio_context;
 937
 938         if (info->board_p->dio.count) {
 939                 dio_context = kzalloc(sizeof(struct me4000_dio_context),
 940                                                                 GFP_KERNEL);
 941                 if (!dio_context) {
 942                         printk(KERN_ERR
 943                                "ME4000:alloc_dio_context():Can't get memory for dio context\n");
 944                         return -ENOMEM;
 945                 }
 946
 947                 info->dio_context = dio_context;
 948
 949                 spin_lock_init(&dio_context->use_lock);
 950                 dio_context->board_info = info;
 951
 952                 dio_context->dio_count = info->board_p->dio.count;
 953
 954                 dio_context->dir_reg =
 955                     info->me4000_regbase + ME4000_DIO_DIR_REG;
 956                 dio_context->ctrl_reg =
 957                     info->me4000_regbase + ME4000_DIO_CTRL_REG;
 958                 dio_context->port_0_reg =
 959                     info->me4000_regbase + ME4000_DIO_PORT_0_REG;
 960                 dio_context->port_1_reg =
 961                     info->me4000_regbase + ME4000_DIO_PORT_1_REG;
 962                 dio_context->port_2_reg =
 963                     info->me4000_regbase + ME4000_DIO_PORT_2_REG;
 964                 dio_context->port_3_reg =
 965                     info->me4000_regbase + ME4000_DIO_PORT_3_REG;
 966         }
 967
 968         return 0;
 969 }
 970
 971 static int alloc_cnt_context(struct me4000_info *info)
 972 {
 973         struct me4000_cnt_context *cnt_context;
 974
 975         if (info->board_p->cnt.count) {
 976                 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
 977                                                                 GFP_KERNEL);
 978                 if (!cnt_context) {
 979                         printk(KERN_ERR
 980                                "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
 981                         return -ENOMEM;
 982                 }
 983
 984                 info->cnt_context = cnt_context;
 985
 986                 spin_lock_init(&cnt_context->use_lock);
 987                 cnt_context->board_info = info;
 988
 989                 cnt_context->ctrl_reg =
 990                     info->timer_regbase + ME4000_CNT_CTRL_REG;
 991                 cnt_context->counter_0_reg =
 992                     info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
 993                 cnt_context->counter_1_reg =
 994                     info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
 995                 cnt_context->counter_2_reg =
 996                     info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
 997         }
 998
 999         return 0;
1000 }
1001
1002 static int alloc_ext_int_context(struct me4000_info *info)
1003 {
1004         struct me4000_ext_int_context *ext_int_context;
1005
1006         if (info->board_p->cnt.count) {
1007                 ext_int_context =
1008                     kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
1009                 if (!ext_int_context) {
1010                         printk(KERN_ERR
1011                                "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1012                         return -ENOMEM;
1013                 }
1014
1015                 info->ext_int_context = ext_int_context;
1016
1017                 spin_lock_init(&ext_int_context->use_lock);
1018                 ext_int_context->board_info = info;
1019
1020                 ext_int_context->fasync_ptr = NULL;
1021                 ext_int_context->irq = info->irq;
1022
1023                 ext_int_context->ctrl_reg =
1024                     info->me4000_regbase + ME4000_AI_CTRL_REG;
1025                 ext_int_context->irq_status_reg =
1026                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1027         }
1028
1029         return 0;
1030 }
1031
1032 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1033 {
1034         int result = 0;
1035         struct me4000_info *board_info;
1036
1037         CALL_PDEBUG("me4000_probe() is executed\n");
1038
1039         /* Allocate structure for board context */
1040         board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1041         if (!board_info) {
1042                 printk(KERN_ERR
1043                        "ME4000:Can't get memory for board info structure\n");
1044                 result = -ENOMEM;
1045                 goto PROBE_ERROR_1;
1046         }
1047
1048         /* Add to global linked list */
1049         list_add_tail(&board_info->list, &me4000_board_info_list);
1050
1051         /* Get the PCI base registers */
1052         result = get_registers(dev, board_info);
1053         if (result) {
1054                 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1055                 goto PROBE_ERROR_2;
1056         }
1057
1058         /* Enable the device */
1059         result = pci_enable_device(dev);
1060         if (result < 0) {
1061                 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1062                 goto PROBE_ERROR_2;
1063         }
1064
1065         /* Request the PCI register regions */
1066         result = pci_request_regions(dev, ME4000_NAME);
1067         if (result < 0) {
1068                 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1069                 goto PROBE_ERROR_2;
1070         }
1071
1072         /* Initialize board info */
1073         result = init_board_info(dev, board_info);
1074         if (result) {
1075                 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1076                 goto PROBE_ERROR_3;
1077         }
1078
1079         /* Download the xilinx firmware */
1080         result = me4000_xilinx_download(board_info);
1081         if (result) {
1082                 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1083                 goto PROBE_ERROR_3;
1084         }
1085
1086         /* Make a hardware reset */
1087         result = me4000_reset_board(board_info);
1088         if (result) {
1089                 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1090                 goto PROBE_ERROR_3;
1091         }
1092
1093         /* Allocate analog output context structures */
1094         result = alloc_ao_contexts(board_info);
1095         if (result) {
1096                 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1097                 goto PROBE_ERROR_3;
1098         }
1099
1100         /* Allocate analog input context */
1101         result = alloc_ai_context(board_info);
1102         if (result) {
1103                 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1104                 goto PROBE_ERROR_4;
1105         }
1106
1107         /* Allocate digital I/O context */
1108         result = alloc_dio_context(board_info);
1109         if (result) {
1110                 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1111                 goto PROBE_ERROR_5;
1112         }
1113
1114         /* Allocate counter context */
1115         result = alloc_cnt_context(board_info);
1116         if (result) {
1117                 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1118                 goto PROBE_ERROR_6;
1119         }
1120
1121         /* Allocate external interrupt context */
1122         result = alloc_ext_int_context(board_info);
1123         if (result) {
1124                 printk(KERN_ERR
1125                        "%s:Cannot allocate ext_int context\n", __func__);
1126                 goto PROBE_ERROR_7;
1127         }
1128
1129         return 0;
1130
1131 PROBE_ERROR_7:
1132         kfree(board_info->cnt_context);
1133
1134 PROBE_ERROR_6:
1135         kfree(board_info->dio_context);
1136
1137 PROBE_ERROR_5:
1138         kfree(board_info->ai_context);
1139
1140 PROBE_ERROR_4:
1141         release_ao_contexts(board_info);
1142
1143 PROBE_ERROR_3:
1144         pci_release_regions(dev);
1145
1146 PROBE_ERROR_2:
1147         list_del(&board_info->list);
1148         kfree(board_info);
1149
1150 PROBE_ERROR_1:
1151         return result;
1152 }
1153
1154 static int me4000_xilinx_download(struct me4000_info *info)
1155 {
1156         int size = 0;
1157         u32 value = 0;
1158         int idx = 0;
1159         unsigned char *firm;
1160         wait_queue_head_t queue;
1161
1162         CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1163
1164         init_waitqueue_head(&queue);
1165
1166         firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1167
1168         /*
1169          * Set PLX local interrupt 2 polarity to high.
1170          * Interrupt is thrown by init pin of xilinx.
1171          */
1172         outl(0x10, info->plx_regbase + PLX_INTCSR);
1173
1174         /* Set /CS and /WRITE of the Xilinx */
1175         value = inl(info->plx_regbase + PLX_ICR);
1176         value |= 0x100;
1177         outl(value, info->plx_regbase + PLX_ICR);
1178
1179         /* Init Xilinx with CS1 */
1180         inb(info->program_regbase + 0xC8);
1181
1182         /* Wait until /INIT pin is set */
1183         udelay(20);
1184         if (!inl(info->plx_regbase + PLX_INTCSR) & 0x20) {
1185                 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1186                 return -EIO;
1187         }
1188
1189         /* Reset /CS and /WRITE of the Xilinx */
1190         value = inl(info->plx_regbase + PLX_ICR);
1191         value &= ~0x100;
1192         outl(value, info->plx_regbase + PLX_ICR);
1193
1194         /* Download Xilinx firmware */
1195         size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1196         udelay(10);
1197
1198         for (idx = 0; idx < size; idx++) {
1199                 outb(firm[16 + idx], info->program_regbase);
1200
1201                 udelay(10);
1202
1203                 /* Check if BUSY flag is low */
1204                 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1205                         printk(KERN_ERR
1206                                "%s:Xilinx is still busy (idx = %d)\n", __func__,
1207                                idx);
1208                         return -EIO;
1209                 }
1210         }
1211
1212         PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1213
1214         /* If done flag is high download was successful */
1215         if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1216                 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1217                 PDEBUG("me4000_xilinx_download():Download was successful\n");
1218         } else {
1219                 printk(KERN_ERR
1220                        "ME4000:%s:DONE flag is not set\n", __func__);
1221                 printk(KERN_ERR
1222                        "ME4000:%s:Download not succesful\n", __func__);
1223                 return -EIO;
1224         }
1225
1226         /* Set /CS and /WRITE */
1227         value = inl(info->plx_regbase + PLX_ICR);
1228         value |= 0x100;
1229         outl(value, info->plx_regbase + PLX_ICR);
1230
1231         return 0;
1232 }
1233
1234 static int me4000_reset_board(struct me4000_info *info)
1235 {
1236         unsigned long icr;
1237
1238         CALL_PDEBUG("me4000_reset_board() is executed\n");
1239
1240         /* Make a hardware reset */
1241         icr = me4000_inl(info->plx_regbase + PLX_ICR);
1242         icr |= 0x40000000;
1243         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1244         icr &= ~0x40000000;
1245         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1246
1247         /* Set both stop bits in the analog input control register */
1248         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1249                     info->me4000_regbase + ME4000_AI_CTRL_REG);
1250
1251         /* Set both stop bits in the analog output control register */
1252         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1253                     info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1254         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1255                     info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1256         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1257                     info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1258         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1259                     info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1260
1261         /* 0x8000 to the DACs means an output voltage of 0V */
1262         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1263         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1264         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1265         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1266
1267         /* Enable interrupts on the PLX */
1268         me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1269
1270         /* Set the adustment register for AO demux */
1271         me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1272                     info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1273
1274         /* Set digital I/O direction for port 0 to output on isolated versions */
1275         if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1276                 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1277         }
1278
1279         return 0;
1280 }
1281
1282 static int me4000_open(struct inode *inode_p, struct file *file_p)
1283 {
1284         int board, dev, mode;
1285         int err = 0;
1286         int i;
1287         struct list_head *ptr;
1288         struct me4000_info *board_info = NULL;
1289         struct me4000_ao_context *ao_context = NULL;
1290         struct me4000_ai_context *ai_context = NULL;
1291         struct me4000_dio_context *dio_context = NULL;
1292         struct me4000_cnt_context *cnt_context = NULL;
1293         struct me4000_ext_int_context *ext_int_context = NULL;
1294
1295         CALL_PDEBUG("me4000_open() is executed\n");
1296
1297         /* Analog output */
1298         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1299                 board = AO_BOARD(inode_p->i_rdev);
1300                 dev = AO_PORT(inode_p->i_rdev);
1301                 mode = AO_MODE(inode_p->i_rdev);
1302
1303                 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1304                        dev, mode);
1305
1306                 /* Search for the board context */
1307                 for (ptr = me4000_board_info_list.next, i = 0;
1308                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1309                         board_info = list_entry(ptr, struct me4000_info, list);
1310                         if (i == board)
1311                                 break;
1312                 }
1313
1314                 if (ptr == &me4000_board_info_list) {
1315                         printk(KERN_ERR
1316                                "ME4000:me4000_open():Board %d not in device list\n",
1317                                board);
1318                         return -ENODEV;
1319                 }
1320
1321                 /* Search for the dac context */
1322                 for (ptr = board_info->ao_context_list.next, i = 0;
1323                      ptr != &board_info->ao_context_list;
1324                      ptr = ptr->next, i++) {
1325                         ao_context = list_entry(ptr, struct me4000_ao_context,
1326                                                                         list);
1327                         if (i == dev)
1328                                 break;
1329                 }
1330
1331                 if (ptr == &board_info->ao_context_list) {
1332                         printk(KERN_ERR
1333                                "ME4000:me4000_open():Device %d not in device list\n",
1334                                dev);
1335                         return -ENODEV;
1336                 }
1337
1338                 /* Check if mode is valid */
1339                 if (mode > 2) {
1340                         printk(KERN_ERR
1341                                "ME4000:me4000_open():Mode is not valid\n");
1342                         return -ENODEV;
1343                 }
1344
1345                 /* Check if mode is valid for this AO */
1346                 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1347                     && (dev >= board_info->board_p->ao.fifo_count)) {
1348                         printk(KERN_ERR
1349                                "ME4000:me4000_open():AO %d only in single mode available\n",
1350                                dev);
1351                         return -ENODEV;
1352                 }
1353
1354                 /* Check if already opened */
1355                 spin_lock(&ao_context->use_lock);
1356                 if (ao_context->dac_in_use) {
1357                         printk(KERN_ERR
1358                                "ME4000:me4000_open():AO %d already in use\n",
1359                                dev);
1360                         spin_unlock(&ao_context->use_lock);
1361                         return -EBUSY;
1362                 }
1363                 ao_context->dac_in_use = 1;
1364                 spin_unlock(&ao_context->use_lock);
1365
1366                 ao_context->mode = mode;
1367
1368                 /* Hold the context in private data */
1369                 file_p->private_data = ao_context;
1370
1371                 /* Set file operations pointer */
1372                 file_p->f_op = me4000_ao_fops_array[mode];
1373
1374                 err = me4000_ao_prepare(ao_context);
1375                 if (err) {
1376                         ao_context->dac_in_use = 0;
1377                         return 1;
1378                 }
1379         }
1380         /* Analog input */
1381         else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1382                 board = AI_BOARD(inode_p->i_rdev);
1383                 mode = AI_MODE(inode_p->i_rdev);
1384
1385                 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1386
1387                 /* Search for the board context */
1388                 for (ptr = me4000_board_info_list.next, i = 0;
1389                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1390                         board_info = list_entry(ptr, struct me4000_info, list);
1391                         if (i == board)
1392                                 break;
1393                 }
1394
1395                 if (ptr == &me4000_board_info_list) {
1396                         printk(KERN_ERR
1397                                "ME4000:me4000_open():Board %d not in device list\n",
1398                                board);
1399                         return -ENODEV;
1400                 }
1401
1402                 ai_context = board_info->ai_context;
1403
1404                 /* Check if mode is valid */
1405                 if (mode > 5) {
1406                         printk(KERN_ERR
1407                                "ME4000:me4000_open():Mode is not valid\n");
1408                         return -EINVAL;
1409                 }
1410
1411                 /* Check if already opened */
1412                 spin_lock(&ai_context->use_lock);
1413                 if (ai_context->in_use) {
1414                         printk(KERN_ERR
1415                                "ME4000:me4000_open():AI already in use\n");
1416                         spin_unlock(&ai_context->use_lock);
1417                         return -EBUSY;
1418                 }
1419                 ai_context->in_use = 1;
1420                 spin_unlock(&ai_context->use_lock);
1421
1422                 ai_context->mode = mode;
1423
1424                 /* Hold the context in private data */
1425                 file_p->private_data = ai_context;
1426
1427                 /* Set file operations pointer */
1428                 file_p->f_op = me4000_ai_fops_array[mode];
1429
1430                 /* Prepare analog input */
1431                 me4000_ai_prepare(ai_context);
1432         }
1433         /* Digital I/O */
1434         else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1435                 board = DIO_BOARD(inode_p->i_rdev);
1436                 dev = 0;
1437                 mode = 0;
1438
1439                 PDEBUG("me4000_open():board = %d\n", board);
1440
1441                 /* Search for the board context */
1442                 for (ptr = me4000_board_info_list.next;
1443                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1444                         board_info = list_entry(ptr, struct me4000_info, list);
1445                         if (board_info->board_count == board)
1446                                 break;
1447                 }
1448
1449                 if (ptr == &me4000_board_info_list) {
1450                         printk(KERN_ERR
1451                                "ME4000:me4000_open():Board %d not in device list\n",
1452                                board);
1453                         return -ENODEV;
1454                 }
1455
1456                 /* Search for the dio context */
1457                 dio_context = board_info->dio_context;
1458
1459                 /* Check if already opened */
1460                 spin_lock(&dio_context->use_lock);
1461                 if (dio_context->in_use) {
1462                         printk(KERN_ERR
1463                                "ME4000:me4000_open():DIO already in use\n");
1464                         spin_unlock(&dio_context->use_lock);
1465                         return -EBUSY;
1466                 }
1467                 dio_context->in_use = 1;
1468                 spin_unlock(&dio_context->use_lock);
1469
1470                 /* Hold the context in private data */
1471                 file_p->private_data = dio_context;
1472
1473                 /* Set file operations pointer to single functions */
1474                 file_p->f_op = &me4000_dio_fops;
1475
1476                 //me4000_dio_reset(dio_context);
1477         }
1478         /* Counters */
1479         else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1480                 board = CNT_BOARD(inode_p->i_rdev);
1481                 dev = 0;
1482                 mode = 0;
1483
1484                 PDEBUG("me4000_open():board = %d\n", board);
1485
1486                 /* Search for the board context */
1487                 for (ptr = me4000_board_info_list.next;
1488                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1489                         board_info = list_entry(ptr, struct me4000_info, list);
1490                         if (board_info->board_count == board)
1491                                 break;
1492                 }
1493
1494                 if (ptr == &me4000_board_info_list) {
1495                         printk(KERN_ERR
1496                                "ME4000:me4000_open():Board %d not in device list\n",
1497                                board);
1498                         return -ENODEV;
1499                 }
1500
1501                 /* Get the cnt context */
1502                 cnt_context = board_info->cnt_context;
1503
1504                 /* Check if already opened */
1505                 spin_lock(&cnt_context->use_lock);
1506                 if (cnt_context->in_use) {
1507                         printk(KERN_ERR
1508                                "ME4000:me4000_open():CNT already in use\n");
1509                         spin_unlock(&cnt_context->use_lock);
1510                         return -EBUSY;
1511                 }
1512                 cnt_context->in_use = 1;
1513                 spin_unlock(&cnt_context->use_lock);
1514
1515                 /* Hold the context in private data */
1516                 file_p->private_data = cnt_context;
1517
1518                 /* Set file operations pointer to single functions */
1519                 file_p->f_op = &me4000_cnt_fops;
1520         }
1521         /* External Interrupt */
1522         else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1523                 board = EXT_INT_BOARD(inode_p->i_rdev);
1524                 dev = 0;
1525                 mode = 0;
1526
1527                 PDEBUG("me4000_open():board = %d\n", board);
1528
1529                 /* Search for the board context */
1530                 for (ptr = me4000_board_info_list.next;
1531                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1532                         board_info = list_entry(ptr, struct me4000_info, list);
1533                         if (board_info->board_count == board)
1534                                 break;
1535                 }
1536
1537                 if (ptr == &me4000_board_info_list) {
1538                         printk(KERN_ERR
1539                                "ME4000:me4000_open():Board %d not in device list\n",
1540                                board);
1541                         return -ENODEV;
1542                 }
1543
1544                 /* Get the external interrupt context */
1545                 ext_int_context = board_info->ext_int_context;
1546
1547                 /* Check if already opened */
1548                 spin_lock(&cnt_context->use_lock);
1549                 if (ext_int_context->in_use) {
1550                         printk(KERN_ERR
1551                                "ME4000:me4000_open():External interrupt already in use\n");
1552                         spin_unlock(&ext_int_context->use_lock);
1553                         return -EBUSY;
1554                 }
1555                 ext_int_context->in_use = 1;
1556                 spin_unlock(&ext_int_context->use_lock);
1557
1558                 /* Hold the context in private data */
1559                 file_p->private_data = ext_int_context;
1560
1561                 /* Set file operations pointer to single functions */
1562                 file_p->f_op = &me4000_ext_int_fops;
1563
1564                 /* Request the interrupt line */
1565                 err =
1566                     request_irq(ext_int_context->irq, me4000_ext_int_isr,
1567                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1568                                 ext_int_context);
1569                 if (err) {
1570                         printk(KERN_ERR
1571                                "ME4000:me4000_open():Can't get interrupt line");
1572                         ext_int_context->in_use = 0;
1573                         return -ENODEV;
1574                 }
1575
1576                 /* Reset the counter */
1577                 me4000_ext_int_disable(ext_int_context);
1578         } else {
1579                 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1580                 return -EINVAL;
1581         }
1582
1583         return 0;
1584 }
1585
1586 static int me4000_release(struct inode *inode_p, struct file *file_p)
1587 {
1588         struct me4000_ao_context *ao_context;
1589         struct me4000_ai_context *ai_context;
1590         struct me4000_dio_context *dio_context;
1591         struct me4000_cnt_context *cnt_context;
1592         struct me4000_ext_int_context *ext_int_context;
1593
1594         CALL_PDEBUG("me4000_release() is executed\n");
1595
1596         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1597                 ao_context = file_p->private_data;
1598
1599                 /* Mark DAC as unused */
1600                 ao_context->dac_in_use = 0;
1601         } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1602                 ai_context = file_p->private_data;
1603
1604                 /* Reset the analog input */
1605                 me4000_ai_reset(ai_context);
1606
1607                 /* Free the interrupt and the circular buffer */
1608                 if (ai_context->mode) {
1609                         free_irq(ai_context->irq, ai_context);
1610                         kfree(ai_context->circ_buf.buf);
1611                         ai_context->circ_buf.buf = NULL;
1612                         ai_context->circ_buf.head = 0;
1613                         ai_context->circ_buf.tail = 0;
1614                 }
1615
1616                 /* Mark AI as unused */
1617                 ai_context->in_use = 0;
1618         } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1619                 dio_context = file_p->private_data;
1620
1621                 /* Mark digital I/O as unused */
1622                 dio_context->in_use = 0;
1623         } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1624                 cnt_context = file_p->private_data;
1625
1626                 /* Mark counters as unused */
1627                 cnt_context->in_use = 0;
1628         } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1629                 ext_int_context = file_p->private_data;
1630
1631                 /* Disable the externel interrupt */
1632                 me4000_ext_int_disable(ext_int_context);
1633
1634                 free_irq(ext_int_context->irq, ext_int_context);
1635
1636                 /* Delete the fasync structure and free memory */
1637                 me4000_ext_int_fasync(0, file_p, 0);
1638
1639                 /* Mark as unused */
1640                 ext_int_context->in_use = 0;
1641         } else {
1642                 printk(KERN_ERR
1643                        "ME4000:me4000_release():Major number unknown\n");
1644                 return -EINVAL;
1645         }
1646
1647         return 0;
1648 }
1649
1650 /*------------------------------- Analog output stuff --------------------------------------*/
1651
1652 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1653 {
1654         unsigned long flags;
1655
1656         CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1657
1658         if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1659                 /* Only do anything if not already in the correct mode */
1660                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1661                 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1662                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1663                         return 0;
1664                 }
1665
1666                 /* Stop any conversion */
1667                 me4000_ao_immediate_stop(ao_context);
1668
1669                 /* Set the control register to default state  */
1670                 spin_lock_irqsave(&ao_context->int_lock, flags);
1671                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1672                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1673                             ME4000_AO_CTRL_BIT_STOP |
1674                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1675                             ao_context->ctrl_reg);
1676                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1677
1678                 /* Set to fastest sample rate */
1679                 me4000_outl(65, ao_context->timer_reg);
1680         } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1681                 /* Only do anything if not already in the correct mode */
1682                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1683                 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1684                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1685                         return 0;
1686                 }
1687
1688                 /* Stop any conversion */
1689                 me4000_ao_immediate_stop(ao_context);
1690
1691                 /* Set the control register to default state  */
1692                 spin_lock_irqsave(&ao_context->int_lock, flags);
1693                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1694                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1695                             ME4000_AO_CTRL_BIT_STOP |
1696                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1697                             ao_context->ctrl_reg);
1698                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1699
1700                 /* Set to fastest sample rate */
1701                 me4000_outl(65, ao_context->timer_reg);
1702         } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1703                 /* Only do anything if not already in the correct mode */
1704                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1705                 if (!
1706                     (mode &
1707                      (ME4000_AO_CONV_MODE_WRAPAROUND |
1708                       ME4000_AO_CONV_MODE_CONTINUOUS))) {
1709                         return 0;
1710                 }
1711
1712                 /* Stop any conversion */
1713                 me4000_ao_immediate_stop(ao_context);
1714
1715                 /* Clear the control register */
1716                 spin_lock_irqsave(&ao_context->int_lock, flags);
1717                 me4000_outl(0x0, ao_context->ctrl_reg);
1718                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1719
1720                 /* Set voltage to 0V */
1721                 me4000_outl(0x8000, ao_context->single_reg);
1722         } else {
1723                 printk(KERN_ERR
1724                        "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1725                 return -EINVAL;
1726         }
1727
1728         return 0;
1729 }
1730
1731 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1732 {
1733         u32 tmp;
1734         wait_queue_head_t queue;
1735         unsigned long flags;
1736
1737         CALL_PDEBUG("me4000_ao_reset() is executed\n");
1738
1739         init_waitqueue_head(&queue);
1740
1741         if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1742                 /*
1743                  * First stop conversion of the DAC before reconfigure.
1744                  * This is essantial, cause of the state machine.
1745                  * If not stopped before configuring mode, it could
1746                  * walk in a undefined state.
1747                  */
1748                 tmp = me4000_inl(ao_context->ctrl_reg);
1749                 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1750                 me4000_outl(tmp, ao_context->ctrl_reg);
1751
1752                 wait_event_timeout(queue,
1753                         (inl(ao_context->status_reg) &
1754                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1755                         1);
1756
1757                 /* Set to transparent mode */
1758                 me4000_ao_simultaneous_disable(ao_context);
1759
1760                 /* Set to single mode in order to set default voltage */
1761                 me4000_outl(0x0, ao_context->ctrl_reg);
1762
1763                 /* Set voltage to 0V */
1764                 me4000_outl(0x8000, ao_context->single_reg);
1765
1766                 /* Set to fastest sample rate */
1767                 me4000_outl(65, ao_context->timer_reg);
1768
1769                 /* Set the original mode and enable FIFO */
1770                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1771                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1772                             ME4000_AO_CTRL_BIT_STOP |
1773                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1774                             ao_context->ctrl_reg);
1775         } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1776                 /*
1777                  * First stop conversion of the DAC before reconfigure.
1778                  * This is essantial, cause of the state machine.
1779                  * If not stopped before configuring mode, it could
1780                  * walk in a undefined state.
1781                  */
1782                 spin_lock_irqsave(&ao_context->int_lock, flags);
1783                 tmp = me4000_inl(ao_context->ctrl_reg);
1784                 tmp |= ME4000_AO_CTRL_BIT_STOP;
1785                 me4000_outl(tmp, ao_context->ctrl_reg);
1786                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1787
1788                 wait_event_timeout(queue,
1789                         (inl(ao_context->status_reg) &
1790                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1791                         1);
1792
1793                 /* Clear the circular buffer */
1794                 ao_context->circ_buf.head = 0;
1795                 ao_context->circ_buf.tail = 0;
1796
1797                 /* Set to transparent mode */
1798                 me4000_ao_simultaneous_disable(ao_context);
1799
1800                 /* Set to single mode in order to set default voltage */
1801                 spin_lock_irqsave(&ao_context->int_lock, flags);
1802                 tmp = me4000_inl(ao_context->ctrl_reg);
1803                 me4000_outl(0x0, ao_context->ctrl_reg);
1804
1805                 /* Set voltage to 0V */
1806                 me4000_outl(0x8000, ao_context->single_reg);
1807
1808                 /* Set to fastest sample rate */
1809                 me4000_outl(65, ao_context->timer_reg);
1810
1811                 /* Set the original mode and enable FIFO */
1812                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1813                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1814                             ME4000_AO_CTRL_BIT_STOP |
1815                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1816                             ao_context->ctrl_reg);
1817                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1818         } else {
1819                 /* Set to transparent mode */
1820                 me4000_ao_simultaneous_disable(ao_context);
1821
1822                 /* Set voltage to 0V */
1823                 me4000_outl(0x8000, ao_context->single_reg);
1824         }
1825
1826         return 0;
1827 }
1828
1829 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1830                                     size_t cnt, loff_t *offp)
1831 {
1832         struct me4000_ao_context *ao_context = filep->private_data;
1833         u32 value;
1834         const u16 *buffer = (const u16 *)buff;
1835
1836         CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1837
1838         if (cnt != 2) {
1839                 printk(KERN_ERR
1840                        "%s:Write count is not 2\n", __func__);
1841                 return -EINVAL;
1842         }
1843
1844         if (get_user(value, buffer)) {
1845                 printk(KERN_ERR
1846                        "%s:Cannot copy data from user\n", __func__);
1847                 return -EFAULT;
1848         }
1849
1850         me4000_outl(value, ao_context->single_reg);
1851
1852         return 2;
1853 }
1854
1855 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1856                                     size_t cnt, loff_t *offp)
1857 {
1858         struct me4000_ao_context *ao_context = filep->private_data;
1859         size_t i;
1860         u32 value;
1861         u32 tmp;
1862         const u16 *buffer = (const u16 *)buff;
1863         size_t count = cnt / 2;
1864
1865         CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1866
1867         /* Check if a conversion is already running */
1868         if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1869                 printk(KERN_ERR
1870                        "%s:There is already a conversion running\n", __func__);
1871                 return -EBUSY;
1872         }
1873
1874         if (count > ME4000_AO_FIFO_COUNT) {
1875                 printk(KERN_ERR
1876                        "%s:Can't load more than %d values\n", __func__,
1877                        ME4000_AO_FIFO_COUNT);
1878                 return -ENOSPC;
1879         }
1880
1881         /* Reset the FIFO */
1882         tmp = inl(ao_context->ctrl_reg);
1883         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1884         outl(tmp, ao_context->ctrl_reg);
1885         tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1886         outl(tmp, ao_context->ctrl_reg);
1887
1888         for (i = 0; i < count; i++) {
1889                 if (get_user(value, buffer + i)) {
1890                         printk(KERN_ERR
1891                                "%s:Cannot copy data from user\n", __func__);
1892                         return -EFAULT;
1893                 }
1894                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1895                     || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1896                         value = value << 16;
1897                 outl(value, ao_context->fifo_reg);
1898         }
1899         CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1900
1901         return i * 2;
1902 }
1903
1904 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1905                                     size_t cnt, loff_t *offp)
1906 {
1907         struct me4000_ao_context *ao_context = filep->private_data;
1908         const u16 *buffer = (const u16 *)buff;
1909         size_t count = cnt / 2;
1910         unsigned long flags;
1911         u32 tmp;
1912         int c = 0;
1913         int k = 0;
1914         int ret = 0;
1915         u16 svalue;
1916         u32 lvalue;
1917         int i;
1918         wait_queue_head_t queue;
1919
1920         CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1921
1922         init_waitqueue_head(&queue);
1923
1924         /* Check count */
1925         if (count <= 0) {
1926                 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1927                 return 0;
1928         }
1929
1930         if (filep->f_flags & O_APPEND) {
1931                 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1932                 while (count > 0) {
1933                         if (filep->f_flags & O_NONBLOCK) {
1934                                 if (ao_context->pipe_flag) {
1935                                         printk(KERN_ERR
1936                                                "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1937                                         return -EPIPE;
1938                                 }
1939                                 c = me4000_space_to_end(ao_context->circ_buf,
1940                                                         ME4000_AO_BUFFER_COUNT);
1941                                 if (!c) {
1942                                         PDEBUG
1943                                             ("me4000_ao_write_cont():Returning from nonblocking write\n");
1944                                         break;
1945                                 }
1946                         } else {
1947                                 wait_event_interruptible(ao_context->wait_queue,
1948                                                          (c =
1949                                                           me4000_space_to_end
1950                                                           (ao_context->circ_buf,
1951                                                            ME4000_AO_BUFFER_COUNT)));
1952                                 if (ao_context->pipe_flag) {
1953                                         printk(KERN_ERR
1954                                                "me4000_ao_write_cont():Broken pipe in blocking write\n");
1955                                         return -EPIPE;
1956                                 }
1957                                 if (signal_pending(current)) {
1958                                         printk(KERN_ERR
1959                                                "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1960                                         return -EINTR;
1961                                 }
1962                         }
1963
1964                         PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1965
1966                         /* Only able to write size of free buffer or size of count */
1967                         if (count < c)
1968                                 c = count;
1969
1970                         k = 2 * c;
1971                         k -= copy_from_user(ao_context->circ_buf.buf +
1972                                             ao_context->circ_buf.head, buffer,
1973                                             k);
1974                         c = k / 2;
1975                         PDEBUG
1976                             ("me4000_ao_write_cont():Copy %d values from user space\n",
1977                              c);
1978
1979                         if (!c)
1980                                 return -EFAULT;
1981
1982                         ao_context->circ_buf.head =
1983                             (ao_context->circ_buf.head +
1984                              c) & (ME4000_AO_BUFFER_COUNT - 1);
1985                         buffer += c;
1986                         count -= c;
1987                         ret += c;
1988
1989                         /* Values are now available so enable interrupts */
1990                         spin_lock_irqsave(&ao_context->int_lock, flags);
1991                         if (me4000_buf_count
1992                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1993                                 tmp = me4000_inl(ao_context->ctrl_reg);
1994                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1995                                 me4000_outl(tmp, ao_context->ctrl_reg);
1996                         }
1997                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
1998                 }
1999
2000                 /* Wait until the state machine is stopped if O_SYNC is set */
2001                 if (filep->f_flags & O_SYNC) {
2002                         while (inl(ao_context->status_reg) &
2003                                ME4000_AO_STATUS_BIT_FSM) {
2004                                 interruptible_sleep_on_timeout(&queue, 1);
2005                                 if (ao_context->pipe_flag) {
2006                                         PDEBUG
2007                                             ("me4000_ao_write_cont():Broken pipe detected after sync\n");
2008                                         return -EPIPE;
2009                                 }
2010                                 if (signal_pending(current)) {
2011                                         printk(KERN_ERR
2012                                                "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
2013                                         return -EINTR;
2014                                 }
2015                         }
2016                 }
2017         } else {
2018                 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2019                 if ((me4000_inl(ao_context->status_reg) &
2020                      ME4000_AO_STATUS_BIT_FSM)) {
2021                         printk(KERN_ERR
2022                                "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2023                         return -EBUSY;
2024                 }
2025
2026                 /* Clear the FIFO */
2027                 spin_lock_irqsave(&ao_context->int_lock, flags);
2028                 tmp = me4000_inl(ao_context->ctrl_reg);
2029                 tmp &=
2030                     ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2031                       ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2032                 me4000_outl(tmp, ao_context->ctrl_reg);
2033                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2034                 me4000_outl(tmp, ao_context->ctrl_reg);
2035                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2036
2037                 /* Clear the circular buffer */
2038                 ao_context->circ_buf.head = 0;
2039                 ao_context->circ_buf.tail = 0;
2040
2041                 /* Reset the broken pipe flag */
2042                 ao_context->pipe_flag = 0;
2043
2044                 /* Only able to write size of fifo or count */
2045                 c = ME4000_AO_FIFO_COUNT;
2046                 if (count < c)
2047                         c = count;
2048
2049                 PDEBUG
2050                     ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2051                      c, ao_context->fifo_reg);
2052
2053                 /* Write values to the fifo */
2054                 for (i = 0; i < c; i++) {
2055                         if (get_user(svalue, buffer))
2056                                 return -EFAULT;
2057
2058                         if (((ao_context->fifo_reg & 0xFF) ==
2059                              ME4000_AO_01_FIFO_REG)
2060                             || ((ao_context->fifo_reg & 0xFF) ==
2061                                 ME4000_AO_03_FIFO_REG)) {
2062                                 lvalue = ((u32) svalue) << 16;
2063                         } else
2064                                 lvalue = (u32) svalue;
2065
2066                         outl(lvalue, ao_context->fifo_reg);
2067                         buffer++;
2068                 }
2069                 count -= c;
2070                 ret += c;
2071
2072                 while (1) {
2073                         /* Get free buffer */
2074                         c = me4000_space_to_end(ao_context->circ_buf,
2075                                                 ME4000_AO_BUFFER_COUNT);
2076
2077                         if (c == 0)
2078                                 return (2 * ret);
2079
2080                         /* Only able to write size of free buffer or size of count */
2081                         if (count < c)
2082                                 c = count;
2083
2084                         /* If count = 0 return to user */
2085                         if (c <= 0) {
2086                                 PDEBUG
2087                                     ("me4000_ao_write_cont():Count reached 0\n");
2088                                 break;
2089                         }
2090
2091                         k = 2 * c;
2092                         k -= copy_from_user(ao_context->circ_buf.buf +
2093                                             ao_context->circ_buf.head, buffer,
2094                                             k);
2095                         c = k / 2;
2096                         PDEBUG
2097                             ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2098                              c);
2099
2100                         if (!c)
2101                                 return -EFAULT;
2102
2103                         ao_context->circ_buf.head =
2104                             (ao_context->circ_buf.head +
2105                              c) & (ME4000_AO_BUFFER_COUNT - 1);
2106                         buffer += c;
2107                         count -= c;
2108                         ret += c;
2109
2110                         /* If values in the buffer are available so enable interrupts */
2111                         spin_lock_irqsave(&ao_context->int_lock, flags);
2112                         if (me4000_buf_count
2113                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2114                                 PDEBUG
2115                                     ("me4000_ao_write_cont():Enable Interrupts\n");
2116                                 tmp = me4000_inl(ao_context->ctrl_reg);
2117                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2118                                 me4000_outl(tmp, ao_context->ctrl_reg);
2119                         }
2120                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2121                 }
2122         }
2123
2124         if (filep->f_flags & O_NONBLOCK) {
2125                 return (ret == 0) ? -EAGAIN : 2 * ret;
2126         }
2127
2128         return 2 * ret;
2129 }
2130
2131 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2132 {
2133         struct me4000_ao_context *ao_context;
2134         unsigned long mask = 0;
2135
2136         CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2137
2138         ao_context = file_p->private_data;
2139
2140         poll_wait(file_p, &ao_context->wait_queue, wait);
2141
2142         /* Get free buffer */
2143         if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2144                 mask |= POLLOUT | POLLWRNORM;
2145
2146         CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2147
2148         return mask;
2149 }
2150
2151 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2152                                 int datasync)
2153 {
2154         struct me4000_ao_context *ao_context;
2155         wait_queue_head_t queue;
2156
2157         CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2158
2159         ao_context = file_p->private_data;
2160         init_waitqueue_head(&queue);
2161
2162         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2163                 interruptible_sleep_on_timeout(&queue, 1);
2164                         wait_event_interruptible_timeout(queue,
2165                         !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2166                         1);
2167                 if (ao_context->pipe_flag) {
2168                         printk(KERN_ERR
2169                                "%s:Broken pipe detected\n", __func__);
2170                         return -EPIPE;
2171                 }
2172
2173                 if (signal_pending(current)) {
2174                         printk(KERN_ERR
2175                                "%s:Wait on state machine interrupted\n",
2176                                __func__);
2177                         return -EINTR;
2178                 }
2179         }
2180
2181         return 0;
2182 }
2183
2184 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2185                                 unsigned int service, unsigned long arg)
2186 {
2187         struct me4000_ao_context *ao_context;
2188
2189         CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2190
2191         ao_context = file_p->private_data;
2192
2193         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2194                 return -ENOTTY;
2195                 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2196         }
2197
2198         switch (service) {
2199         case ME4000_AO_EX_TRIG_SETUP:
2200                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2201         case ME4000_AO_EX_TRIG_ENABLE:
2202                 return me4000_ao_ex_trig_enable(ao_context);
2203         case ME4000_AO_EX_TRIG_DISABLE:
2204                 return me4000_ao_ex_trig_disable(ao_context);
2205         case ME4000_AO_PRELOAD:
2206                 return me4000_ao_preload(ao_context);
2207         case ME4000_AO_PRELOAD_UPDATE:
2208                 return me4000_ao_preload_update(ao_context);
2209         case ME4000_GET_USER_INFO:
2210                 return me4000_get_user_info((struct me4000_user_info *)arg,
2211                                             ao_context->board_info);
2212         case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2213                 return me4000_ao_simultaneous_ex_trig(ao_context);
2214         case ME4000_AO_SIMULTANEOUS_SW:
2215                 return me4000_ao_simultaneous_sw(ao_context);
2216         case ME4000_AO_SIMULTANEOUS_DISABLE:
2217                 return me4000_ao_simultaneous_disable(ao_context);
2218         case ME4000_AO_SIMULTANEOUS_UPDATE:
2219                 return
2220                     me4000_ao_simultaneous_update(
2221                                 (struct me4000_ao_channel_list *)arg,
2222                                 ao_context);
2223         case ME4000_AO_EX_TRIG_TIMEOUT:
2224                 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2225                                                  ao_context);
2226         case ME4000_AO_DISABLE_DO:
2227                 return me4000_ao_disable_do(ao_context);
2228         default:
2229                 printk(KERN_ERR
2230                        "me4000_ao_ioctl_sing():Service number invalid\n");
2231                 return -ENOTTY;
2232         }
2233
2234         return 0;
2235 }
2236
2237 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2238                                 unsigned int service, unsigned long arg)
2239 {
2240         struct me4000_ao_context *ao_context;
2241
2242         CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2243
2244         ao_context = file_p->private_data;
2245
2246         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2247                 return -ENOTTY;
2248                 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2249         }
2250
2251         switch (service) {
2252         case ME4000_AO_START:
2253                 return me4000_ao_start((unsigned long *)arg, ao_context);
2254         case ME4000_AO_STOP:
2255                 return me4000_ao_stop(ao_context);
2256         case ME4000_AO_IMMEDIATE_STOP:
2257                 return me4000_ao_immediate_stop(ao_context);
2258         case ME4000_AO_RESET:
2259                 return me4000_ao_reset(ao_context);
2260         case ME4000_AO_TIMER_SET_DIVISOR:
2261                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2262         case ME4000_AO_EX_TRIG_SETUP:
2263                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2264         case ME4000_AO_EX_TRIG_ENABLE:
2265                 return me4000_ao_ex_trig_enable(ao_context);
2266         case ME4000_AO_EX_TRIG_DISABLE:
2267                 return me4000_ao_ex_trig_disable(ao_context);
2268         case ME4000_GET_USER_INFO:
2269                 return me4000_get_user_info((struct me4000_user_info *)arg,
2270                                             ao_context->board_info);
2271         case ME4000_AO_FSM_STATE:
2272                 return me4000_ao_fsm_state((int *)arg, ao_context);
2273         case ME4000_AO_ENABLE_DO:
2274                 return me4000_ao_enable_do(ao_context);
2275         case ME4000_AO_DISABLE_DO:
2276                 return me4000_ao_disable_do(ao_context);
2277         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2278                 return me4000_ao_synchronous_ex_trig(ao_context);
2279         case ME4000_AO_SYNCHRONOUS_SW:
2280                 return me4000_ao_synchronous_sw(ao_context);
2281         case ME4000_AO_SYNCHRONOUS_DISABLE:
2282                 return me4000_ao_synchronous_disable(ao_context);
2283         default:
2284                 return -ENOTTY;
2285         }
2286         return 0;
2287 }
2288
2289 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2290                                 unsigned int service, unsigned long arg)
2291 {
2292         struct me4000_ao_context *ao_context;
2293
2294         CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2295
2296         ao_context = file_p->private_data;
2297
2298         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2299                 return -ENOTTY;
2300                 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2301         }
2302
2303         switch (service) {
2304         case ME4000_AO_START:
2305                 return me4000_ao_start((unsigned long *)arg, ao_context);
2306         case ME4000_AO_STOP:
2307                 return me4000_ao_stop(ao_context);
2308         case ME4000_AO_IMMEDIATE_STOP:
2309                 return me4000_ao_immediate_stop(ao_context);
2310         case ME4000_AO_RESET:
2311                 return me4000_ao_reset(ao_context);
2312         case ME4000_AO_TIMER_SET_DIVISOR:
2313                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2314         case ME4000_AO_EX_TRIG_SETUP:
2315                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2316         case ME4000_AO_EX_TRIG_ENABLE:
2317                 return me4000_ao_ex_trig_enable(ao_context);
2318         case ME4000_AO_EX_TRIG_DISABLE:
2319                 return me4000_ao_ex_trig_disable(ao_context);
2320         case ME4000_AO_ENABLE_DO:
2321                 return me4000_ao_enable_do(ao_context);
2322         case ME4000_AO_DISABLE_DO:
2323                 return me4000_ao_disable_do(ao_context);
2324         case ME4000_AO_FSM_STATE:
2325                 return me4000_ao_fsm_state((int *)arg, ao_context);
2326         case ME4000_GET_USER_INFO:
2327                 return me4000_get_user_info((struct me4000_user_info *)arg,
2328                                             ao_context->board_info);
2329         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2330                 return me4000_ao_synchronous_ex_trig(ao_context);
2331         case ME4000_AO_SYNCHRONOUS_SW:
2332                 return me4000_ao_synchronous_sw(ao_context);
2333         case ME4000_AO_SYNCHRONOUS_DISABLE:
2334                 return me4000_ao_synchronous_disable(ao_context);
2335         case ME4000_AO_GET_FREE_BUFFER:
2336                 return me4000_ao_get_free_buffer((unsigned long *)arg,
2337                                                  ao_context);
2338         default:
2339                 return -ENOTTY;
2340         }
2341         return 0;
2342 }
2343
2344 static int me4000_ao_start(unsigned long *arg,
2345                            struct me4000_ao_context *ao_context)
2346 {
2347         u32 tmp;
2348         wait_queue_head_t queue;
2349         unsigned long ref;
2350         unsigned long timeout;
2351         unsigned long flags;
2352
2353         CALL_PDEBUG("me4000_ao_start() is executed\n");
2354
2355         if (get_user(timeout, arg)) {
2356                 printk(KERN_ERR
2357                        "me4000_ao_start():Cannot copy data from user\n");
2358                 return -EFAULT;
2359         }
2360
2361         init_waitqueue_head(&queue);
2362
2363         spin_lock_irqsave(&ao_context->int_lock, flags);
2364         tmp = inl(ao_context->ctrl_reg);
2365         tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2366         me4000_outl(tmp, ao_context->ctrl_reg);
2367         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2368
2369         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2370                 if (timeout) {
2371                         ref = jiffies;
2372                         while (!
2373                                (inl(ao_context->status_reg) &
2374                                 ME4000_AO_STATUS_BIT_FSM)) {
2375                                 interruptible_sleep_on_timeout(&queue, 1);
2376                                 if (signal_pending(current)) {
2377                                         printk(KERN_ERR
2378                                                "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2379                                         return -EINTR;
2380                                 }
2381                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2382                                         printk(KERN_ERR
2383                                                "ME4000:me4000_ao_start():Timeout reached\n");
2384                                         return -EIO;
2385                                 }
2386                         }
2387                 }
2388         } else {
2389                 me4000_outl(0x8000, ao_context->single_reg);
2390         }
2391
2392         return 0;
2393 }
2394
2395 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2396 {
2397         u32 tmp;
2398         wait_queue_head_t queue;
2399         unsigned long flags;
2400
2401         init_waitqueue_head(&queue);
2402
2403         CALL_PDEBUG("me4000_ao_stop() is executed\n");
2404
2405         /* Set the stop bit */
2406         spin_lock_irqsave(&ao_context->int_lock, flags);
2407         tmp = inl(ao_context->ctrl_reg);
2408         tmp |= ME4000_AO_CTRL_BIT_STOP;
2409         me4000_outl(tmp, ao_context->ctrl_reg);
2410         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2411
2412         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2413                 interruptible_sleep_on_timeout(&queue, 1);
2414                 if (signal_pending(current)) {
2415                         printk(KERN_ERR
2416                                "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2417                         return -EINTR;
2418                 }
2419         }
2420
2421         /* Clear the stop bit */
2422         //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2423         //me4000_outl(tmp, ao_context->ctrl_reg);
2424
2425         return 0;
2426 }
2427
2428 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2429 {
2430         u32 tmp;
2431         wait_queue_head_t queue;
2432         unsigned long flags;
2433
2434         init_waitqueue_head(&queue);
2435
2436         CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2437
2438         spin_lock_irqsave(&ao_context->int_lock, flags);
2439         tmp = inl(ao_context->ctrl_reg);
2440         tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2441         me4000_outl(tmp, ao_context->ctrl_reg);
2442         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2443
2444         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2445                 interruptible_sleep_on_timeout(&queue, 1);
2446                 if (signal_pending(current)) {
2447                         printk(KERN_ERR
2448                                "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2449                         return -EINTR;
2450                 }
2451         }
2452
2453         /* Clear the stop bits */
2454         //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2455         //me4000_outl(tmp, ao_context->ctrl_reg);
2456
2457         return 0;
2458 }
2459
2460 static int me4000_ao_timer_set_divisor(u32 *arg,
2461                                        struct me4000_ao_context *ao_context)
2462 {
2463         u32 divisor;
2464         u32 tmp;
2465
2466         CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2467
2468         if (get_user(divisor, arg))
2469                 return -EFAULT;
2470
2471         /* Check if the state machine is stopped */
2472         tmp = me4000_inl(ao_context->status_reg);
2473         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2474                 printk(KERN_ERR
2475                        "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2476                 return -EBUSY;
2477         }
2478
2479         PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2480                divisor);
2481
2482         /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2483         if (divisor < ME4000_AO_MIN_TICKS) {
2484                 printk(KERN_ERR
2485                        "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2486                 return -EINVAL;
2487         }
2488
2489         /* Fix bug in Firmware */
2490         divisor -= 2;
2491
2492         PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2493
2494         /* Write the divisor */
2495         me4000_outl(divisor, ao_context->timer_reg);
2496
2497         return 0;
2498 }
2499
2500 static int me4000_ao_ex_trig_set_edge(int *arg,
2501                                       struct me4000_ao_context *ao_context)
2502 {
2503         int mode;
2504         u32 tmp;
2505         unsigned long flags;
2506
2507         CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2508
2509         if (get_user(mode, arg))
2510                 return -EFAULT;
2511
2512         /* Check if the state machine is stopped */
2513         tmp = me4000_inl(ao_context->status_reg);
2514         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2515                 printk(KERN_ERR
2516                        "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2517                 return -EBUSY;
2518         }
2519
2520         if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2521                 spin_lock_irqsave(&ao_context->int_lock, flags);
2522                 tmp = me4000_inl(ao_context->ctrl_reg);
2523                 tmp &=
2524                     ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2525                       ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2526                 me4000_outl(tmp, ao_context->ctrl_reg);
2527                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2528         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2529                 spin_lock_irqsave(&ao_context->int_lock, flags);
2530                 tmp = me4000_inl(ao_context->ctrl_reg);
2531                 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2532                 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2533                 me4000_outl(tmp, ao_context->ctrl_reg);
2534                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2535         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2536                 spin_lock_irqsave(&ao_context->int_lock, flags);
2537                 tmp = me4000_inl(ao_context->ctrl_reg);
2538                 tmp |=
2539                     ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2540                     ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2541                 me4000_outl(tmp, ao_context->ctrl_reg);
2542                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2543         } else {
2544                 printk(KERN_ERR
2545                        "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2546                 return -EINVAL;
2547         }
2548
2549         return 0;
2550 }
2551
2552 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2553 {
2554         u32 tmp;
2555         unsigned long flags;
2556
2557         CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2558
2559         /* Check if the state machine is stopped */
2560         tmp = me4000_inl(ao_context->status_reg);
2561         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2562                 printk(KERN_ERR
2563                        "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2564                 return -EBUSY;
2565         }
2566
2567         spin_lock_irqsave(&ao_context->int_lock, flags);
2568         tmp = me4000_inl(ao_context->ctrl_reg);
2569         tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2570         me4000_outl(tmp, ao_context->ctrl_reg);
2571         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2572
2573         return 0;
2574 }
2575
2576 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2577 {
2578         u32 tmp;
2579         unsigned long flags;
2580
2581         CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2582
2583         /* Check if the state machine is stopped */
2584         tmp = me4000_inl(ao_context->status_reg);
2585         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2586                 printk(KERN_ERR
2587                        "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2588                 return -EBUSY;
2589         }
2590
2591         spin_lock_irqsave(&ao_context->int_lock, flags);
2592         tmp = me4000_inl(ao_context->ctrl_reg);
2593         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2594         me4000_outl(tmp, ao_context->ctrl_reg);
2595         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2596
2597         return 0;
2598 }
2599
2600 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2601 {
2602         u32 tmp;
2603
2604         CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2605
2606         /* Check if the state machine is stopped */
2607         /* Be careful here because this function is called from
2608            me4000_ao_synchronous disable */
2609         tmp = me4000_inl(ao_context->status_reg);
2610         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2611                 printk(KERN_ERR
2612                        "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2613                 return -EBUSY;
2614         }
2615
2616         spin_lock(&ao_context->board_info->preload_lock);
2617         tmp = me4000_inl(ao_context->preload_reg);
2618         tmp &= ~(0x1 << ao_context->index);     // Disable preload bit
2619         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2620         me4000_outl(tmp, ao_context->preload_reg);
2621         spin_unlock(&ao_context->board_info->preload_lock);
2622
2623         return 0;
2624 }
2625
2626 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2627 {
2628         u32 tmp;
2629
2630         CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2631
2632         spin_lock(&ao_context->board_info->preload_lock);
2633         tmp = me4000_inl(ao_context->preload_reg);
2634         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2635         tmp |= (0x1 << (ao_context->index + 16));       // Enable hw simultaneous bit
2636         me4000_outl(tmp, ao_context->preload_reg);
2637         spin_unlock(&ao_context->board_info->preload_lock);
2638
2639         return 0;
2640 }
2641
2642 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2643 {
2644         u32 tmp;
2645
2646         CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2647
2648         spin_lock(&ao_context->board_info->preload_lock);
2649         tmp = me4000_inl(ao_context->preload_reg);
2650         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2651         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2652         me4000_outl(tmp, ao_context->preload_reg);
2653         spin_unlock(&ao_context->board_info->preload_lock);
2654
2655         return 0;
2656 }
2657
2658 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2659 {
2660         CALL_PDEBUG("me4000_ao_preload() is executed\n");
2661         return me4000_ao_simultaneous_sw(ao_context);
2662 }
2663
2664 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2665 {
2666         u32 tmp;
2667         u32 ctrl;
2668         struct list_head *entry;
2669
2670         CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2671
2672         spin_lock(&ao_context->board_info->preload_lock);
2673         tmp = me4000_inl(ao_context->preload_reg);
2674         list_for_each(entry, &ao_context->board_info->ao_context_list) {
2675                 /* The channels we update must be in the following state :
2676                    - Mode A
2677                    - Hardware trigger is disabled
2678                    - Corresponding simultaneous bit is reset
2679                  */
2680                 ctrl = me4000_inl(ao_context->ctrl_reg);
2681                 if (!
2682                     (ctrl &
2683                      (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2684                       ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2685                         if (!
2686                             (tmp &
2687                              (0x1 <<
2688                               (((struct me4000_ao_context *)entry)->index
2689                                                                       + 16)))) {
2690                                 tmp &=
2691                                     ~(0x1 <<
2692                                       (((struct me4000_ao_context *)entry)->
2693                                                                         index));
2694                         }
2695                 }
2696         }
2697         me4000_outl(tmp, ao_context->preload_reg);
2698         spin_unlock(&ao_context->board_info->preload_lock);
2699
2700         return 0;
2701 }
2702
2703 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2704                                          struct me4000_ao_context *ao_context)
2705 {
2706         int err;
2707         int i;
2708         u32 tmp;
2709         struct me4000_ao_channel_list channels;
2710
2711         CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2712
2713         /* Copy data from user */
2714         err = copy_from_user(&channels, arg,
2715                         sizeof(struct me4000_ao_channel_list));
2716         if (err) {
2717                 printk(KERN_ERR
2718                        "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2719                 return -EFAULT;
2720         }
2721
2722         channels.list =
2723             kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2724         if (!channels.list) {
2725                 printk(KERN_ERR
2726                        "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2727                 return -ENOMEM;
2728         }
2729
2730         /* Copy channel list from user */
2731         err =
2732             copy_from_user(channels.list, arg->list,
2733                            sizeof(unsigned long) * channels.count);
2734         if (err) {
2735                 printk(KERN_ERR
2736                        "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2737                 kfree(channels.list);
2738                 return -EFAULT;
2739         }
2740
2741         spin_lock(&ao_context->board_info->preload_lock);
2742         tmp = me4000_inl(ao_context->preload_reg);
2743         for (i = 0; i < channels.count; i++) {
2744                 if (channels.list[i] >
2745                     ao_context->board_info->board_p->ao.count) {
2746                         spin_unlock(&ao_context->board_info->preload_lock);
2747                         kfree(channels.list);
2748                         printk(KERN_ERR
2749                                "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2750                         return -EFAULT;
2751                 }
2752                 tmp &= ~(0x1 << channels.list[i]);      // Clear the preload bit
2753                 tmp &= ~(0x1 << (channels.list[i] + 16));       // Clear the hw simultaneous bit
2754         }
2755         me4000_outl(tmp, ao_context->preload_reg);
2756         spin_unlock(&ao_context->board_info->preload_lock);
2757         kfree(channels.list);
2758
2759         return 0;
2760 }
2761
2762 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2763 {
2764         u32 tmp;
2765         unsigned long flags;
2766
2767         CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2768
2769         /* Check if the state machine is stopped */
2770         tmp = me4000_inl(ao_context->status_reg);
2771         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2772                 printk(KERN_ERR
2773                        "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2774                 return -EBUSY;
2775         }
2776
2777         spin_lock(&ao_context->board_info->preload_lock);
2778         tmp = me4000_inl(ao_context->preload_reg);
2779         tmp &= ~(0x1 << ao_context->index);     // Disable synchronous sw bit
2780         tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2781         me4000_outl(tmp, ao_context->preload_reg);
2782         spin_unlock(&ao_context->board_info->preload_lock);
2783
2784         /* Make runnable */
2785         spin_lock_irqsave(&ao_context->int_lock, flags);
2786         tmp = me4000_inl(ao_context->ctrl_reg);
2787         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2788                 tmp &=
2789                     ~(ME4000_AO_CTRL_BIT_STOP |
2790                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2791                 me4000_outl(tmp, ao_context->ctrl_reg);
2792         }
2793         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2794
2795         return 0;
2796 }
2797
2798 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2799 {
2800         u32 tmp;
2801         unsigned long flags;
2802
2803         CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2804
2805         /* Check if the state machine is stopped */
2806         tmp = me4000_inl(ao_context->status_reg);
2807         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2808                 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2809                 return -EBUSY;
2810         }
2811
2812         spin_lock(&ao_context->board_info->preload_lock);
2813         tmp = me4000_inl(ao_context->preload_reg);
2814         tmp |= 0x1 << ao_context->index;        // Enable synchronous sw bit
2815         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable synchronous hw bit
2816         me4000_outl(tmp, ao_context->preload_reg);
2817         spin_unlock(&ao_context->board_info->preload_lock);
2818
2819         /* Make runnable */
2820         spin_lock_irqsave(&ao_context->int_lock, flags);
2821         tmp = me4000_inl(ao_context->ctrl_reg);
2822         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2823                 tmp &=
2824                     ~(ME4000_AO_CTRL_BIT_STOP |
2825                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2826                 me4000_outl(tmp, ao_context->ctrl_reg);
2827         }
2828         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2829
2830         return 0;
2831 }
2832
2833 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2834 {
2835         return me4000_ao_simultaneous_disable(ao_context);
2836 }
2837
2838 static int me4000_ao_get_free_buffer(unsigned long *arg,
2839                                      struct me4000_ao_context *ao_context)
2840 {
2841         unsigned long c;
2842         int err;
2843
2844         c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2845
2846         err = copy_to_user(arg, &c, sizeof(unsigned long));
2847         if (err) {
2848                 printk(KERN_ERR
2849                        "%s:Can't copy to user space\n", __func__);
2850                 return -EFAULT;
2851         }
2852
2853         return 0;
2854 }
2855
2856 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2857                                      struct me4000_ao_context *ao_context)
2858 {
2859         u32 tmp;
2860         wait_queue_head_t queue;
2861         unsigned long ref;
2862         unsigned long timeout;
2863
2864         CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2865
2866         if (get_user(timeout, arg)) {
2867                 printk(KERN_ERR
2868                        "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2869                 return -EFAULT;
2870         }
2871
2872         init_waitqueue_head(&queue);
2873
2874         tmp = inl(ao_context->ctrl_reg);
2875
2876         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2877                 if (timeout) {
2878                         ref = jiffies;
2879                         while ((inl(ao_context->status_reg) &
2880                                 ME4000_AO_STATUS_BIT_FSM)) {
2881                                 interruptible_sleep_on_timeout(&queue, 1);
2882                                 if (signal_pending(current)) {
2883                                         printk(KERN_ERR
2884                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2885                                         return -EINTR;
2886                                 }
2887                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2888                                         printk(KERN_ERR
2889                                                "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2890                                         return -EIO;
2891                                 }
2892                         }
2893                 } else {
2894                         while ((inl(ao_context->status_reg) &
2895                                 ME4000_AO_STATUS_BIT_FSM)) {
2896                                 interruptible_sleep_on_timeout(&queue, 1);
2897                                 if (signal_pending(current)) {
2898                                         printk(KERN_ERR
2899                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2900                                         return -EINTR;
2901                                 }
2902                         }
2903                 }
2904         } else {
2905                 printk(KERN_ERR
2906                        "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2907                 return -EINVAL;
2908         }
2909
2910         return 0;
2911 }
2912
2913 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2914 {
2915         u32 tmp;
2916         unsigned long flags;
2917
2918         CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2919
2920         /* Only available for analog output 3 */
2921         if (ao_context->index != 3) {
2922                 printk(KERN_ERR
2923                        "me4000_ao_enable_do():Only available for analog output 3\n");
2924                 return -ENOTTY;
2925         }
2926
2927         /* Check if the state machine is stopped */
2928         tmp = me4000_inl(ao_context->status_reg);
2929         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2930                 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2931                 return -EBUSY;
2932         }
2933
2934         /* Set the stop bit */
2935         spin_lock_irqsave(&ao_context->int_lock, flags);
2936         tmp = inl(ao_context->ctrl_reg);
2937         tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2938         me4000_outl(tmp, ao_context->ctrl_reg);
2939         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2940
2941         return 0;
2942 }
2943
2944 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2945 {
2946         u32 tmp;
2947         unsigned long flags;
2948
2949         CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2950
2951         /* Only available for analog output 3 */
2952         if (ao_context->index != 3) {
2953                 printk(KERN_ERR
2954                        "me4000_ao_disable():Only available for analog output 3\n");
2955                 return -ENOTTY;
2956         }
2957
2958         /* Check if the state machine is stopped */
2959         tmp = me4000_inl(ao_context->status_reg);
2960         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2961                 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2962                 return -EBUSY;
2963         }
2964
2965         spin_lock_irqsave(&ao_context->int_lock, flags);
2966         tmp = inl(ao_context->ctrl_reg);
2967         tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2968         me4000_outl(tmp, ao_context->ctrl_reg);
2969         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2970
2971         return 0;
2972 }
2973
2974 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2975 {
2976         unsigned long tmp;
2977
2978         CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2979
2980         tmp =
2981             (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2982             : 0;
2983
2984         if (ao_context->pipe_flag) {
2985                 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2986                 return -EPIPE;
2987         }
2988
2989         if (put_user(tmp, arg)) {
2990                 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2991                 return -EFAULT;
2992         }
2993
2994         return 0;
2995 }
2996
2997 /*------------------------- Analog input stuff -------------------------------*/
2998
2999 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
3000 {
3001         wait_queue_head_t queue;
3002         int err;
3003
3004         CALL_PDEBUG("me4000_ai_prepare() is executed\n");
3005
3006         init_waitqueue_head(&queue);
3007
3008         /* Set the new mode and stop bits */
3009         me4000_outl(ai_context->
3010                     mode | ME4000_AI_CTRL_BIT_STOP |
3011                     ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
3012
3013         /* Set the timer registers */
3014         ai_context->chan_timer = 66;
3015         ai_context->chan_pre_timer = 66;
3016         ai_context->scan_timer_low = 0;
3017         ai_context->scan_timer_high = 0;
3018
3019         me4000_outl(65, ai_context->chan_timer_reg);
3020         me4000_outl(65, ai_context->chan_pre_timer_reg);
3021         me4000_outl(0, ai_context->scan_timer_low_reg);
3022         me4000_outl(0, ai_context->scan_timer_high_reg);
3023         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3024         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3025
3026         ai_context->channel_list_count = 0;
3027
3028         if (ai_context->mode) {
3029                 /* Request the interrupt line */
3030                 err =
3031                     request_irq(ai_context->irq, me4000_ai_isr,
3032                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3033                                 ai_context);
3034                 if (err) {
3035                         printk(KERN_ERR
3036                                "ME4000:me4000_ai_prepare():Can't get interrupt line");
3037                         return -ENODEV;
3038                 }
3039
3040                 /* Allocate circular buffer */
3041                 ai_context->circ_buf.buf =
3042                     kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3043                 if (!ai_context->circ_buf.buf) {
3044                         printk(KERN_ERR
3045                                "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3046                         free_irq(ai_context->irq, ai_context);
3047                         return -ENOMEM;
3048                 }
3049
3050                 /* Clear the circular buffer */
3051                 ai_context->circ_buf.head = 0;
3052                 ai_context->circ_buf.tail = 0;
3053         }
3054
3055         return 0;
3056 }
3057
3058 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3059 {
3060         wait_queue_head_t queue;
3061         u32 tmp;
3062         unsigned long flags;
3063
3064         CALL_PDEBUG("me4000_ai_reset() is executed\n");
3065
3066         init_waitqueue_head(&queue);
3067
3068         /*
3069          * First stop conversion of the state machine before reconfigure.
3070          * If not stopped before configuring mode, it could
3071          * walk in a undefined state.
3072          */
3073         spin_lock_irqsave(&ai_context->int_lock, flags);
3074         tmp = me4000_inl(ai_context->ctrl_reg);
3075         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3076         me4000_outl(tmp, ai_context->ctrl_reg);
3077         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3078
3079         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3080                 interruptible_sleep_on_timeout(&queue, 1);
3081                 if (signal_pending(current)) {
3082                         printk(KERN_ERR
3083                                "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3084                         return -EINTR;
3085                 }
3086         }
3087
3088         /* Clear the control register and set the stop bits */
3089         spin_lock_irqsave(&ai_context->int_lock, flags);
3090         tmp = me4000_inl(ai_context->ctrl_reg);
3091         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3092                     ai_context->ctrl_reg);
3093         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3094
3095         /* Reset timer registers */
3096         ai_context->chan_timer = 66;
3097         ai_context->chan_pre_timer = 66;
3098         ai_context->scan_timer_low = 0;
3099         ai_context->scan_timer_high = 0;
3100         ai_context->sample_counter = 0;
3101         ai_context->sample_counter_reload = 0;
3102
3103         me4000_outl(65, ai_context->chan_timer_reg);
3104         me4000_outl(65, ai_context->chan_pre_timer_reg);
3105         me4000_outl(0, ai_context->scan_timer_low_reg);
3106         me4000_outl(0, ai_context->scan_timer_high_reg);
3107         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3108         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3109         me4000_outl(0, ai_context->sample_counter_reg);
3110
3111         ai_context->channel_list_count = 0;
3112
3113         /* Clear the circular buffer */
3114         ai_context->circ_buf.head = 0;
3115         ai_context->circ_buf.tail = 0;
3116
3117         return 0;
3118 }
3119
3120 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3121                                 unsigned int service, unsigned long arg)
3122 {
3123         struct me4000_ai_context *ai_context;
3124
3125         CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3126
3127         ai_context = file_p->private_data;
3128
3129         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3130                 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3131                 return -ENOTTY;
3132         }
3133         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3134                 printk(KERN_ERR
3135                        "me4000_ai_ioctl_sing():Service number to high\n");
3136                 return -ENOTTY;
3137         }
3138
3139         switch (service) {
3140         case ME4000_AI_SINGLE:
3141                 return me4000_ai_single((struct me4000_ai_single *)arg,
3142                                                                 ai_context);
3143         case ME4000_AI_EX_TRIG_ENABLE:
3144                 return me4000_ai_ex_trig_enable(ai_context);
3145         case ME4000_AI_EX_TRIG_DISABLE:
3146                 return me4000_ai_ex_trig_disable(ai_context);
3147         case ME4000_AI_EX_TRIG_SETUP:
3148                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3149                                                ai_context);
3150         case ME4000_GET_USER_INFO:
3151                 return me4000_get_user_info((struct me4000_user_info *)arg,
3152                                             ai_context->board_info);
3153         case ME4000_AI_OFFSET_ENABLE:
3154                 return me4000_ai_offset_enable(ai_context);
3155         case ME4000_AI_OFFSET_DISABLE:
3156                 return me4000_ai_offset_disable(ai_context);
3157         case ME4000_AI_FULLSCALE_ENABLE:
3158                 return me4000_ai_fullscale_enable(ai_context);
3159         case ME4000_AI_FULLSCALE_DISABLE:
3160                 return me4000_ai_fullscale_disable(ai_context);
3161         case ME4000_AI_EEPROM_READ:
3162                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3163                                                                 ai_context);
3164         case ME4000_AI_EEPROM_WRITE:
3165                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3166                                                                 ai_context);
3167         default:
3168                 printk(KERN_ERR
3169                        "me4000_ai_ioctl_sing():Invalid service number\n");
3170                 return -ENOTTY;
3171         }
3172         return 0;
3173 }
3174
3175 static int me4000_ai_single(struct me4000_ai_single *arg,
3176                             struct me4000_ai_context *ai_context)
3177 {
3178         struct me4000_ai_single cmd;
3179         int err;
3180         u32 tmp;
3181         wait_queue_head_t queue;
3182         unsigned long jiffy;
3183
3184         CALL_PDEBUG("me4000_ai_single() is executed\n");
3185
3186         init_waitqueue_head(&queue);
3187
3188         /* Copy data from user */
3189         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3190         if (err) {
3191                 printk(KERN_ERR
3192                        "ME4000:me4000_ai_single():Can't copy from user space\n");
3193                 return -EFAULT;
3194         }
3195
3196         /* Check range parameter */
3197         switch (cmd.range) {
3198         case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3199         case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3200         case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3201         case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3202                 break;
3203         default:
3204                 printk(KERN_ERR
3205                        "ME4000:me4000_ai_single():Invalid range specified\n");
3206                 return -EINVAL;
3207         }
3208
3209         /* Check mode and channel number */
3210         switch (cmd.mode) {
3211         case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3212                 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3213                         printk(KERN_ERR
3214                                "ME4000:me4000_ai_single():Analog input is not available\n");
3215                         return -EINVAL;
3216                 }
3217                 break;
3218         case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3219                 if (cmd.channel >=
3220                     ai_context->board_info->board_p->ai.diff_count) {
3221                         printk(KERN_ERR
3222                                "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3223                         return -EINVAL;
3224                 }
3225                 break;
3226         default:
3227                 printk(KERN_ERR
3228                        "ME4000:me4000_ai_single():Invalid mode specified\n");
3229                 return -EINVAL;
3230         }
3231
3232         /* Clear channel list, data fifo and both stop bits */
3233         tmp = me4000_inl(ai_context->ctrl_reg);
3234         tmp &=
3235             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3236               ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3237         me4000_outl(tmp, ai_context->ctrl_reg);
3238
3239         /* Enable channel list and data fifo */
3240         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3241         me4000_outl(tmp, ai_context->ctrl_reg);
3242
3243         /* Generate channel list entry */
3244         me4000_outl(cmd.channel | cmd.range | cmd.
3245                     mode | ME4000_AI_LIST_LAST_ENTRY,
3246                     ai_context->channel_list_reg);
3247
3248         /* Set the timer to maximum */
3249         me4000_outl(66, ai_context->chan_timer_reg);
3250         me4000_outl(66, ai_context->chan_pre_timer_reg);
3251
3252         if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3253                 jiffy = jiffies;
3254                 while (!
3255                        (me4000_inl(ai_context->status_reg) &
3256                         ME4000_AI_STATUS_BIT_EF_DATA)) {
3257                         interruptible_sleep_on_timeout(&queue, 1);
3258                         if (signal_pending(current)) {
3259                                 printk(KERN_ERR
3260                                        "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3261                                 return -EINTR;
3262                         }
3263                         if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) {        // 2.6 has diffrent definitions for HZ in user and kernel space
3264                                 printk(KERN_ERR
3265                                        "ME4000:me4000_ai_single():Timeout reached\n");
3266                                 return -EIO;
3267                         }
3268                 }
3269         } else {
3270                 /* Start conversion */
3271                 me4000_inl(ai_context->start_reg);
3272
3273                 /* Wait until ready */
3274                 udelay(10);
3275                 if (!
3276                     (me4000_inl(ai_context->status_reg) &
3277                      ME4000_AI_STATUS_BIT_EF_DATA)) {
3278                         printk(KERN_ERR
3279                                "ME4000:me4000_ai_single():Value not available after wait\n");
3280                         return -EIO;
3281                 }
3282         }
3283
3284         /* Read value from data fifo */
3285         cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3286
3287         /* Copy result back to user */
3288         err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3289         if (err) {
3290                 printk(KERN_ERR
3291                        "ME4000:me4000_ai_single():Can't copy to user space\n");
3292                 return -EFAULT;
3293         }
3294
3295         return 0;
3296 }
3297
3298 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3299                               unsigned int service, unsigned long arg)
3300 {
3301         struct me4000_ai_context *ai_context;
3302
3303         CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3304
3305         ai_context = file_p->private_data;
3306
3307         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3308                 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3309                 return -ENOTTY;
3310         }
3311         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3312                 printk(KERN_ERR
3313                        "me4000_ai_ioctl_sw():Service number to high\n");
3314                 return -ENOTTY;
3315         }
3316
3317         switch (service) {
3318         case ME4000_AI_SC_SETUP:
3319                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3320                                                                 ai_context);
3321         case ME4000_AI_CONFIG:
3322                 return me4000_ai_config((struct me4000_ai_config *)arg,
3323                                                                 ai_context);
3324         case ME4000_AI_START:
3325                 return me4000_ai_start(ai_context);
3326         case ME4000_AI_STOP:
3327                 return me4000_ai_stop(ai_context);
3328         case ME4000_AI_IMMEDIATE_STOP:
3329                 return me4000_ai_immediate_stop(ai_context);
3330         case ME4000_AI_FSM_STATE:
3331                 return me4000_ai_fsm_state((int *)arg, ai_context);
3332         case ME4000_GET_USER_INFO:
3333                 return me4000_get_user_info((struct me4000_user_info *)arg,
3334                                             ai_context->board_info);
3335         case ME4000_AI_EEPROM_READ:
3336                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3337                                                                 ai_context);
3338         case ME4000_AI_EEPROM_WRITE:
3339                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3340                                                                 ai_context);
3341         case ME4000_AI_GET_COUNT_BUFFER:
3342                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3343                                                   ai_context);
3344         default:
3345                 printk(KERN_ERR
3346                        "%s:Invalid service number %d\n", __func__, service);
3347                 return -ENOTTY;
3348         }
3349         return 0;
3350 }
3351
3352 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3353                                unsigned int service, unsigned long arg)
3354 {
3355         struct me4000_ai_context *ai_context;
3356
3357         CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3358
3359         ai_context = file_p->private_data;
3360
3361         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3362                 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3363                 return -ENOTTY;
3364         }
3365         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3366                 printk(KERN_ERR
3367                        "me4000_ai_ioctl_ext():Service number to high\n");
3368                 return -ENOTTY;
3369         }
3370
3371         switch (service) {
3372         case ME4000_AI_SC_SETUP:
3373                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3374                                                                 ai_context);
3375         case ME4000_AI_CONFIG:
3376                 return me4000_ai_config((struct me4000_ai_config *)arg,
3377                                                                 ai_context);
3378         case ME4000_AI_START:
3379                 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3380         case ME4000_AI_STOP:
3381                 return me4000_ai_stop(ai_context);
3382         case ME4000_AI_IMMEDIATE_STOP:
3383                 return me4000_ai_immediate_stop(ai_context);
3384         case ME4000_AI_EX_TRIG_ENABLE:
3385                 return me4000_ai_ex_trig_enable(ai_context);
3386         case ME4000_AI_EX_TRIG_DISABLE:
3387                 return me4000_ai_ex_trig_disable(ai_context);
3388         case ME4000_AI_EX_TRIG_SETUP:
3389                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3390                                                ai_context);
3391         case ME4000_AI_FSM_STATE:
3392                 return me4000_ai_fsm_state((int *)arg, ai_context);
3393         case ME4000_GET_USER_INFO:
3394                 return me4000_get_user_info((struct me4000_user_info *)arg,
3395                                             ai_context->board_info);
3396         case ME4000_AI_GET_COUNT_BUFFER:
3397                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3398                                                   ai_context);
3399         default:
3400                 printk(KERN_ERR
3401                        "%s:Invalid service number %d\n", __func__ , service);
3402                 return -ENOTTY;
3403         }
3404         return 0;
3405 }
3406
3407 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3408 {
3409         struct me4000_ai_context *ai_context;
3410
3411         CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3412
3413         ai_context = file_p->private_data;
3414         return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3415 }
3416
3417 static int me4000_ai_config(struct me4000_ai_config *arg,
3418                             struct me4000_ai_context *ai_context)
3419 {
3420         struct me4000_ai_config cmd;
3421         u32 *list = NULL;
3422         u32 mode;
3423         int i;
3424         int err;
3425         wait_queue_head_t queue;
3426         u64 scan;
3427         u32 tmp;
3428
3429         CALL_PDEBUG("me4000_ai_config() is executed\n");
3430
3431         init_waitqueue_head(&queue);
3432
3433         /* Check if conversion is stopped */
3434         if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3435                 printk(KERN_ERR
3436                        "ME4000:me4000_ai_config():Conversion is not stopped\n");
3437                 err = -EBUSY;
3438                 goto AI_CONFIG_ERR;
3439         }
3440
3441         /* Copy data from user */
3442         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3443         if (err) {
3444                 printk(KERN_ERR
3445                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3446                 err = -EFAULT;
3447                 goto AI_CONFIG_ERR;
3448         }
3449
3450         PDEBUG
3451             ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3452              cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3453              cmd.timer.scan_high, cmd.channel_list.count);
3454
3455         /* Check whether sample and hold is available for this board */
3456         if (cmd.sh) {
3457                 if (!ai_context->board_info->board_p->ai.sh_count) {
3458                         printk(KERN_ERR
3459                                "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3460                         err = -ENODEV;
3461                         goto AI_CONFIG_ERR;
3462                 }
3463         }
3464
3465         /* Check the channel list size */
3466         if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3467                 printk(KERN_ERR
3468                        "me4000_ai_config():Channel list is to large\n");
3469                 err = -EINVAL;
3470                 goto AI_CONFIG_ERR;
3471         }
3472
3473         /* Copy channel list from user */
3474         list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3475         if (!list) {
3476                 printk(KERN_ERR
3477                        "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3478                 err = -ENOMEM;
3479                 goto AI_CONFIG_ERR;
3480         }
3481         err =
3482             copy_from_user(list, cmd.channel_list.list,
3483                            sizeof(u32) * cmd.channel_list.count);
3484         if (err) {
3485                 printk(KERN_ERR
3486                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3487                 err = -EFAULT;
3488                 goto AI_CONFIG_ERR;
3489         }
3490
3491         /* Check if last entry bit is set */
3492         if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3493                 printk(KERN_WARNING
3494                        "me4000_ai_config():Last entry bit is not set\n");
3495                 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3496         }
3497
3498         /* Check whether mode is equal for all entries */
3499         mode = list[0] & 0x20;
3500         for (i = 0; i < cmd.channel_list.count; i++) {
3501                 if ((list[i] & 0x20) != mode) {
3502                         printk(KERN_ERR
3503                                "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3504                         err = -EINVAL;
3505                         goto AI_CONFIG_ERR;
3506                 }
3507         }
3508
3509         /* Check whether channels are available for this mode */
3510         if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3511                 for (i = 0; i < cmd.channel_list.count; i++) {
3512                         if ((list[i] & 0x1F) >=
3513                             ai_context->board_info->board_p->ai.count) {
3514                                 printk(KERN_ERR
3515                                        "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3516                                 err = -EINVAL;
3517                                 goto AI_CONFIG_ERR;
3518                         }
3519                 }
3520         } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3521                 for (i = 0; i < cmd.channel_list.count; i++) {
3522                         if ((list[i] & 0x1F) >=
3523                             ai_context->board_info->board_p->ai.diff_count) {
3524                                 printk(KERN_ERR
3525                                        "ME4000:me4000_ai_config():Channel is not available for differential\n");
3526                                 err = -EINVAL;
3527                                 goto AI_CONFIG_ERR;
3528                         }
3529                 }
3530         }
3531
3532         /* Check if bipolar is set for all entries when in differential mode */
3533         if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3534                 for (i = 0; i < cmd.channel_list.count; i++) {
3535                         if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3536                             && (list[i] & 0xC0) !=
3537                             ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3538                                 printk(KERN_ERR
3539                                        "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3540                                 err = -EINVAL;
3541                                 goto AI_CONFIG_ERR;
3542                         }
3543                 }
3544         }
3545
3546         if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3547                 /* Check for minimum channel divisor */
3548                 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3549                         printk(KERN_ERR
3550                                "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3551                         err = -EINVAL;
3552                         goto AI_CONFIG_ERR;
3553                 }
3554
3555                 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3556                 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3557                         printk(KERN_ERR
3558                                "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3559                         err = -EINVAL;
3560                         goto AI_CONFIG_ERR;
3561                 }
3562
3563                 /* Check for minimum channel pre divisor */
3564                 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3565                         printk(KERN_ERR
3566                                "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3567                         err = -EINVAL;
3568                         goto AI_CONFIG_ERR;
3569                 }
3570
3571                 /* Write the channel timers */
3572                 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3573                 me4000_outl(cmd.timer.pre_chan - 1,
3574                             ai_context->chan_pre_timer_reg);
3575
3576                 /* Save the timer values in the board context */
3577                 ai_context->chan_timer = cmd.timer.chan;
3578                 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3579
3580                 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3581                         /* Check for scan timer divisor */
3582                         scan =
3583                             (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3584                                                         scan_high << 32);
3585                         if (scan != 0) {
3586                                 if (scan <
3587                                     cmd.channel_list.count * cmd.timer.chan +
3588                                     1) {
3589                                         printk(KERN_ERR
3590                                                "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3591                                         err = -EINVAL;
3592                                         goto AI_CONFIG_ERR;
3593                                 }
3594                         }
3595
3596                         /* Write the scan timers */
3597                         if (scan != 0) {
3598                                 scan--;
3599                                 tmp = (u32) (scan & 0xFFFFFFFF);
3600                                 me4000_outl(tmp,
3601                                             ai_context->scan_timer_low_reg);
3602                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3603                                 me4000_outl(tmp,
3604                                             ai_context->scan_timer_high_reg);
3605
3606                                 scan =
3607                                     scan - (cmd.timer.chan - 1) +
3608                                     (cmd.timer.pre_chan - 1);
3609                                 tmp = (u32) (scan & 0xFFFFFFFF);
3610                                 me4000_outl(tmp,
3611                                             ai_context->scan_pre_timer_low_reg);
3612                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3613                                 me4000_outl(tmp,
3614                                             ai_context->
3615                                             scan_pre_timer_high_reg);
3616                         } else {
3617                                 me4000_outl(0x0,
3618                                             ai_context->scan_timer_low_reg);
3619                                 me4000_outl(0x0,
3620                                             ai_context->scan_timer_high_reg);
3621
3622                                 me4000_outl(0x0,
3623                                             ai_context->scan_pre_timer_low_reg);
3624                                 me4000_outl(0x0,
3625                                             ai_context->
3626                                             scan_pre_timer_high_reg);
3627                         }
3628
3629                         ai_context->scan_timer_low = cmd.timer.scan_low;
3630                         ai_context->scan_timer_high = cmd.timer.scan_high;
3631                 }
3632         }
3633
3634         /* Clear the channel list */
3635         tmp = me4000_inl(ai_context->ctrl_reg);
3636         tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3637         me4000_outl(tmp, ai_context->ctrl_reg);
3638         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3639         me4000_outl(tmp, ai_context->ctrl_reg);
3640
3641         /* Write the channel list */
3642         for (i = 0; i < cmd.channel_list.count; i++) {
3643                 me4000_outl(list[i], ai_context->channel_list_reg);
3644         }
3645
3646         /* Setup sample and hold */
3647         if (cmd.sh) {
3648                 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3649                 me4000_outl(tmp, ai_context->ctrl_reg);
3650         } else {
3651                 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3652                 me4000_outl(tmp, ai_context->ctrl_reg);
3653         }
3654
3655         /* Save the channel list size in the board context */
3656         ai_context->channel_list_count = cmd.channel_list.count;
3657
3658         kfree(list);
3659
3660         return 0;
3661
3662 AI_CONFIG_ERR:
3663
3664         /* Reset the timers */
3665         ai_context->chan_timer = 66;
3666         ai_context->chan_pre_timer = 66;
3667         ai_context->scan_timer_low = 0;
3668         ai_context->scan_timer_high = 0;
3669
3670         me4000_outl(65, ai_context->chan_timer_reg);
3671         me4000_outl(65, ai_context->chan_pre_timer_reg);
3672         me4000_outl(0, ai_context->scan_timer_high_reg);
3673         me4000_outl(0, ai_context->scan_timer_low_reg);
3674         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3675         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3676
3677         ai_context->channel_list_count = 0;
3678
3679         tmp = me4000_inl(ai_context->ctrl_reg);
3680         tmp &=
3681             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3682
3683         if (list)
3684                 kfree(list);
3685
3686         return err;
3687
3688 }
3689
3690 static int ai_common_start(struct me4000_ai_context *ai_context)
3691 {
3692         u32 tmp;
3693         CALL_PDEBUG("ai_common_start() is executed\n");
3694
3695         tmp = me4000_inl(ai_context->ctrl_reg);
3696
3697         /* Check if conversion is stopped */
3698         if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3699                 printk(KERN_ERR
3700                        "ME4000:ai_common_start():Conversion is not stopped\n");
3701                 return -EBUSY;
3702         }
3703
3704         /* Clear data fifo, disable all interrupts, clear sample counter reload */
3705         tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3706                  ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3707                  ME4000_AI_CTRL_BIT_SC_RELOAD);
3708
3709         me4000_outl(tmp, ai_context->ctrl_reg);
3710
3711         /* Clear circular buffer */
3712         ai_context->circ_buf.head = 0;
3713         ai_context->circ_buf.tail = 0;
3714
3715         /* Enable data fifo */
3716         tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3717
3718         /* Determine interrupt setup */
3719         if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3720                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3721                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3722         } else if (ai_context->sample_counter
3723                    && ai_context->sample_counter_reload) {
3724                 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3725                         /* Enable only Sample Counter Interrupt */
3726                         tmp |=
3727                             ME4000_AI_CTRL_BIT_SC_IRQ |
3728                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3729                 } else {
3730                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
3731                         tmp |=
3732                             ME4000_AI_CTRL_BIT_SC_IRQ |
3733                             ME4000_AI_CTRL_BIT_HF_IRQ |
3734                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3735                 }
3736         } else {
3737                 /* Enable only Half Full Interrupt */
3738                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3739         }
3740
3741         /* Clear the stop bits */
3742         tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3743
3744         /* Write setup to hardware */
3745         me4000_outl(tmp, ai_context->ctrl_reg);
3746
3747         /* Write sample counter */
3748         me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3749
3750         return 0;
3751 }
3752
3753 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3754 {
3755         int err;
3756         CALL_PDEBUG("me4000_ai_start() is executed\n");
3757
3758         /* Prepare Hardware */
3759         err = ai_common_start(ai_context);
3760         if (err)
3761                 return err;
3762
3763         /* Start conversion by dummy read */
3764         me4000_inl(ai_context->start_reg);
3765
3766         return 0;
3767 }
3768
3769 static int me4000_ai_start_ex(unsigned long *arg,
3770                               struct me4000_ai_context *ai_context)
3771 {
3772         int err;
3773         wait_queue_head_t queue;
3774         unsigned long ref;
3775         unsigned long timeout;
3776
3777         CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3778
3779         if (get_user(timeout, arg)) {
3780                 printk(KERN_ERR
3781                        "me4000_ai_start_ex():Cannot copy data from user\n");
3782                 return -EFAULT;
3783         }
3784
3785         init_waitqueue_head(&queue);
3786
3787         /* Prepare Hardware */
3788         err = ai_common_start(ai_context);
3789         if (err)
3790                 return err;
3791
3792         if (timeout) {
3793                 ref = jiffies;
3794                 while (!
3795                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3796                 {
3797                         interruptible_sleep_on_timeout(&queue, 1);
3798                         if (signal_pending(current)) {
3799                                 printk(KERN_ERR
3800                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3801                                 return -EINTR;
3802                         }
3803                         if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
3804                                 printk(KERN_ERR
3805                                        "ME4000:me4000_ai_start_ex():Timeout reached\n");
3806                                 return -EIO;
3807                         }
3808                 }
3809         } else {
3810                 while (!
3811                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3812                 {
3813                         interruptible_sleep_on_timeout(&queue, 1);
3814                         if (signal_pending(current)) {
3815                                 printk(KERN_ERR
3816                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3817                                 return -EINTR;
3818                         }
3819                 }
3820         }
3821
3822         return 0;
3823 }
3824
3825 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3826 {
3827         wait_queue_head_t queue;
3828         u32 tmp;
3829         unsigned long flags;
3830
3831         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3832
3833         init_waitqueue_head(&queue);
3834
3835         /* Disable irqs and clear data fifo */
3836         spin_lock_irqsave(&ai_context->int_lock, flags);
3837         tmp = me4000_inl(ai_context->ctrl_reg);
3838         tmp &=
3839             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3840               ME4000_AI_CTRL_BIT_DATA_FIFO);
3841         /* Stop conversion of the state machine */
3842         tmp |= ME4000_AI_CTRL_BIT_STOP;
3843         me4000_outl(tmp, ai_context->ctrl_reg);
3844         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3845
3846         /* Clear circular buffer */
3847         ai_context->circ_buf.head = 0;
3848         ai_context->circ_buf.tail = 0;
3849
3850         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3851                 interruptible_sleep_on_timeout(&queue, 1);
3852                 if (signal_pending(current)) {
3853                         printk(KERN_ERR
3854                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3855                         return -EINTR;
3856                 }
3857         }
3858
3859         return 0;
3860 }
3861
3862 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3863 {
3864         wait_queue_head_t queue;
3865         u32 tmp;
3866         unsigned long flags;
3867
3868         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3869
3870         init_waitqueue_head(&queue);
3871
3872         /* Disable irqs and clear data fifo */
3873         spin_lock_irqsave(&ai_context->int_lock, flags);
3874         tmp = me4000_inl(ai_context->ctrl_reg);
3875         tmp &=
3876             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3877               ME4000_AI_CTRL_BIT_DATA_FIFO);
3878         /* Stop conversion of the state machine */
3879         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3880         me4000_outl(tmp, ai_context->ctrl_reg);
3881         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3882
3883         /* Clear circular buffer */
3884         ai_context->circ_buf.head = 0;
3885         ai_context->circ_buf.tail = 0;
3886
3887         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3888                 interruptible_sleep_on_timeout(&queue, 1);
3889                 if (signal_pending(current)) {
3890                         printk(KERN_ERR
3891                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3892                         return -EINTR;
3893                 }
3894         }
3895
3896         return 0;
3897 }
3898
3899 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3900 {
3901         u32 tmp;
3902         unsigned long flags;
3903
3904         CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3905
3906         spin_lock_irqsave(&ai_context->int_lock, flags);
3907         tmp = me4000_inl(ai_context->ctrl_reg);
3908         tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3909         me4000_outl(tmp, ai_context->ctrl_reg);
3910         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3911
3912         return 0;
3913 }
3914
3915 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3916 {
3917         u32 tmp;
3918         unsigned long flags;
3919
3920         CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3921
3922         spin_lock_irqsave(&ai_context->int_lock, flags);
3923         tmp = me4000_inl(ai_context->ctrl_reg);
3924         tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3925         me4000_outl(tmp, ai_context->ctrl_reg);
3926         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3927
3928         return 0;
3929 }
3930
3931 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3932                                    struct me4000_ai_context *ai_context)
3933 {
3934         struct me4000_ai_trigger cmd;
3935         int err;
3936         u32 tmp;
3937         unsigned long flags;
3938
3939         CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3940
3941         /* Copy data from user */
3942         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3943         if (err) {
3944                 printk(KERN_ERR
3945                        "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3946                 return -EFAULT;
3947         }
3948
3949         spin_lock_irqsave(&ai_context->int_lock, flags);
3950         tmp = me4000_inl(ai_context->ctrl_reg);
3951
3952         if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3953                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3954         } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3955                 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3956                         printk(KERN_ERR
3957                                "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3958                         return -EINVAL;
3959                 }
3960                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3961         } else {
3962                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3963                 printk(KERN_ERR
3964                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3965                 return -EINVAL;
3966         }
3967
3968         if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3969                 tmp &=
3970                     ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3971                       ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3972         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3973                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3974                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3975         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3976                 tmp |=
3977                     ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3978                     ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3979         } else {
3980                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3981                 printk(KERN_ERR
3982                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3983                 return -EINVAL;
3984         }
3985
3986         me4000_outl(tmp, ai_context->ctrl_reg);
3987         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3988         return 0;
3989 }
3990
3991 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3992                               struct me4000_ai_context *ai_context)
3993 {
3994         struct me4000_ai_sc cmd;
3995         int err;
3996
3997         CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3998
3999         /* Copy data from user */
4000         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
4001         if (err) {
4002                 printk(KERN_ERR
4003                        "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
4004                 return -EFAULT;
4005         }
4006
4007         ai_context->sample_counter = cmd.value;
4008         ai_context->sample_counter_reload = cmd.reload;
4009
4010         return 0;
4011 }
4012
4013 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
4014                               loff_t *offp)
4015 {
4016         struct me4000_ai_context *ai_context = filep->private_data;
4017         s16 *buffer = (s16 *) buff;
4018         size_t count = cnt / 2;
4019         unsigned long flags;
4020         int tmp;
4021         int c = 0;
4022         int k = 0;
4023         int ret = 0;
4024         wait_queue_t wait;
4025
4026         CALL_PDEBUG("me4000_ai_read() is executed\n");
4027
4028         init_waitqueue_entry(&wait, current);
4029
4030         /* Check count */
4031         if (count <= 0) {
4032                 PDEBUG("me4000_ai_read():Count is 0\n");
4033                 return 0;
4034         }
4035
4036         while (count > 0) {
4037                 if (filep->f_flags & O_NONBLOCK) {
4038                         c = me4000_values_to_end(ai_context->circ_buf,
4039                                                  ME4000_AI_BUFFER_COUNT);
4040                         if (!c) {
4041                                 PDEBUG
4042                                     ("me4000_ai_read():Returning from nonblocking read\n");
4043                                 break;
4044                         }
4045                 } else {
4046                         /* Check if conversion is still running */
4047                         if (!
4048                             (me4000_inl(ai_context->status_reg) &
4049                              ME4000_AI_STATUS_BIT_FSM)) {
4050                                 printk(KERN_ERR
4051                                        "ME4000:me4000_ai_read():Conversion interrupted\n");
4052                                 return -EPIPE;
4053                         }
4054
4055                         wait_event_interruptible(ai_context->wait_queue,
4056                                                  (me4000_values_to_end
4057                                                   (ai_context->circ_buf,
4058                                                    ME4000_AI_BUFFER_COUNT)));
4059                         if (signal_pending(current)) {
4060                                 printk(KERN_ERR
4061                                        "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4062                                 return -EINTR;
4063                         }
4064                 }
4065
4066                 /* Only read count values or as much as available */
4067                 c = me4000_values_to_end(ai_context->circ_buf,
4068                                          ME4000_AI_BUFFER_COUNT);
4069                 PDEBUG("me4000_ai_read():%d values to end\n", c);
4070                 if (count < c)
4071                         c = count;
4072
4073                 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4074                 k = 2 * c;
4075                 k -= copy_to_user(buffer,
4076                                   ai_context->circ_buf.buf +
4077                                   ai_context->circ_buf.tail, k);
4078                 c = k / 2;
4079                 if (!c) {
4080                         printk(KERN_ERR
4081                                "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4082                         return -EFAULT;
4083                 }
4084
4085                 ai_context->circ_buf.tail =
4086                     (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4087                                                        1);
4088                 buffer += c;
4089                 count -= c;
4090                 ret += c;
4091
4092                 spin_lock_irqsave(&ai_context->int_lock, flags);
4093                 if (me4000_buf_space
4094                     (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4095                         tmp = me4000_inl(ai_context->ctrl_reg);
4096
4097                         /* Determine interrupt setup */
4098                         if (ai_context->sample_counter
4099                             && !ai_context->sample_counter_reload) {
4100                                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4101                                 tmp |=
4102                                     ME4000_AI_CTRL_BIT_SC_IRQ |
4103                                     ME4000_AI_CTRL_BIT_HF_IRQ;
4104                         } else if (ai_context->sample_counter
4105                                    && ai_context->sample_counter_reload) {
4106                                 if (ai_context->sample_counter <
4107                                     ME4000_AI_FIFO_COUNT / 2) {
4108                                         /* Enable only Sample Counter Interrupt */
4109                                         tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4110                                 } else {
4111                                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
4112                                         tmp |=
4113                                             ME4000_AI_CTRL_BIT_SC_IRQ |
4114                                             ME4000_AI_CTRL_BIT_HF_IRQ;
4115                                 }
4116                         } else {
4117                                 /* Enable only Half Full Interrupt */
4118                                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4119                         }
4120
4121                         me4000_outl(tmp, ai_context->ctrl_reg);
4122                 }
4123                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4124         }
4125
4126         /* Check if conversion is still running */
4127         if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4128                 printk(KERN_ERR
4129                        "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4130                 return -EPIPE;
4131         }
4132
4133         if (filep->f_flags & O_NONBLOCK) {
4134                 return (k == 0) ? -EAGAIN : 2 * ret;
4135         }
4136
4137         CALL_PDEBUG("me4000_ai_read() is leaved\n");
4138         return ret * 2;
4139 }
4140
4141 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4142 {
4143         struct me4000_ai_context *ai_context;
4144         unsigned long mask = 0;
4145
4146         CALL_PDEBUG("me4000_ai_poll() is executed\n");
4147
4148         ai_context = file_p->private_data;
4149
4150         /* Register wait queue */
4151         poll_wait(file_p, &ai_context->wait_queue, wait);
4152
4153         /* Get available values */
4154         if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4155                 mask |= POLLIN | POLLRDNORM;
4156
4157         PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4158
4159         return mask;
4160 }
4161
4162 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4163 {
4164         unsigned long tmp;
4165
4166         CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4167
4168         tmp = me4000_inl(ai_context->ctrl_reg);
4169         tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4170         me4000_outl(tmp, ai_context->ctrl_reg);
4171
4172         return 0;
4173 }
4174
4175 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4176 {
4177         unsigned long tmp;
4178
4179         CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4180
4181         tmp = me4000_inl(ai_context->ctrl_reg);
4182         tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4183         me4000_outl(tmp, ai_context->ctrl_reg);
4184
4185         return 0;
4186 }
4187
4188 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4189 {
4190         unsigned long tmp;
4191
4192         CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4193
4194         tmp = me4000_inl(ai_context->ctrl_reg);
4195         tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4196         me4000_outl(tmp, ai_context->ctrl_reg);
4197
4198         return 0;
4199 }
4200
4201 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4202 {
4203         unsigned long tmp;
4204
4205         CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4206
4207         tmp = me4000_inl(ai_context->ctrl_reg);
4208         tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4209         me4000_outl(tmp, ai_context->ctrl_reg);
4210
4211         return 0;
4212 }
4213
4214 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4215 {
4216         unsigned long tmp;
4217
4218         CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4219
4220         tmp =
4221             (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4222             : 0;
4223
4224         if (put_user(tmp, arg)) {
4225                 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4226                 return -EFAULT;
4227         }
4228
4229         return 0;
4230 }
4231
4232 static int me4000_ai_get_count_buffer(unsigned long *arg,
4233                                       struct me4000_ai_context *ai_context)
4234 {
4235         unsigned long c;
4236         int err;
4237
4238         c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4239
4240         err = copy_to_user(arg, &c, sizeof(unsigned long));
4241         if (err) {
4242                 printk(KERN_ERR
4243                        "%s:Can't copy to user space\n", __func__);
4244                 return -EFAULT;
4245         }
4246
4247         return 0;
4248 }
4249
4250 /*---------------------------------- EEPROM stuff ---------------------------*/
4251
4252 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4253                             int length)
4254 {
4255         int i;
4256         unsigned long value;
4257
4258         CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4259
4260         PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4261                cmd, length);
4262
4263         /* Get the ICR register and clear the related bits */
4264         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4265         value &= ~(PLX_ICR_MASK_EEPROM);
4266         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4267
4268         /* Raise the chip select */
4269         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4270         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4271         udelay(EEPROM_DELAY);
4272
4273         for (i = 0; i < length; i++) {
4274                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4275                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4276                 } else {
4277                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4278                 }
4279
4280                 /* Write to EEPROM */
4281                 me4000_outl(value,
4282                             ai_context->board_info->plx_regbase + PLX_ICR);
4283                 udelay(EEPROM_DELAY);
4284
4285                 /* Raising edge of the clock */
4286                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4287                 me4000_outl(value,
4288                             ai_context->board_info->plx_regbase + PLX_ICR);
4289                 udelay(EEPROM_DELAY);
4290
4291                 /* Falling edge of the clock */
4292                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4293                 me4000_outl(value,
4294                             ai_context->board_info->plx_regbase + PLX_ICR);
4295                 udelay(EEPROM_DELAY);
4296         }
4297
4298         /* Clear the chip select */
4299         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4300         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4301         udelay(EEPROM_DELAY);
4302
4303         /* Wait until hardware is ready for sure */
4304         mdelay(10);
4305
4306         return 0;
4307 }
4308
4309 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4310                                       unsigned long cmd, int length)
4311 {
4312         int i;
4313         unsigned long value;
4314         unsigned short id = 0;
4315
4316         CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4317
4318         PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4319                length);
4320
4321         /* Get the ICR register and clear the related bits */
4322         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4323         value &= ~(PLX_ICR_MASK_EEPROM);
4324
4325         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4326
4327         /* Raise the chip select */
4328         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4329         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4330         udelay(EEPROM_DELAY);
4331
4332         /* Write the read command to the eeprom */
4333         for (i = 0; i < length; i++) {
4334                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4335                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4336                 } else {
4337                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4338                 }
4339                 me4000_outl(value,
4340                             ai_context->board_info->plx_regbase + PLX_ICR);
4341                 udelay(EEPROM_DELAY);
4342
4343                 /* Raising edge of the clock */
4344                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4345                 me4000_outl(value,
4346                             ai_context->board_info->plx_regbase + PLX_ICR);
4347                 udelay(EEPROM_DELAY);
4348
4349                 /* Falling edge of the clock */
4350                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4351                 me4000_outl(value,
4352                             ai_context->board_info->plx_regbase + PLX_ICR);
4353                 udelay(EEPROM_DELAY);
4354         }
4355
4356         /* Read the value from the eeprom */
4357         for (i = 0; i < 16; i++) {
4358                 /* Raising edge of the clock */
4359                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4360                 me4000_outl(value,
4361                             ai_context->board_info->plx_regbase + PLX_ICR);
4362                 udelay(EEPROM_DELAY);
4363
4364                 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4365                     PLX_ICR_BIT_EEPROM_READ) {
4366                         id |= (0x8000 >> i);
4367                         PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4368                                (0x8000 >> i));
4369                 } else {
4370                         PDEBUG("eeprom_read_cmd():Dont't OR\n");
4371                 }
4372
4373                 /* Falling edge of the clock */
4374                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4375                 me4000_outl(value,
4376                             ai_context->board_info->plx_regbase + PLX_ICR);
4377                 udelay(EEPROM_DELAY);
4378         }
4379
4380         /* Clear the chip select */
4381         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4382         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4383         udelay(EEPROM_DELAY);
4384
4385         return id;
4386 }
4387
4388 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4389                                struct me4000_ai_context *ai_context)
4390 {
4391         int err;
4392         struct me4000_eeprom setup;
4393         unsigned long cmd;
4394         unsigned long date_high;
4395         unsigned long date_low;
4396
4397         CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4398
4399         err = copy_from_user(&setup, arg, sizeof(setup));
4400         if (err) {
4401                 printk(KERN_ERR
4402                        "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4403                 return err;
4404         }
4405
4406         /* Enable writing */
4407         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4408                          ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4409
4410         /* Command for date */
4411         date_high = (setup.date & 0xFFFF0000) >> 16;
4412         date_low = (setup.date & 0x0000FFFF);
4413
4414         cmd =
4415             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4416                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4417                                                                      (unsigned
4418                                                                       long)
4419                                                                      date_high);
4420         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4421         if (err)
4422                 return err;
4423
4424         cmd =
4425             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4426                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4427                                                                      (unsigned
4428                                                                       long)
4429                                                                      date_low);
4430         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4431         if (err)
4432                 return err;
4433
4434         /* Command for unipolar 10V offset */
4435         cmd =
4436             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4437                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4438                                                                      (unsigned
4439                                                                       long)
4440                                                                      setup.
4441                                                                      uni_10_offset);
4442         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4443         if (err)
4444                 return err;
4445
4446         /* Command for unipolar 10V fullscale */
4447         cmd =
4448             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4449                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4450                                                                      (unsigned
4451                                                                       long)
4452                                                                      setup.
4453                                                                      uni_10_fullscale);
4454         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4455         if (err)
4456                 return err;
4457
4458         /* Command for unipolar 2,5V offset */
4459         cmd =
4460             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4461                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4462                                                                      (unsigned
4463                                                                       long)
4464                                                                      setup.
4465                                                                      uni_2_5_offset);
4466         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4467         if (err)
4468                 return err;
4469
4470         /* Command for unipolar 2,5V fullscale */
4471         cmd =
4472             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4473                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4474                                                                      (unsigned
4475                                                                       long)
4476                                                                      setup.
4477                                                                      uni_2_5_fullscale);
4478         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4479         if (err)
4480                 return err;
4481
4482         /* Command for bipolar 10V offset */
4483         cmd =
4484             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4485                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4486                                                                      (unsigned
4487                                                                       long)
4488                                                                      setup.
4489                                                                      bi_10_offset);
4490         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4491         if (err)
4492                 return err;
4493
4494         /* Command for bipolar 10V fullscale */
4495         cmd =
4496             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4497                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4498                                                                      (unsigned
4499                                                                       long)
4500                                                                      setup.
4501                                                                      bi_10_fullscale);
4502         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4503         if (err)
4504                 return err;
4505
4506         /* Command for bipolar 2,5V offset */
4507         cmd =
4508             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4509                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4510                                                                      (unsigned
4511                                                                       long)
4512                                                                      setup.
4513                                                                      bi_2_5_offset);
4514         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4515         if (err)
4516                 return err;
4517
4518         /* Command for bipolar 2,5V fullscale */
4519         cmd =
4520             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4521                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4522                                                                      (unsigned
4523                                                                       long)
4524                                                                      setup.
4525                                                                      bi_2_5_fullscale);
4526         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4527         if (err)
4528                 return err;
4529
4530         /* Command for differential 10V offset */
4531         cmd =
4532             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4533                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4534                                                                      (unsigned
4535                                                                       long)
4536                                                                      setup.
4537                                                                      diff_10_offset);
4538         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4539         if (err)
4540                 return err;
4541
4542         /* Command for differential 10V fullscale */
4543         cmd =
4544             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4545                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4546                                                                         (unsigned
4547                                                                          long)
4548                                                                         setup.
4549                                                                         diff_10_fullscale);
4550         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4551         if (err)
4552                 return err;
4553
4554         /* Command for differential 2,5V offset */
4555         cmd =
4556             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4557                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4558                                                                      (unsigned
4559                                                                       long)
4560                                                                      setup.
4561                                                                      diff_2_5_offset);
4562         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4563         if (err)
4564                 return err;
4565
4566         /* Command for differential 2,5V fullscale */
4567         cmd =
4568             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4569                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4570                                                                         (unsigned
4571                                                                          long)
4572                                                                         setup.
4573                                                                         diff_2_5_fullscale);
4574         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4575         if (err)
4576                 return err;
4577
4578         /* Disable writing */
4579         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4580                          ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4581
4582         return 0;
4583 }
4584
4585 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4586                               struct me4000_ai_context *ai_context)
4587 {
4588         int err;
4589         unsigned long cmd;
4590         struct me4000_eeprom setup;
4591
4592         CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4593
4594         /* Command for date */
4595         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4596         setup.date =
4597             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4598         setup.date <<= 16;
4599         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4600         setup.date |=
4601             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4602
4603         /* Command for unipolar 10V offset */
4604         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4605         setup.uni_10_offset =
4606             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4607
4608         /* Command for unipolar 10V fullscale */
4609         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4610         setup.uni_10_fullscale =
4611             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4612
4613         /* Command for unipolar 2,5V offset */
4614         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4615         setup.uni_2_5_offset =
4616             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4617
4618         /* Command for unipolar 2,5V fullscale */
4619         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4620         setup.uni_2_5_fullscale =
4621             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4622
4623         /* Command for bipolar 10V offset */
4624         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4625         setup.bi_10_offset =
4626             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4627
4628         /* Command for bipolar 10V fullscale */
4629         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4630         setup.bi_10_fullscale =
4631             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4632
4633         /* Command for bipolar 2,5V offset */
4634         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4635         setup.bi_2_5_offset =
4636             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4637
4638         /* Command for bipolar 2,5V fullscale */
4639         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4640         setup.bi_2_5_fullscale =
4641             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4642
4643         /* Command for differntial 10V offset */
4644         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4645         setup.diff_10_offset =
4646             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4647
4648         /* Command for differential 10V fullscale */
4649         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4650         setup.diff_10_fullscale =
4651             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4652
4653         /* Command for differntial 2,5V offset */
4654         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4655         setup.diff_2_5_offset =
4656             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4657
4658         /* Command for differential 2,5V fullscale */
4659         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4660         setup.diff_2_5_fullscale =
4661             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4662
4663         err = copy_to_user(arg, &setup, sizeof(setup));
4664         if (err) {
4665                 printk(KERN_ERR
4666                        "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4667                 return err;
4668         }
4669
4670         return 0;
4671 }
4672
4673 /*------------------------------------ DIO stuff ----------------------------------------------*/
4674
4675 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4676                             unsigned int service, unsigned long arg)
4677 {
4678         struct me4000_dio_context *dio_context;
4679
4680         CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4681
4682         dio_context = file_p->private_data;
4683
4684         if (_IOC_TYPE(service) != ME4000_MAGIC) {
4685                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4686                 return -ENOTTY;
4687         }
4688         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4689                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4690                 return -ENOTTY;
4691         }
4692
4693         switch (service) {
4694         case ME4000_DIO_CONFIG:
4695                 return me4000_dio_config((struct me4000_dio_config *)arg,
4696                                          dio_context);
4697         case ME4000_DIO_SET_BYTE:
4698                 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4699                                            dio_context);
4700         case ME4000_DIO_GET_BYTE:
4701                 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4702                                            dio_context);
4703         case ME4000_DIO_RESET:
4704                 return me4000_dio_reset(dio_context);
4705         default:
4706                 printk(KERN_ERR
4707                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4708                        service);
4709                 return -ENOTTY;
4710         }
4711         return 0;
4712 }
4713
4714 static int me4000_dio_config(struct me4000_dio_config *arg,
4715                              struct me4000_dio_context *dio_context)
4716 {
4717         struct me4000_dio_config cmd;
4718         u32 tmp;
4719         int err;
4720
4721         CALL_PDEBUG("me4000_dio_config() is executed\n");
4722
4723         /* Copy data from user */
4724         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4725         if (err) {
4726                 printk(KERN_ERR
4727                        "ME4000:me4000_dio_config():Can't copy from user space\n");
4728                 return -EFAULT;
4729         }
4730
4731         /* Check port parameter */
4732         if (cmd.port >= dio_context->dio_count) {
4733                 printk(KERN_ERR
4734                        "ME4000:me4000_dio_config():Port %d is not available\n",
4735                        cmd.port);
4736                 return -EINVAL;
4737         }
4738
4739         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4740                cmd.mode, cmd.function);
4741
4742         if (cmd.port == ME4000_DIO_PORT_A) {
4743                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4744                         /* Check if opto isolated version */
4745                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4746                                 printk(KERN_ERR
4747                                        "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4748                                 return -EIO;
4749                         }
4750
4751                         tmp = me4000_inl(dio_context->ctrl_reg);
4752                         tmp &=
4753                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4754                               ME4000_DIO_CTRL_BIT_MODE_1);
4755                         me4000_outl(tmp, dio_context->ctrl_reg);
4756                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4757                         tmp = me4000_inl(dio_context->ctrl_reg);
4758                         tmp &=
4759                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4760                               ME4000_DIO_CTRL_BIT_MODE_1);
4761                         tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4762                         me4000_outl(tmp, dio_context->ctrl_reg);
4763                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4764                         tmp = me4000_inl(dio_context->ctrl_reg);
4765                         tmp &=
4766                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4767                               ME4000_DIO_CTRL_BIT_MODE_1 |
4768                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4769                         tmp |=
4770                             ME4000_DIO_CTRL_BIT_MODE_0 |
4771                             ME4000_DIO_CTRL_BIT_MODE_1;
4772                         me4000_outl(tmp, dio_context->ctrl_reg);
4773                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4774                         tmp = me4000_inl(dio_context->ctrl_reg);
4775                         tmp |=
4776                             ME4000_DIO_CTRL_BIT_MODE_0 |
4777                             ME4000_DIO_CTRL_BIT_MODE_1 |
4778                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4779                         me4000_outl(tmp, dio_context->ctrl_reg);
4780                 } else {
4781                         printk(KERN_ERR
4782                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4783                                cmd.mode);
4784                         return -EINVAL;
4785                 }
4786         } else if (cmd.port == ME4000_DIO_PORT_B) {
4787                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4788                         /* Only do anything when TTL version is installed */
4789                         if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4790                                 tmp = me4000_inl(dio_context->ctrl_reg);
4791                                 tmp &=
4792                                     ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4793                                       ME4000_DIO_CTRL_BIT_MODE_3);
4794                                 me4000_outl(tmp, dio_context->ctrl_reg);
4795                         }
4796                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4797                         /* Check if opto isolated version */
4798                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4799                                 printk(KERN_ERR
4800                                        "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4801                                 return -EIO;
4802                         }
4803
4804                         tmp = me4000_inl(dio_context->ctrl_reg);
4805                         tmp &=
4806                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4807                               ME4000_DIO_CTRL_BIT_MODE_3);
4808                         tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4809                         me4000_outl(tmp, dio_context->ctrl_reg);
4810                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4811                         /* Check if opto isolated version */
4812                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4813                                 printk(KERN_ERR
4814                                        "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4815                                 return -EIO;
4816                         }
4817
4818                         tmp = me4000_inl(dio_context->ctrl_reg);
4819                         tmp &=
4820                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4821                               ME4000_DIO_CTRL_BIT_MODE_3 |
4822                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4823                         tmp |=
4824                             ME4000_DIO_CTRL_BIT_MODE_2 |
4825                             ME4000_DIO_CTRL_BIT_MODE_3;
4826                         me4000_outl(tmp, dio_context->ctrl_reg);
4827                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4828                         /* Check if opto isolated version */
4829                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4830                                 printk(KERN_ERR
4831                                        "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4832                                 return -EIO;
4833                         }
4834
4835                         tmp = me4000_inl(dio_context->ctrl_reg);
4836                         tmp |=
4837                             ME4000_DIO_CTRL_BIT_MODE_2 |
4838                             ME4000_DIO_CTRL_BIT_MODE_3 |
4839                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4840                         me4000_outl(tmp, dio_context->ctrl_reg);
4841                 } else {
4842                         printk(KERN_ERR
4843                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4844                                cmd.mode);
4845                         return -EINVAL;
4846                 }
4847         } else if (cmd.port == ME4000_DIO_PORT_C) {
4848                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4849                         tmp = me4000_inl(dio_context->ctrl_reg);
4850                         tmp &=
4851                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4852                               ME4000_DIO_CTRL_BIT_MODE_5);
4853                         me4000_outl(tmp, dio_context->ctrl_reg);
4854                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4855                         tmp = me4000_inl(dio_context->ctrl_reg);
4856                         tmp &=
4857                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4858                               ME4000_DIO_CTRL_BIT_MODE_5);
4859                         tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4860                         me4000_outl(tmp, dio_context->ctrl_reg);
4861                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4862                         tmp = me4000_inl(dio_context->ctrl_reg);
4863                         tmp &=
4864                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4865                               ME4000_DIO_CTRL_BIT_MODE_5 |
4866                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4867                         tmp |=
4868                             ME4000_DIO_CTRL_BIT_MODE_4 |
4869                             ME4000_DIO_CTRL_BIT_MODE_5;
4870                         me4000_outl(tmp, dio_context->ctrl_reg);
4871                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4872                         tmp = me4000_inl(dio_context->ctrl_reg);
4873                         tmp |=
4874                             ME4000_DIO_CTRL_BIT_MODE_4 |
4875                             ME4000_DIO_CTRL_BIT_MODE_5 |
4876                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4877                         me4000_outl(tmp, dio_context->ctrl_reg);
4878                 } else {
4879                         printk(KERN_ERR
4880                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4881                                cmd.mode);
4882                         return -EINVAL;
4883                 }
4884         } else if (cmd.port == ME4000_DIO_PORT_D) {
4885                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4886                         tmp = me4000_inl(dio_context->ctrl_reg);
4887                         tmp &=
4888                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4889                               ME4000_DIO_CTRL_BIT_MODE_7);
4890                         me4000_outl(tmp, dio_context->ctrl_reg);
4891                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4892                         tmp = me4000_inl(dio_context->ctrl_reg);
4893                         tmp &=
4894                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4895                               ME4000_DIO_CTRL_BIT_MODE_7);
4896                         tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4897                         me4000_outl(tmp, dio_context->ctrl_reg);
4898                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4899                         tmp = me4000_inl(dio_context->ctrl_reg);
4900                         tmp &=
4901                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4902                               ME4000_DIO_CTRL_BIT_MODE_7 |
4903                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4904                         tmp |=
4905                             ME4000_DIO_CTRL_BIT_MODE_6 |
4906                             ME4000_DIO_CTRL_BIT_MODE_7;
4907                         me4000_outl(tmp, dio_context->ctrl_reg);
4908                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4909                         tmp = me4000_inl(dio_context->ctrl_reg);
4910                         tmp |=
4911                             ME4000_DIO_CTRL_BIT_MODE_6 |
4912                             ME4000_DIO_CTRL_BIT_MODE_7 |
4913                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4914                         me4000_outl(tmp, dio_context->ctrl_reg);
4915                 } else {
4916                         printk(KERN_ERR
4917                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4918                                cmd.mode);
4919                         return -EINVAL;
4920                 }
4921         } else {
4922                 printk(KERN_ERR
4923                        "ME4000:me4000_dio_config():Port %d is not available\n",
4924                        cmd.port);
4925                 return -EINVAL;
4926         }
4927
4928         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4929                cmd.mode, cmd.function);
4930
4931         if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4932             || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4933                 tmp = me4000_inl(dio_context->ctrl_reg);
4934                 tmp &=
4935                     ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4936                       ME4000_DIO_CTRL_BIT_FUNCTION_1);
4937                 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4938                         me4000_outl(tmp, dio_context->ctrl_reg);
4939                 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4940                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4941                         me4000_outl(tmp, dio_context->ctrl_reg);
4942                 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4943                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4944                         me4000_outl(tmp, dio_context->ctrl_reg);
4945                 } else {
4946                         printk(KERN_ERR
4947                                "ME4000:me4000_dio_config():Invalid port function specified\n");
4948                         return -EINVAL;
4949                 }
4950         }
4951
4952         return 0;
4953 }
4954
4955 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4956                                struct me4000_dio_context *dio_context)
4957 {
4958         struct me4000_dio_byte cmd;
4959         int err;
4960
4961         CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4962
4963         /* Copy data from user */
4964         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4965         if (err) {
4966                 printk(KERN_ERR
4967                        "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4968                 return -EFAULT;
4969         }
4970
4971         /* Check port parameter */
4972         if (cmd.port >= dio_context->dio_count) {
4973                 printk(KERN_ERR
4974                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4975                        cmd.port);
4976                 return -EINVAL;
4977         }
4978
4979         if (cmd.port == ME4000_DIO_PORT_A) {
4980                 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4981                         printk(KERN_ERR
4982                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4983                                cmd.port);
4984                         return -EIO;
4985                 }
4986                 me4000_outl(cmd.byte, dio_context->port_0_reg);
4987         } else if (cmd.port == ME4000_DIO_PORT_B) {
4988                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4989                         printk(KERN_ERR
4990                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4991                                cmd.port);
4992                         return -EIO;
4993                 }
4994                 me4000_outl(cmd.byte, dio_context->port_1_reg);
4995         } else if (cmd.port == ME4000_DIO_PORT_C) {
4996                 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4997                         printk(KERN_ERR
4998                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4999                                cmd.port);
5000                         return -EIO;
5001                 }
5002                 me4000_outl(cmd.byte, dio_context->port_2_reg);
5003         } else if (cmd.port == ME4000_DIO_PORT_D) {
5004                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
5005                         printk(KERN_ERR
5006                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5007                                cmd.port);
5008                         return -EIO;
5009                 }
5010                 me4000_outl(cmd.byte, dio_context->port_3_reg);
5011         } else {
5012                 printk(KERN_ERR
5013                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
5014                        cmd.port);
5015                 return -EINVAL;
5016         }
5017
5018         return 0;
5019 }
5020
5021 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
5022                                struct me4000_dio_context *dio_context)
5023 {
5024         struct me4000_dio_byte cmd;
5025         int err;
5026
5027         CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5028
5029         /* Copy data from user */
5030         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5031         if (err) {
5032                 printk(KERN_ERR
5033                        "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5034                 return -EFAULT;
5035         }
5036
5037         /* Check port parameter */
5038         if (cmd.port >= dio_context->dio_count) {
5039                 printk(KERN_ERR
5040                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5041                        cmd.port);
5042                 return -EINVAL;
5043         }
5044
5045         if (cmd.port == ME4000_DIO_PORT_A) {
5046                 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5047         } else if (cmd.port == ME4000_DIO_PORT_B) {
5048                 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5049         } else if (cmd.port == ME4000_DIO_PORT_C) {
5050                 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5051         } else if (cmd.port == ME4000_DIO_PORT_D) {
5052                 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5053         } else {
5054                 printk(KERN_ERR
5055                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5056                        cmd.port);
5057                 return -EINVAL;
5058         }
5059
5060         /* Copy result back to user */
5061         err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5062         if (err) {
5063                 printk(KERN_ERR
5064                        "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5065                 return -EFAULT;
5066         }
5067
5068         return 0;
5069 }
5070
5071 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5072 {
5073         CALL_PDEBUG("me4000_dio_reset() is executed\n");
5074
5075         /* Clear the control register */
5076         me4000_outl(0, dio_context->ctrl_reg);
5077
5078         /* Check for opto isolated version */
5079         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5080                 me4000_outl(0x1, dio_context->ctrl_reg);
5081                 me4000_outl(0x0, dio_context->port_0_reg);
5082         }
5083
5084         return 0;
5085 }
5086
5087 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5088
5089 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5090                             unsigned int service, unsigned long arg)
5091 {
5092         struct me4000_cnt_context *cnt_context;
5093
5094         CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5095
5096         cnt_context = file_p->private_data;
5097
5098         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5099                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5100                 return -ENOTTY;
5101         }
5102         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5103                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5104                 return -ENOTTY;
5105         }
5106
5107         switch (service) {
5108         case ME4000_CNT_READ:
5109                 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5110         case ME4000_CNT_WRITE:
5111                 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5112         case ME4000_CNT_CONFIG:
5113                 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5114                                          cnt_context);
5115         case ME4000_CNT_RESET:
5116                 return me4000_cnt_reset(cnt_context);
5117         default:
5118                 printk(KERN_ERR
5119                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5120                        service);
5121                 return -ENOTTY;
5122         }
5123         return 0;
5124 }
5125
5126 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5127                              struct me4000_cnt_context *cnt_context)
5128 {
5129         struct me4000_cnt_config cmd;
5130         u8 counter;
5131         u8 mode;
5132         int err;
5133
5134         CALL_PDEBUG("me4000_cnt_config() is executed\n");
5135
5136         /* Copy data from user */
5137         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5138         if (err) {
5139                 printk(KERN_ERR
5140                        "ME4000:me4000_cnt_config():Can't copy from user space\n");
5141                 return -EFAULT;
5142         }
5143
5144         /* Check counter parameter */
5145         switch (cmd.counter) {
5146         case ME4000_CNT_COUNTER_0:
5147                 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5148                 break;
5149         case ME4000_CNT_COUNTER_1:
5150                 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5151                 break;
5152         case ME4000_CNT_COUNTER_2:
5153                 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5154                 break;
5155         default:
5156                 printk(KERN_ERR
5157                        "ME4000:me4000_cnt_config():Counter %d is not available\n",
5158                        cmd.counter);
5159                 return -EINVAL;
5160         }
5161
5162         /* Check mode parameter */
5163         switch (cmd.mode) {
5164         case ME4000_CNT_MODE_0:
5165                 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5166                 break;
5167         case ME4000_CNT_MODE_1:
5168                 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5169                 break;
5170         case ME4000_CNT_MODE_2:
5171                 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5172                 break;
5173         case ME4000_CNT_MODE_3:
5174                 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5175                 break;
5176         case ME4000_CNT_MODE_4:
5177                 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5178                 break;
5179         case ME4000_CNT_MODE_5:
5180                 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5181                 break;
5182         default:
5183                 printk(KERN_ERR
5184                        "ME4000:me4000_cnt_config():Mode %d is not available\n",
5185                        cmd.mode);
5186                 return -EINVAL;
5187         }
5188
5189         /* Write the control word */
5190         me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5191
5192         return 0;
5193 }
5194
5195 static int me4000_cnt_read(struct me4000_cnt *arg,
5196                            struct me4000_cnt_context *cnt_context)
5197 {
5198         struct me4000_cnt cmd;
5199         u8 tmp;
5200         int err;
5201
5202         CALL_PDEBUG("me4000_cnt_read() is executed\n");
5203
5204         /* Copy data from user */
5205         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5206         if (err) {
5207                 printk(KERN_ERR
5208                        "ME4000:me4000_cnt_read():Can't copy from user space\n");
5209                 return -EFAULT;
5210         }
5211
5212         /* Read counter */
5213         switch (cmd.counter) {
5214         case ME4000_CNT_COUNTER_0:
5215                 tmp = me4000_inb(cnt_context->counter_0_reg);
5216                 cmd.value = tmp;
5217                 tmp = me4000_inb(cnt_context->counter_0_reg);
5218                 cmd.value |= ((u16) tmp) << 8;
5219                 break;
5220         case ME4000_CNT_COUNTER_1:
5221                 tmp = me4000_inb(cnt_context->counter_1_reg);
5222                 cmd.value = tmp;
5223                 tmp = me4000_inb(cnt_context->counter_1_reg);
5224                 cmd.value |= ((u16) tmp) << 8;
5225                 break;
5226         case ME4000_CNT_COUNTER_2:
5227                 tmp = me4000_inb(cnt_context->counter_2_reg);
5228                 cmd.value = tmp;
5229                 tmp = me4000_inb(cnt_context->counter_2_reg);
5230                 cmd.value |= ((u16) tmp) << 8;
5231                 break;
5232         default:
5233                 printk(KERN_ERR
5234                        "ME4000:me4000_cnt_read():Counter %d is not available\n",
5235                        cmd.counter);
5236                 return -EINVAL;
5237         }
5238
5239         /* Copy result back to user */
5240         err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5241         if (err) {
5242                 printk(KERN_ERR
5243                        "ME4000:me4000_cnt_read():Can't copy to user space\n");
5244                 return -EFAULT;
5245         }
5246
5247         return 0;
5248 }
5249
5250 static int me4000_cnt_write(struct me4000_cnt *arg,
5251                             struct me4000_cnt_context *cnt_context)
5252 {
5253         struct me4000_cnt cmd;
5254         u8 tmp;
5255         int err;
5256
5257         CALL_PDEBUG("me4000_cnt_write() is executed\n");
5258
5259         /* Copy data from user */
5260         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5261         if (err) {
5262                 printk(KERN_ERR
5263                        "ME4000:me4000_cnt_write():Can't copy from user space\n");
5264                 return -EFAULT;
5265         }
5266
5267         /* Write counter */
5268         switch (cmd.counter) {
5269         case ME4000_CNT_COUNTER_0:
5270                 tmp = cmd.value & 0xFF;
5271                 me4000_outb(tmp, cnt_context->counter_0_reg);
5272                 tmp = (cmd.value >> 8) & 0xFF;
5273                 me4000_outb(tmp, cnt_context->counter_0_reg);
5274                 break;
5275         case ME4000_CNT_COUNTER_1:
5276                 tmp = cmd.value & 0xFF;
5277                 me4000_outb(tmp, cnt_context->counter_1_reg);
5278                 tmp = (cmd.value >> 8) & 0xFF;
5279                 me4000_outb(tmp, cnt_context->counter_1_reg);
5280                 break;
5281         case ME4000_CNT_COUNTER_2:
5282                 tmp = cmd.value & 0xFF;
5283                 me4000_outb(tmp, cnt_context->counter_2_reg);
5284                 tmp = (cmd.value >> 8) & 0xFF;
5285                 me4000_outb(tmp, cnt_context->counter_2_reg);
5286                 break;
5287         default:
5288                 printk(KERN_ERR
5289                        "ME4000:me4000_cnt_write():Counter %d is not available\n",
5290                        cmd.counter);
5291                 return -EINVAL;
5292         }
5293
5294         return 0;
5295 }
5296
5297 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5298 {
5299         CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5300
5301         /* Set the mode and value for counter 0 */
5302         me4000_outb(0x30, cnt_context->ctrl_reg);
5303         me4000_outb(0x00, cnt_context->counter_0_reg);
5304         me4000_outb(0x00, cnt_context->counter_0_reg);
5305
5306         /* Set the mode and value for counter 1 */
5307         me4000_outb(0x70, cnt_context->ctrl_reg);
5308         me4000_outb(0x00, cnt_context->counter_1_reg);
5309         me4000_outb(0x00, cnt_context->counter_1_reg);
5310
5311         /* Set the mode and value for counter 2 */
5312         me4000_outb(0xB0, cnt_context->ctrl_reg);
5313         me4000_outb(0x00, cnt_context->counter_2_reg);
5314         me4000_outb(0x00, cnt_context->counter_2_reg);
5315
5316         return 0;
5317 }
5318
5319 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5320
5321 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5322                                 unsigned int service, unsigned long arg)
5323 {
5324         struct me4000_ext_int_context *ext_int_context;
5325
5326         CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5327
5328         ext_int_context = file_p->private_data;
5329
5330         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5331                 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5332                 return -ENOTTY;
5333         }
5334         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5335                 printk(KERN_ERR
5336                        "me4000_ext_int_ioctl():Service number to high\n");
5337                 return -ENOTTY;
5338         }
5339
5340         switch (service) {
5341         case ME4000_EXT_INT_ENABLE:
5342                 return me4000_ext_int_enable(ext_int_context);
5343         case ME4000_EXT_INT_DISABLE:
5344                 return me4000_ext_int_disable(ext_int_context);
5345         case ME4000_EXT_INT_COUNT:
5346                 return me4000_ext_int_count((unsigned long *)arg,
5347                                             ext_int_context);
5348         default:
5349                 printk(KERN_ERR
5350                        "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5351                        service);
5352                 return -ENOTTY;
5353         }
5354         return 0;
5355 }
5356
5357 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5358 {
5359         unsigned long tmp;
5360
5361         CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5362
5363         tmp = me4000_inl(ext_int_context->ctrl_reg);
5364         tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5365         me4000_outl(tmp, ext_int_context->ctrl_reg);
5366
5367         return 0;
5368 }
5369
5370 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5371 {
5372         unsigned long tmp;
5373
5374         CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5375
5376         tmp = me4000_inl(ext_int_context->ctrl_reg);
5377         tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5378         me4000_outl(tmp, ext_int_context->ctrl_reg);
5379
5380         return 0;
5381 }
5382
5383 static int me4000_ext_int_count(unsigned long *arg,
5384                                 struct me4000_ext_int_context *ext_int_context)
5385 {
5386
5387         CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5388
5389         put_user(ext_int_context->int_count, arg);
5390         return 0;
5391 }
5392
5393 /*------------------------------------ General stuff ------------------------------------*/
5394
5395 static int me4000_get_user_info(struct me4000_user_info *arg,
5396                                 struct me4000_info *board_info)
5397 {
5398         struct me4000_user_info user_info;
5399
5400         CALL_PDEBUG("me4000_get_user_info() is executed\n");
5401
5402         user_info.board_count = board_info->board_count;
5403         user_info.plx_regbase = board_info->plx_regbase;
5404         user_info.plx_regbase_size = board_info->plx_regbase_size;
5405         user_info.me4000_regbase = board_info->me4000_regbase;
5406         user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5407         user_info.serial_no = board_info->serial_no;
5408         user_info.hw_revision = board_info->hw_revision;
5409         user_info.vendor_id = board_info->vendor_id;
5410         user_info.device_id = board_info->device_id;
5411         user_info.pci_bus_no = board_info->pci_bus_no;
5412         user_info.pci_dev_no = board_info->pci_dev_no;
5413         user_info.pci_func_no = board_info->pci_func_no;
5414         user_info.irq = board_info->irq;
5415         user_info.irq_count = board_info->irq_count;
5416         user_info.driver_version = ME4000_DRIVER_VERSION;
5417         user_info.ao_count = board_info->board_p->ao.count;
5418         user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5419
5420         user_info.ai_count = board_info->board_p->ai.count;
5421         user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5422         user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5423
5424         user_info.dio_count = board_info->board_p->dio.count;
5425
5426         user_info.cnt_count = board_info->board_p->cnt.count;
5427
5428         if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5429                 return -EFAULT;
5430
5431         return 0;
5432 }
5433
5434 /*------------------------------------ ISR STUFF ------------------------------------*/
5435
5436 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5437 {
5438         int result = 0;
5439         struct me4000_ext_int_context *ext_int_context;
5440
5441         CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5442
5443         ext_int_context = file_ptr->private_data;
5444
5445         result =
5446             fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5447
5448         CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5449         return result;
5450 }
5451
5452 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5453 {
5454         u32 tmp;
5455         u32 value;
5456         struct me4000_ao_context *ao_context;
5457         int i;
5458         int c = 0;
5459         int c1 = 0;
5460         //unsigned long before;
5461         //unsigned long after;
5462
5463         ISR_PDEBUG("me4000_ao_isr() is executed\n");
5464
5465         ao_context = dev_id;
5466
5467         /* Check if irq number is right */
5468         if (irq != ao_context->irq) {
5469                 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5470                            irq);
5471                 return IRQ_NONE;
5472         }
5473
5474         /* Check if this DAC rised an interrupt */
5475         if (!
5476             ((0x1 << (ao_context->index + 3)) &
5477              me4000_inl(ao_context->irq_status_reg))) {
5478                 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5479                 return IRQ_NONE;
5480         }
5481
5482         /* Read status register to find out what happened */
5483         tmp = me4000_inl(ao_context->status_reg);
5484
5485         if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5486             && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5487                 c = ME4000_AO_FIFO_COUNT;
5488                 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5489         } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5490                    && (tmp & ME4000_AO_STATUS_BIT_HF)
5491                    && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5492                 c = ME4000_AO_FIFO_COUNT / 2;
5493                 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5494         } else {
5495                 c = 0;
5496                 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5497         }
5498
5499         ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5500
5501         while (1) {
5502                 c1 = me4000_values_to_end(ao_context->circ_buf,
5503                                           ME4000_AO_BUFFER_COUNT);
5504                 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5505                 if (c1 > c)
5506                         c1 = c;
5507
5508                 if (c1 <= 0) {
5509                         ISR_PDEBUG
5510                             ("me4000_ao_isr():Work done or buffer empty\n");
5511                         break;
5512                 }
5513                 //rdtscl(before);
5514                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5515                     ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5516                         for (i = 0; i < c1; i++) {
5517                                 value =
5518                                     ((u32)
5519                                      (*
5520                                       (ao_context->circ_buf.buf +
5521                                        ao_context->circ_buf.tail + i))) << 16;
5522                                 outl(value, ao_context->fifo_reg);
5523                         }
5524                 } else
5525                         outsw(ao_context->fifo_reg,
5526                               ao_context->circ_buf.buf +
5527                               ao_context->circ_buf.tail, c1);
5528
5529                 //rdtscl(after);
5530                 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5531
5532                 ao_context->circ_buf.tail =
5533                     (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5534                                                         1);
5535                 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5536                            c1, ao_context->fifo_reg);
5537                 c -= c1;
5538         }
5539
5540         /* If there are no values left in the buffer, disable interrupts */
5541         spin_lock(&ao_context->int_lock);
5542         if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5543                 ISR_PDEBUG
5544                     ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5545                 tmp = me4000_inl(ao_context->ctrl_reg);
5546                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5547                 me4000_outl(tmp, ao_context->ctrl_reg);
5548         }
5549         spin_unlock(&ao_context->int_lock);
5550
5551         /* Reset the interrupt */
5552         spin_lock(&ao_context->int_lock);
5553         tmp = me4000_inl(ao_context->ctrl_reg);
5554         tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5555         me4000_outl(tmp, ao_context->ctrl_reg);
5556         tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5557         me4000_outl(tmp, ao_context->ctrl_reg);
5558
5559         /* If state machine is stopped, flow was interrupted */
5560         if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5561                 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5562                 ao_context->pipe_flag = 1;      // Set flag in order to inform write routine
5563                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;  // Disable interrupt
5564         }
5565         me4000_outl(tmp, ao_context->ctrl_reg);
5566         spin_unlock(&ao_context->int_lock);
5567
5568         /* Wake up waiting process */
5569         wake_up_interruptible(&(ao_context->wait_queue));
5570
5571         /* Count the interrupt */
5572         ao_context->board_info->irq_count++;
5573
5574         return IRQ_HANDLED;
5575 }
5576
5577 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5578 {
5579         u32 tmp;
5580         struct me4000_ai_context *ai_context;
5581         int i;
5582         int c = 0;
5583         int c1 = 0;
5584 #ifdef ME4000_ISR_DEBUG
5585         unsigned long before;
5586         unsigned long after;
5587 #endif
5588
5589         ISR_PDEBUG("me4000_ai_isr() is executed\n");
5590
5591 #ifdef ME4000_ISR_DEBUG
5592         rdtscl(before);
5593 #endif
5594
5595         ai_context = dev_id;
5596
5597         /* Check if irq number is right */
5598         if (irq != ai_context->irq) {
5599                 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5600                            irq);
5601                 return IRQ_NONE;
5602         }
5603
5604         if (me4000_inl(ai_context->irq_status_reg) &
5605             ME4000_IRQ_STATUS_BIT_AI_HF) {
5606                 ISR_PDEBUG
5607                     ("me4000_ai_isr():Fifo half full interrupt occured\n");
5608
5609                 /* Read status register to find out what happened */
5610                 tmp = me4000_inl(ai_context->ctrl_reg);
5611
5612                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5613                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5614                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5615                         ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5616                         c = ME4000_AI_FIFO_COUNT;
5617
5618                         /* FIFO overflow, so stop conversion and disable all interrupts */
5619                         spin_lock(&ai_context->int_lock);
5620                         tmp = me4000_inl(ai_context->ctrl_reg);
5621                         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5622                         tmp &=
5623                             ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5624                               ME4000_AI_CTRL_BIT_SC_IRQ);
5625                         outl(tmp, ai_context->ctrl_reg);
5626                         spin_unlock(&ai_context->int_lock);
5627                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5628                            !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5629                            && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5630                         ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5631                         c = ME4000_AI_FIFO_COUNT / 2;
5632                 } else {
5633                         c = 0;
5634                         ISR_PDEBUG
5635                             ("me4000_ai_isr():Can't determine state of fifo\n");
5636                 }
5637
5638                 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5639
5640                 while (1) {
5641                         c1 = me4000_space_to_end(ai_context->circ_buf,
5642                                                  ME4000_AI_BUFFER_COUNT);
5643                         ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5644                         if (c1 > c)
5645                                 c1 = c;
5646
5647                         if (c1 <= 0) {
5648                                 ISR_PDEBUG
5649                                     ("me4000_ai_isr():Work done or buffer full\n");
5650                                 break;
5651                         }
5652
5653                         insw(ai_context->data_reg,
5654                              ai_context->circ_buf.buf +
5655                              ai_context->circ_buf.head, c1);
5656                         ai_context->circ_buf.head =
5657                             (ai_context->circ_buf.head +
5658                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5659                         c -= c1;
5660                 }
5661
5662                 /* Work is done, so reset the interrupt */
5663                 ISR_PDEBUG
5664                     ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5665                 spin_lock(&ai_context->int_lock);
5666                 tmp = me4000_inl(ai_context->ctrl_reg);
5667                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5668                 me4000_outl(tmp, ai_context->ctrl_reg);
5669                 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5670                 me4000_outl(tmp, ai_context->ctrl_reg);
5671                 spin_unlock(&ai_context->int_lock);
5672         }
5673
5674         if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5675                 ISR_PDEBUG
5676                     ("me4000_ai_isr():Sample counter interrupt occured\n");
5677
5678                 if (!ai_context->sample_counter_reload) {
5679                         ISR_PDEBUG
5680                             ("me4000_ai_isr():Single data block available\n");
5681
5682                         /* Poll data until fifo empty */
5683                         for (i = 0;
5684                              (i < ME4000_AI_FIFO_COUNT / 2)
5685                              && (inl(ai_context->ctrl_reg) &
5686                                  ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5687                                 if (me4000_space_to_end
5688                                     (ai_context->circ_buf,
5689                                      ME4000_AI_BUFFER_COUNT)) {
5690                                         *(ai_context->circ_buf.buf +
5691                                           ai_context->circ_buf.head) =
5692                  inw(ai_context->data_reg);
5693                                         ai_context->circ_buf.head =
5694                                             (ai_context->circ_buf.head +
5695                                              1) & (ME4000_AI_BUFFER_COUNT - 1);
5696                                 } else
5697                                         break;
5698                         }
5699                         ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5700                 } else {
5701                         if (ai_context->sample_counter <=
5702                             ME4000_AI_FIFO_COUNT / 2) {
5703                                 ISR_PDEBUG
5704                                     ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5705
5706                                 /* Read status register to find out what happened */
5707                                 tmp = me4000_inl(ai_context->ctrl_reg);
5708
5709                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5710                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5711                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5712                                         ISR_PDEBUG
5713                                             ("me4000_ai_isr():Fifo full\n");
5714                                         c = ME4000_AI_FIFO_COUNT;
5715
5716                                         /* FIFO overflow, so stop conversion */
5717                                         spin_lock(&ai_context->int_lock);
5718                                         tmp = me4000_inl(ai_context->ctrl_reg);
5719                                         tmp |=
5720                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5721                                         outl(tmp, ai_context->ctrl_reg);
5722                                         spin_unlock(&ai_context->int_lock);
5723                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5724                                            && !(tmp &
5725                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5726                                            && (tmp &
5727                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5728                                         ISR_PDEBUG
5729                                             ("me4000_ai_isr():Fifo half full\n");
5730                                         c = ME4000_AI_FIFO_COUNT / 2;
5731                                 } else {
5732                                         c = ai_context->sample_counter;
5733                                         ISR_PDEBUG
5734                                             ("me4000_ai_isr():Sample count values\n");
5735                                 }
5736
5737                                 ISR_PDEBUG
5738                                     ("me4000_ai_isr():Try to read %d values\n",
5739                                      c);
5740
5741                                 while (1) {
5742                                         c1 = me4000_space_to_end(ai_context->
5743                                                                  circ_buf,
5744                                                                  ME4000_AI_BUFFER_COUNT);
5745                                         ISR_PDEBUG
5746                                             ("me4000_ai_isr():Space to end = %d\n",
5747                                              c1);
5748                                         if (c1 > c)
5749                                                 c1 = c;
5750
5751                                         if (c1 <= 0) {
5752                                                 ISR_PDEBUG
5753                                                     ("me4000_ai_isr():Work done or buffer full\n");
5754                                                 break;
5755                                         }
5756
5757                                         insw(ai_context->data_reg,
5758                                              ai_context->circ_buf.buf +
5759                                              ai_context->circ_buf.head, c1);
5760                                         ai_context->circ_buf.head =
5761                                             (ai_context->circ_buf.head +
5762                                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5763                                         c -= c1;
5764                                 }
5765                         } else {
5766                                 ISR_PDEBUG
5767                                     ("me4000_ai_isr():Multiple data block available\n");
5768
5769                                 /* Read status register to find out what happened */
5770                                 tmp = me4000_inl(ai_context->ctrl_reg);
5771
5772                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5773                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5774                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5775                                         ISR_PDEBUG
5776                                             ("me4000_ai_isr():Fifo full\n");
5777                                         c = ME4000_AI_FIFO_COUNT;
5778
5779                                         /* FIFO overflow, so stop conversion */
5780                                         spin_lock(&ai_context->int_lock);
5781                                         tmp = me4000_inl(ai_context->ctrl_reg);
5782                                         tmp |=
5783                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5784                                         outl(tmp, ai_context->ctrl_reg);
5785                                         spin_unlock(&ai_context->int_lock);
5786
5787                                         while (1) {
5788                                                 c1 = me4000_space_to_end
5789                                                     (ai_context->circ_buf,
5790                                                      ME4000_AI_BUFFER_COUNT);
5791                                                 ISR_PDEBUG
5792                                                     ("me4000_ai_isr():Space to end = %d\n",
5793                                                      c1);
5794                                                 if (c1 > c)
5795                                                         c1 = c;
5796
5797                                                 if (c1 <= 0) {
5798                                                         ISR_PDEBUG
5799                                                             ("me4000_ai_isr():Work done or buffer full\n");
5800                                                         break;
5801                                                 }
5802
5803                                                 insw(ai_context->data_reg,
5804                                                      ai_context->circ_buf.buf +
5805                                                      ai_context->circ_buf.head,
5806                                                      c1);
5807                                                 ai_context->circ_buf.head =
5808                                                     (ai_context->circ_buf.head +
5809                                                      c1) &
5810                                                     (ME4000_AI_BUFFER_COUNT -
5811                                                      1);
5812                                                 c -= c1;
5813                                         }
5814                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5815                                            && !(tmp &
5816                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5817                                            && (tmp &
5818                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5819                                         ISR_PDEBUG
5820                                             ("me4000_ai_isr():Fifo half full\n");
5821                                         c = ME4000_AI_FIFO_COUNT / 2;
5822
5823                                         while (1) {
5824                                                 c1 = me4000_space_to_end
5825                                                     (ai_context->circ_buf,
5826                                                      ME4000_AI_BUFFER_COUNT);
5827                                                 ISR_PDEBUG
5828                                                     ("me4000_ai_isr():Space to end = %d\n",
5829                                                      c1);
5830                                                 if (c1 > c)
5831                                                         c1 = c;
5832
5833                                                 if (c1 <= 0) {
5834                                                         ISR_PDEBUG
5835                                                             ("me4000_ai_isr():Work done or buffer full\n");
5836                                                         break;
5837                                                 }
5838
5839                                                 insw(ai_context->data_reg,
5840                                                      ai_context->circ_buf.buf +
5841                                                      ai_context->circ_buf.head,
5842                                                      c1);
5843                                                 ai_context->circ_buf.head =
5844                                                     (ai_context->circ_buf.head +
5845                                                      c1) &
5846                                                     (ME4000_AI_BUFFER_COUNT -
5847                                                      1);
5848                                                 c -= c1;
5849                                         }
5850                                 } else {
5851                                         /* Poll data until fifo empty */
5852                                         for (i = 0;
5853                                              (i < ME4000_AI_FIFO_COUNT / 2)
5854                                              && (inl(ai_context->ctrl_reg) &
5855                                                  ME4000_AI_STATUS_BIT_EF_DATA);
5856                                              i++) {
5857                                                 if (me4000_space_to_end
5858                                                     (ai_context->circ_buf,
5859                                                      ME4000_AI_BUFFER_COUNT)) {
5860                                                         *(ai_context->circ_buf.
5861                                                           buf +
5862                                                           ai_context->circ_buf.
5863                                                           head) =
5864                                        inw(ai_context->data_reg);
5865                                                         ai_context->circ_buf.
5866                                                             head =
5867                                                             (ai_context->
5868                                                              circ_buf.head +
5869                                                              1) &
5870                                                             (ME4000_AI_BUFFER_COUNT
5871                                                              - 1);
5872                                                 } else
5873                                                         break;
5874                                         }
5875                                         ISR_PDEBUG
5876                                             ("me4000_ai_isr():%d values read\n",
5877                                              i);
5878                                 }
5879                         }
5880                 }
5881
5882                 /* Work is done, so reset the interrupt */
5883                 ISR_PDEBUG
5884                     ("me4000_ai_isr():reset interrupt from sample counter\n");
5885                 spin_lock(&ai_context->int_lock);
5886                 tmp = me4000_inl(ai_context->ctrl_reg);
5887                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5888                 me4000_outl(tmp, ai_context->ctrl_reg);
5889                 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5890                 me4000_outl(tmp, ai_context->ctrl_reg);
5891                 spin_unlock(&ai_context->int_lock);
5892         }
5893
5894         /* Values are now available, so wake up waiting process */
5895         if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5896                 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5897                 wake_up_interruptible(&(ai_context->wait_queue));
5898         }
5899
5900         /* If there is no space left in the buffer, disable interrupts */
5901         spin_lock(&ai_context->int_lock);
5902         if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5903                 ISR_PDEBUG
5904                     ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5905                 tmp = me4000_inl(ai_context->ctrl_reg);
5906                 tmp &=
5907                     ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5908                       ME4000_AI_CTRL_BIT_LE_IRQ);
5909                 me4000_outl(tmp, ai_context->ctrl_reg);
5910         }
5911         spin_unlock(&ai_context->int_lock);
5912
5913 #ifdef ME4000_ISR_DEBUG
5914         rdtscl(after);
5915         printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5916                after - before);
5917 #endif
5918
5919         return IRQ_HANDLED;
5920 }
5921
5922 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5923 {
5924         struct me4000_ext_int_context *ext_int_context;
5925         unsigned long tmp;
5926
5927         ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5928
5929         ext_int_context = dev_id;
5930
5931         /* Check if irq number is right */
5932         if (irq != ext_int_context->irq) {
5933                 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5934                            irq);
5935                 return IRQ_NONE;
5936         }
5937
5938         if (me4000_inl(ext_int_context->irq_status_reg) &
5939             ME4000_IRQ_STATUS_BIT_EX) {
5940                 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5941                 tmp = me4000_inl(ext_int_context->ctrl_reg);
5942                 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5943                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5944                 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5945                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5946
5947                 ext_int_context->int_count++;
5948
5949                 if (ext_int_context->fasync_ptr) {
5950                         ISR_PDEBUG
5951                             ("me2600_ext_int_isr():Send signal to process\n");
5952                         kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5953                                     POLL_IN);
5954                 }
5955         }
5956
5957         return IRQ_HANDLED;
5958 }
5959
5960 static void __exit me4000_module_exit(void)
5961 {
5962         struct list_head *board_p;
5963         struct me4000_info *board_info;
5964
5965         CALL_PDEBUG("cleanup_module() is executed\n");
5966
5967         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5968
5969         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5970
5971         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5972
5973         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5974
5975         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5976
5977         remove_proc_entry("me4000", NULL);
5978
5979         pci_unregister_driver(&me4000_driver);
5980
5981         /* Reset the boards */
5982         for (board_p = me4000_board_info_list.next;
5983              board_p != &me4000_board_info_list; board_p = board_p->next) {
5984                 board_info = list_entry(board_p, struct me4000_info, list);
5985                 me4000_reset_board(board_info);
5986         }
5987
5988         clear_board_info_list();
5989 }
5990
5991 module_exit(me4000_module_exit);
5992
5993 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5994                                int *eof, void *data)
5995 {
5996         int len = 0;
5997         int limit = count - 1000;
5998         struct me4000_info *board_info;
5999         struct list_head *ptr;
6000
6001         len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
6002                        (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
6003                        (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
6004                        (ME4000_DRIVER_VERSION & 0xFF));
6005
6006         /* Search for the board context */
6007         for (ptr = me4000_board_info_list.next;
6008              (ptr != &me4000_board_info_list) && (len < limit);
6009              ptr = ptr->next) {
6010                 board_info = list_entry(ptr, struct me4000_info, list);
6011
6012                 len +=
6013                     sprintf(buf + len, "Board number %d:\n",
6014                             board_info->board_count);
6015                 len += sprintf(buf + len, "---------------\n");
6016                 len +=
6017                     sprintf(buf + len, "PLX base register = 0x%lX\n",
6018                             board_info->plx_regbase);
6019                 len +=
6020                     sprintf(buf + len, "PLX base register size = 0x%X\n",
6021                             (unsigned int)board_info->plx_regbase_size);
6022                 len +=
6023                     sprintf(buf + len, "ME4000 base register = 0x%X\n",
6024                             (unsigned int)board_info->me4000_regbase);
6025                 len +=
6026                     sprintf(buf + len, "ME4000 base register size = 0x%X\n",
6027                             (unsigned int)board_info->me4000_regbase_size);
6028                 len +=
6029                     sprintf(buf + len, "Serial number = 0x%X\n",
6030                             board_info->serial_no);
6031                 len +=
6032                     sprintf(buf + len, "Hardware revision = 0x%X\n",
6033                             board_info->hw_revision);
6034                 len +=
6035                     sprintf(buf + len, "Vendor id = 0x%X\n",
6036                             board_info->vendor_id);
6037                 len +=
6038                     sprintf(buf + len, "Device id = 0x%X\n",
6039                             board_info->device_id);
6040                 len +=
6041                     sprintf(buf + len, "PCI bus number = %d\n",
6042                             board_info->pci_bus_no);
6043                 len +=
6044                     sprintf(buf + len, "PCI device number = %d\n",
6045                             board_info->pci_dev_no);
6046                 len +=
6047                     sprintf(buf + len, "PCI function number = %d\n",
6048                             board_info->pci_func_no);
6049                 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6050                 len +=
6051                     sprintf(buf + len,
6052                             "Count of interrupts since module was loaded = %d\n",
6053                             board_info->irq_count);
6054
6055                 len +=
6056                     sprintf(buf + len, "Count of analog outputs = %d\n",
6057                             board_info->board_p->ao.count);
6058                 len +=
6059                     sprintf(buf + len, "Count of analog output fifos = %d\n",
6060                             board_info->board_p->ao.fifo_count);
6061
6062                 len +=
6063                     sprintf(buf + len, "Count of analog inputs = %d\n",
6064                             board_info->board_p->ai.count);
6065                 len +=
6066                     sprintf(buf + len,
6067                             "Count of sample and hold devices for analog input = %d\n",
6068                             board_info->board_p->ai.sh_count);
6069                 len +=
6070                     sprintf(buf + len,
6071                             "Analog external trigger available for analog input = %d\n",
6072                             board_info->board_p->ai.ex_trig_analog);
6073
6074                 len +=
6075                     sprintf(buf + len, "Count of digital ports = %d\n",
6076                             board_info->board_p->dio.count);
6077
6078                 len +=
6079                     sprintf(buf + len, "Count of counter devices = %d\n",
6080                             board_info->board_p->cnt.count);
6081                 len +=
6082                     sprintf(buf + len, "AI control register = 0x%08X\n",
6083                             inl(board_info->me4000_regbase +
6084                                 ME4000_AI_CTRL_REG));
6085
6086                 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6087                                inl(board_info->me4000_regbase +
6088                                    ME4000_AO_00_CTRL_REG));
6089                 len +=
6090                     sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6091                             inl(board_info->me4000_regbase +
6092                                 ME4000_AO_00_STATUS_REG));
6093                 len +=
6094                     sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6095                             inl(board_info->me4000_regbase +
6096                                 ME4000_AO_01_CTRL_REG));
6097                 len +=
6098                     sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6099                             inl(board_info->me4000_regbase +
6100                                 ME4000_AO_01_STATUS_REG));
6101                 len +=
6102                     sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6103                             inl(board_info->me4000_regbase +
6104                                 ME4000_AO_02_CTRL_REG));
6105                 len +=
6106                     sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6107                             inl(board_info->me4000_regbase +
6108                                 ME4000_AO_02_STATUS_REG));
6109                 len +=
6110                     sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6111                             inl(board_info->me4000_regbase +
6112                                 ME4000_AO_03_CTRL_REG));
6113                 len +=
6114                     sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6115                             inl(board_info->me4000_regbase +
6116                                 ME4000_AO_03_STATUS_REG));
6117         }
6118
6119         *eof = 1;
6120         return len;
6121 }