2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2008 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
26 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
27 #include <linux/kgdb.h>
28 #include <asm/irq_regs.h>
32 #include <mach/bfin_serial_5xx.h>
34 #ifdef CONFIG_SERIAL_BFIN_DMA
35 #include <linux/dma-mapping.h>
38 #include <asm/cacheflush.h>
41 /* UART name and device definitions */
42 #define BFIN_SERIAL_NAME "ttyBF"
43 #define BFIN_SERIAL_MAJOR 204
44 #define BFIN_SERIAL_MINOR 64
46 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
47 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
49 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
50 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
52 # ifndef CONFIG_SERIAL_BFIN_PIO
53 # error KGDB only support UART in PIO mode.
56 static int kgdboc_port_line;
57 static int kgdboc_break_enabled;
60 * Setup for console. Argument comes from the menuconfig
62 #define DMA_RX_XCOUNT 512
63 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
65 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
67 #ifdef CONFIG_SERIAL_BFIN_DMA
68 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
70 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
73 static void bfin_serial_reset_irda(struct uart_port *port);
76 * interrupts are disabled on entry
78 static void bfin_serial_stop_tx(struct uart_port *port)
80 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
81 #ifdef CONFIG_SERIAL_BFIN_DMA
82 struct circ_buf *xmit = &uart->port.info->xmit;
85 while (!(UART_GET_LSR(uart) & TEMT))
88 #ifdef CONFIG_SERIAL_BFIN_DMA
89 disable_dma(uart->tx_dma_channel);
90 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
91 uart->port.icount.tx += uart->tx_count;
97 UART_PUT_LSR(uart, TFI);
99 UART_CLEAR_IER(uart, ETBEI);
104 * port is locked and interrupts are disabled
106 static void bfin_serial_start_tx(struct uart_port *port)
108 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
109 struct tty_struct *tty = uart->port.info->port.tty;
112 * To avoid losting RX interrupt, we reset IR function
113 * before sending data.
115 if (tty->termios->c_line == N_IRDA)
116 bfin_serial_reset_irda(port);
118 #ifdef CONFIG_SERIAL_BFIN_DMA
120 bfin_serial_dma_tx_chars(uart);
122 UART_SET_IER(uart, ETBEI);
123 bfin_serial_tx_chars(uart);
128 * Interrupts are enabled
130 static void bfin_serial_stop_rx(struct uart_port *port)
132 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
134 UART_CLEAR_IER(uart, ERBFI);
138 * Set the modem control timer to fire immediately.
140 static void bfin_serial_enable_ms(struct uart_port *port)
145 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
146 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
147 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
149 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
150 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
153 #ifdef CONFIG_SERIAL_BFIN_PIO
154 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
156 struct tty_struct *tty = NULL;
157 unsigned int status, ch, flg;
158 static struct timeval anomaly_start = { .tv_sec = 0 };
160 status = UART_GET_LSR(uart);
161 UART_CLEAR_LSR(uart);
163 ch = UART_GET_CHAR(uart);
164 uart->port.icount.rx++;
166 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
167 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
168 if (kgdb_connected && kgdboc_port_line == uart->port.line)
169 if (ch == 0x3) {/* Ctrl + C */
174 if (!uart->port.info || !uart->port.info->port.tty)
177 tty = uart->port.info->port.tty;
179 if (ANOMALY_05000363) {
180 /* The BF533 (and BF561) family of processors have a nice anomaly
181 * where they continuously generate characters for a "single" break.
182 * We have to basically ignore this flood until the "next" valid
183 * character comes across. Due to the nature of the flood, it is
184 * not possible to reliably catch bytes that are sent too quickly
185 * after this break. So application code talking to the Blackfin
186 * which sends a break signal must allow at least 1.5 character
187 * times after the end of the break for things to stabilize. This
188 * timeout was picked as it must absolutely be larger than 1
189 * character time +/- some percent. So 1.5 sounds good. All other
190 * Blackfin families operate properly. Woo.
192 if (anomaly_start.tv_sec) {
196 if ((~ch & (~ch + 1)) & 0xff)
197 goto known_good_char;
199 do_gettimeofday(&curr);
200 if (curr.tv_sec - anomaly_start.tv_sec > 1)
201 goto known_good_char;
204 if (curr.tv_sec != anomaly_start.tv_sec)
205 usecs += USEC_PER_SEC;
206 usecs += curr.tv_usec - anomaly_start.tv_usec;
208 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
209 goto known_good_char;
212 anomaly_start.tv_sec = 0;
214 anomaly_start = curr;
220 anomaly_start.tv_sec = 0;
225 if (ANOMALY_05000363)
226 if (bfin_revid() < 5)
227 do_gettimeofday(&anomaly_start);
228 uart->port.icount.brk++;
229 if (uart_handle_break(&uart->port))
231 status &= ~(PE | FE);
234 uart->port.icount.parity++;
236 uart->port.icount.overrun++;
238 uart->port.icount.frame++;
240 status &= uart->port.read_status_mask;
244 else if (status & PE)
246 else if (status & FE)
251 if (uart_handle_sysrq_char(&uart->port, ch))
254 uart_insert_char(&uart->port, status, OE, ch, flg);
257 tty_flip_buffer_push(tty);
260 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
262 struct circ_buf *xmit = &uart->port.info->xmit;
264 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
267 UART_PUT_LSR(uart, TFI);
269 UART_CLEAR_IER(uart, ETBEI);
273 if (uart->port.x_char) {
274 UART_PUT_CHAR(uart, uart->port.x_char);
275 uart->port.icount.tx++;
276 uart->port.x_char = 0;
279 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
280 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
281 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
282 uart->port.icount.tx++;
286 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
287 uart_write_wakeup(&uart->port);
290 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
292 struct bfin_serial_port *uart = dev_id;
294 spin_lock(&uart->port.lock);
295 while (UART_GET_LSR(uart) & DR)
296 bfin_serial_rx_chars(uart);
297 spin_unlock(&uart->port.lock);
302 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
304 struct bfin_serial_port *uart = dev_id;
306 spin_lock(&uart->port.lock);
307 if (UART_GET_LSR(uart) & THRE)
308 bfin_serial_tx_chars(uart);
309 spin_unlock(&uart->port.lock);
315 #ifdef CONFIG_SERIAL_BFIN_DMA
316 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
318 struct circ_buf *xmit = &uart->port.info->xmit;
322 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
328 if (uart->port.x_char) {
329 UART_PUT_CHAR(uart, uart->port.x_char);
330 uart->port.icount.tx++;
331 uart->port.x_char = 0;
334 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
335 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
336 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
337 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
338 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
339 set_dma_config(uart->tx_dma_channel,
340 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
345 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
346 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
347 set_dma_x_modify(uart->tx_dma_channel, 1);
348 enable_dma(uart->tx_dma_channel);
350 UART_SET_IER(uart, ETBEI);
353 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
355 struct tty_struct *tty = uart->port.info->port.tty;
358 status = UART_GET_LSR(uart);
359 UART_CLEAR_LSR(uart);
361 uart->port.icount.rx +=
362 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
366 uart->port.icount.brk++;
367 if (uart_handle_break(&uart->port))
368 goto dma_ignore_char;
369 status &= ~(PE | FE);
372 uart->port.icount.parity++;
374 uart->port.icount.overrun++;
376 uart->port.icount.frame++;
378 status &= uart->port.read_status_mask;
382 else if (status & PE)
384 else if (status & FE)
389 for (i = uart->rx_dma_buf.tail; ; i++) {
390 if (i >= UART_XMIT_SIZE)
392 if (i == uart->rx_dma_buf.head)
394 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
395 uart_insert_char(&uart->port, status, OE,
396 uart->rx_dma_buf.buf[i], flg);
400 tty_flip_buffer_push(tty);
403 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
408 spin_lock_irqsave(&uart->port.lock, flags);
410 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
411 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
412 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
413 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
414 uart->rx_dma_nrows = 0;
415 x_pos = DMA_RX_XCOUNT - x_pos;
416 if (x_pos == DMA_RX_XCOUNT)
419 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
420 if (pos != uart->rx_dma_buf.tail) {
421 uart->rx_dma_buf.head = pos;
422 bfin_serial_dma_rx_chars(uart);
423 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
426 spin_unlock_irqrestore(&uart->port.lock, flags);
428 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
431 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
433 struct bfin_serial_port *uart = dev_id;
434 struct circ_buf *xmit = &uart->port.info->xmit;
436 spin_lock(&uart->port.lock);
437 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
438 disable_dma(uart->tx_dma_channel);
439 clear_dma_irqstat(uart->tx_dma_channel);
440 UART_CLEAR_IER(uart, ETBEI);
441 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
442 uart->port.icount.tx += uart->tx_count;
444 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
445 uart_write_wakeup(&uart->port);
447 bfin_serial_dma_tx_chars(uart);
450 spin_unlock(&uart->port.lock);
454 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
456 struct bfin_serial_port *uart = dev_id;
457 unsigned short irqstat;
459 spin_lock(&uart->port.lock);
460 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
461 clear_dma_irqstat(uart->rx_dma_channel);
462 bfin_serial_dma_rx_chars(uart);
463 spin_unlock(&uart->port.lock);
470 * Return TIOCSER_TEMT when transmitter is not busy.
472 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
474 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
477 lsr = UART_GET_LSR(uart);
484 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
486 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
487 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
488 if (uart->cts_pin < 0)
489 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
491 if (UART_GET_CTS(uart))
492 return TIOCM_DSR | TIOCM_CAR;
495 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
498 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
500 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
501 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
502 if (uart->rts_pin < 0)
505 if (mctrl & TIOCM_RTS)
506 UART_CLEAR_RTS(uart);
512 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
514 * Handle any change of modem status signal.
516 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
518 struct bfin_serial_port *uart = dev_id;
521 status = bfin_serial_get_mctrl(&uart->port);
522 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
529 * Interrupts are always disabled.
531 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
533 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
534 u16 lcr = UART_GET_LCR(uart);
539 UART_PUT_LCR(uart, lcr);
543 static int bfin_serial_startup(struct uart_port *port)
545 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
547 #ifdef CONFIG_SERIAL_BFIN_DMA
548 dma_addr_t dma_handle;
550 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
551 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
555 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
556 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
557 free_dma(uart->rx_dma_channel);
561 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
562 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
564 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
565 uart->rx_dma_buf.head = 0;
566 uart->rx_dma_buf.tail = 0;
567 uart->rx_dma_nrows = 0;
569 set_dma_config(uart->rx_dma_channel,
570 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
571 INTR_ON_ROW, DIMENSION_2D,
574 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
575 set_dma_x_modify(uart->rx_dma_channel, 1);
576 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
577 set_dma_y_modify(uart->rx_dma_channel, 1);
578 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
579 enable_dma(uart->rx_dma_channel);
581 uart->rx_dma_timer.data = (unsigned long)(uart);
582 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
583 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
584 add_timer(&(uart->rx_dma_timer));
586 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
587 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
588 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
589 kgdboc_break_enabled = 0;
592 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
593 "BFIN_UART_RX", uart)) {
594 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
599 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
600 "BFIN_UART_TX", uart)) {
601 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
602 free_irq(uart->port.irq, uart);
608 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
610 switch (uart->port.irq) {
612 uart_dma_ch_rx = CH_UART3_RX;
613 uart_dma_ch_tx = CH_UART3_TX;
616 uart_dma_ch_rx = CH_UART2_RX;
617 uart_dma_ch_tx = CH_UART2_TX;
620 uart_dma_ch_rx = uart_dma_ch_tx = 0;
624 if (uart_dma_ch_rx &&
625 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
626 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
627 free_irq(uart->port.irq, uart);
628 free_irq(uart->port.irq + 1, uart);
631 if (uart_dma_ch_tx &&
632 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
633 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
634 free_dma(uart_dma_ch_rx);
635 free_irq(uart->port.irq, uart);
636 free_irq(uart->port.irq + 1, uart);
641 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
642 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
647 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
648 if (uart->cts_pin >= 0) {
649 if (request_irq(gpio_to_irq(uart->cts_pin),
650 bfin_serial_mctrl_cts_int,
651 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
652 IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
654 pr_info("Unable to attach BlackFin UART CTS interrupt.\
658 if (uart->rts_pin >= 0) {
659 gpio_request(uart->rts_pin, DRIVER_NAME);
660 gpio_direction_output(uart->rts_pin, 0);
663 UART_SET_IER(uart, ERBFI);
667 static void bfin_serial_shutdown(struct uart_port *port)
669 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
671 #ifdef CONFIG_SERIAL_BFIN_DMA
672 disable_dma(uart->tx_dma_channel);
673 free_dma(uart->tx_dma_channel);
674 disable_dma(uart->rx_dma_channel);
675 free_dma(uart->rx_dma_channel);
676 del_timer(&(uart->rx_dma_timer));
677 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
680 switch (uart->port.irq) {
682 free_dma(CH_UART3_RX);
683 free_dma(CH_UART3_TX);
686 free_dma(CH_UART2_RX);
687 free_dma(CH_UART2_TX);
693 free_irq(uart->port.irq, uart);
694 free_irq(uart->port.irq+1, uart);
697 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
698 if (uart->cts_pin >= 0)
699 free_irq(gpio_to_irq(uart->cts_pin), uart);
700 if (uart->rts_pin >= 0)
701 gpio_free(uart->rts_pin);
706 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
707 struct ktermios *old)
709 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
711 unsigned int baud, quot;
712 unsigned short val, ier, lcr = 0;
714 switch (termios->c_cflag & CSIZE) {
728 printk(KERN_ERR "%s: word lengh not supported\n",
732 if (termios->c_cflag & CSTOPB)
734 if (termios->c_cflag & PARENB)
736 if (!(termios->c_cflag & PARODD))
738 if (termios->c_cflag & CMSPAR)
741 port->read_status_mask = OE;
742 if (termios->c_iflag & INPCK)
743 port->read_status_mask |= (FE | PE);
744 if (termios->c_iflag & (BRKINT | PARMRK))
745 port->read_status_mask |= BI;
748 * Characters to ignore
750 port->ignore_status_mask = 0;
751 if (termios->c_iflag & IGNPAR)
752 port->ignore_status_mask |= FE | PE;
753 if (termios->c_iflag & IGNBRK) {
754 port->ignore_status_mask |= BI;
756 * If we're ignoring parity and break indicators,
757 * ignore overruns too (for real raw support).
759 if (termios->c_iflag & IGNPAR)
760 port->ignore_status_mask |= OE;
763 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
764 quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
765 spin_lock_irqsave(&uart->port.lock, flags);
767 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
770 ier = UART_GET_IER(uart);
771 UART_DISABLE_INTS(uart);
773 /* Set DLAB in LCR to Access DLL and DLH */
776 UART_PUT_DLL(uart, quot & 0xFF);
777 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
780 /* Clear DLAB in LCR to Access THR RBR IER */
781 UART_CLEAR_DLAB(uart);
783 UART_PUT_LCR(uart, lcr);
786 UART_ENABLE_INTS(uart, ier);
788 val = UART_GET_GCTL(uart);
790 UART_PUT_GCTL(uart, val);
792 /* Port speed changed, update the per-port timeout. */
793 uart_update_timeout(port, termios->c_cflag, baud);
795 spin_unlock_irqrestore(&uart->port.lock, flags);
798 static const char *bfin_serial_type(struct uart_port *port)
800 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
802 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
806 * Release the memory region(s) being used by 'port'.
808 static void bfin_serial_release_port(struct uart_port *port)
813 * Request the memory region(s) being used by 'port'.
815 static int bfin_serial_request_port(struct uart_port *port)
821 * Configure/autoconfigure the port.
823 static void bfin_serial_config_port(struct uart_port *port, int flags)
825 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
827 if (flags & UART_CONFIG_TYPE &&
828 bfin_serial_request_port(&uart->port) == 0)
829 uart->port.type = PORT_BFIN;
833 * Verify the new serial_struct (for TIOCSSERIAL).
834 * The only change we allow are to the flags and type, and
835 * even then only between PORT_BFIN and PORT_UNKNOWN
838 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
844 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
845 * In other cases, disable IrDA function.
847 static void bfin_serial_set_ldisc(struct uart_port *port)
849 int line = port->line;
852 if (line >= port->info->port.tty->driver->num)
855 switch (port->info->port.tty->termios->c_line) {
857 val = UART_GET_GCTL(&bfin_serial_ports[line]);
858 val |= (IREN | RPOLC);
859 UART_PUT_GCTL(&bfin_serial_ports[line], val);
862 val = UART_GET_GCTL(&bfin_serial_ports[line]);
863 val &= ~(IREN | RPOLC);
864 UART_PUT_GCTL(&bfin_serial_ports[line], val);
868 static void bfin_serial_reset_irda(struct uart_port *port)
870 int line = port->line;
873 val = UART_GET_GCTL(&bfin_serial_ports[line]);
874 val &= ~(IREN | RPOLC);
875 UART_PUT_GCTL(&bfin_serial_ports[line], val);
877 val |= (IREN | RPOLC);
878 UART_PUT_GCTL(&bfin_serial_ports[line], val);
882 #ifdef CONFIG_CONSOLE_POLL
883 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
885 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
887 while (!(UART_GET_LSR(uart) & THRE))
890 UART_CLEAR_DLAB(uart);
891 UART_PUT_CHAR(uart, (unsigned char)chr);
894 static int bfin_serial_poll_get_char(struct uart_port *port)
896 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
899 while (!(UART_GET_LSR(uart) & DR))
902 UART_CLEAR_DLAB(uart);
903 chr = UART_GET_CHAR(uart);
909 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
910 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
911 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
913 if (kgdboc_break_enabled) {
914 kgdboc_break_enabled = 0;
915 bfin_serial_shutdown(port);
919 static int bfin_kgdboc_port_startup(struct uart_port *port)
921 kgdboc_port_line = port->line;
922 kgdboc_break_enabled = !bfin_serial_startup(port);
927 static struct uart_ops bfin_serial_pops = {
928 .tx_empty = bfin_serial_tx_empty,
929 .set_mctrl = bfin_serial_set_mctrl,
930 .get_mctrl = bfin_serial_get_mctrl,
931 .stop_tx = bfin_serial_stop_tx,
932 .start_tx = bfin_serial_start_tx,
933 .stop_rx = bfin_serial_stop_rx,
934 .enable_ms = bfin_serial_enable_ms,
935 .break_ctl = bfin_serial_break_ctl,
936 .startup = bfin_serial_startup,
937 .shutdown = bfin_serial_shutdown,
938 .set_termios = bfin_serial_set_termios,
939 .set_ldisc = bfin_serial_set_ldisc,
940 .type = bfin_serial_type,
941 .release_port = bfin_serial_release_port,
942 .request_port = bfin_serial_request_port,
943 .config_port = bfin_serial_config_port,
944 .verify_port = bfin_serial_verify_port,
945 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
946 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
947 .kgdboc_port_startup = bfin_kgdboc_port_startup,
948 .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
950 #ifdef CONFIG_CONSOLE_POLL
951 .poll_put_char = bfin_serial_poll_put_char,
952 .poll_get_char = bfin_serial_poll_get_char,
956 static void __init bfin_serial_hw_init(void)
958 #ifdef CONFIG_SERIAL_BFIN_UART0
959 peripheral_request(P_UART0_TX, DRIVER_NAME);
960 peripheral_request(P_UART0_RX, DRIVER_NAME);
963 #ifdef CONFIG_SERIAL_BFIN_UART1
964 peripheral_request(P_UART1_TX, DRIVER_NAME);
965 peripheral_request(P_UART1_RX, DRIVER_NAME);
967 # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
968 peripheral_request(P_UART1_RTS, DRIVER_NAME);
969 peripheral_request(P_UART1_CTS, DRIVER_NAME);
973 #ifdef CONFIG_SERIAL_BFIN_UART2
974 peripheral_request(P_UART2_TX, DRIVER_NAME);
975 peripheral_request(P_UART2_RX, DRIVER_NAME);
978 #ifdef CONFIG_SERIAL_BFIN_UART3
979 peripheral_request(P_UART3_TX, DRIVER_NAME);
980 peripheral_request(P_UART3_RX, DRIVER_NAME);
982 # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
983 peripheral_request(P_UART3_RTS, DRIVER_NAME);
984 peripheral_request(P_UART3_CTS, DRIVER_NAME);
989 static void __init bfin_serial_init_ports(void)
991 static int first = 1;
998 bfin_serial_hw_init();
1000 for (i = 0; i < nr_active_ports; i++) {
1001 bfin_serial_ports[i].port.uartclk = get_sclk();
1002 bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1003 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
1004 bfin_serial_ports[i].port.line = i;
1005 bfin_serial_ports[i].port.iotype = UPIO_MEM;
1006 bfin_serial_ports[i].port.membase =
1007 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
1008 bfin_serial_ports[i].port.mapbase =
1009 bfin_serial_resource[i].uart_base_addr;
1010 bfin_serial_ports[i].port.irq =
1011 bfin_serial_resource[i].uart_irq;
1012 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
1013 #ifdef CONFIG_SERIAL_BFIN_DMA
1014 bfin_serial_ports[i].tx_done = 1;
1015 bfin_serial_ports[i].tx_count = 0;
1016 bfin_serial_ports[i].tx_dma_channel =
1017 bfin_serial_resource[i].uart_tx_dma_channel;
1018 bfin_serial_ports[i].rx_dma_channel =
1019 bfin_serial_resource[i].uart_rx_dma_channel;
1020 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
1022 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1023 bfin_serial_ports[i].cts_pin =
1024 bfin_serial_resource[i].uart_cts_pin;
1025 bfin_serial_ports[i].rts_pin =
1026 bfin_serial_resource[i].uart_rts_pin;
1031 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1033 * If the port was already initialised (eg, by a boot loader),
1034 * try to determine the current setup.
1037 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1038 int *parity, int *bits)
1040 unsigned short status;
1042 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1043 if (status == (ERBFI | ETBEI)) {
1044 /* ok, the port was enabled */
1047 lcr = UART_GET_LCR(uart);
1056 switch (lcr & 0x03) {
1057 case 0: *bits = 5; break;
1058 case 1: *bits = 6; break;
1059 case 2: *bits = 7; break;
1060 case 3: *bits = 8; break;
1062 /* Set DLAB in LCR to Access DLL and DLH */
1063 UART_SET_DLAB(uart);
1065 dll = UART_GET_DLL(uart);
1066 dlh = UART_GET_DLH(uart);
1068 /* Clear DLAB in LCR to Access THR RBR IER */
1069 UART_CLEAR_DLAB(uart);
1071 *baud = get_sclk() / (16*(dll | dlh << 8));
1073 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1076 static struct uart_driver bfin_serial_reg;
1079 bfin_serial_console_setup(struct console *co, char *options)
1081 struct bfin_serial_port *uart;
1085 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1092 * Check whether an invalid uart number has been specified, and
1093 * if so, search for the first available port that does have
1096 if (co->index == -1 || co->index >= nr_active_ports)
1098 uart = &bfin_serial_ports[co->index];
1101 uart_parse_options(options, &baud, &parity, &bits, &flow);
1103 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1105 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1107 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1108 defined (CONFIG_EARLY_PRINTK) */
1110 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1111 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1113 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1114 while (!(UART_GET_LSR(uart) & THRE))
1116 UART_PUT_CHAR(uart, ch);
1121 * Interrupts are disabled on entering
1124 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1126 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1127 unsigned long flags;
1129 spin_lock_irqsave(&uart->port.lock, flags);
1130 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1131 spin_unlock_irqrestore(&uart->port.lock, flags);
1135 static struct console bfin_serial_console = {
1136 .name = BFIN_SERIAL_NAME,
1137 .write = bfin_serial_console_write,
1138 .device = uart_console_device,
1139 .setup = bfin_serial_console_setup,
1140 .flags = CON_PRINTBUFFER,
1142 .data = &bfin_serial_reg,
1145 static int __init bfin_serial_rs_console_init(void)
1147 bfin_serial_init_ports();
1148 register_console(&bfin_serial_console);
1152 console_initcall(bfin_serial_rs_console_init);
1154 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1156 #define BFIN_SERIAL_CONSOLE NULL
1157 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1160 #ifdef CONFIG_EARLY_PRINTK
1161 static __init void early_serial_putc(struct uart_port *port, int ch)
1163 unsigned timeout = 0xffff;
1164 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1166 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1168 UART_PUT_CHAR(uart, ch);
1171 static __init void early_serial_write(struct console *con, const char *s,
1174 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1177 for (i = 0; i < n; i++, s++) {
1179 early_serial_putc(&uart->port, '\r');
1180 early_serial_putc(&uart->port, *s);
1184 static struct __initdata console bfin_early_serial_console = {
1185 .name = "early_BFuart",
1186 .write = early_serial_write,
1187 .device = uart_console_device,
1188 .flags = CON_PRINTBUFFER,
1189 .setup = bfin_serial_console_setup,
1191 .data = &bfin_serial_reg,
1194 struct console __init *bfin_earlyserial_init(unsigned int port,
1197 struct bfin_serial_port *uart;
1200 if (port == -1 || port >= nr_active_ports)
1202 bfin_serial_init_ports();
1203 bfin_early_serial_console.index = port;
1204 uart = &bfin_serial_ports[port];
1210 bfin_serial_set_termios(&uart->port, &t, &t);
1211 return &bfin_early_serial_console;
1214 #endif /* CONFIG_EARLY_PRINTK */
1216 static struct uart_driver bfin_serial_reg = {
1217 .owner = THIS_MODULE,
1218 .driver_name = "bfin-uart",
1219 .dev_name = BFIN_SERIAL_NAME,
1220 .major = BFIN_SERIAL_MAJOR,
1221 .minor = BFIN_SERIAL_MINOR,
1222 .nr = BFIN_UART_NR_PORTS,
1223 .cons = BFIN_SERIAL_CONSOLE,
1226 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1230 for (i = 0; i < nr_active_ports; i++) {
1231 if (bfin_serial_ports[i].port.dev != &dev->dev)
1233 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1239 static int bfin_serial_resume(struct platform_device *dev)
1243 for (i = 0; i < nr_active_ports; i++) {
1244 if (bfin_serial_ports[i].port.dev != &dev->dev)
1246 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1252 static int bfin_serial_probe(struct platform_device *dev)
1254 struct resource *res = dev->resource;
1257 for (i = 0; i < dev->num_resources; i++, res++)
1258 if (res->flags & IORESOURCE_MEM)
1261 if (i < dev->num_resources) {
1262 for (i = 0; i < nr_active_ports; i++, res++) {
1263 if (bfin_serial_ports[i].port.mapbase != res->start)
1265 bfin_serial_ports[i].port.dev = &dev->dev;
1266 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1273 static int bfin_serial_remove(struct platform_device *dev)
1277 for (i = 0; i < nr_active_ports; i++) {
1278 if (bfin_serial_ports[i].port.dev != &dev->dev)
1280 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1281 bfin_serial_ports[i].port.dev = NULL;
1282 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1283 gpio_free(bfin_serial_ports[i].cts_pin);
1284 gpio_free(bfin_serial_ports[i].rts_pin);
1291 static struct platform_driver bfin_serial_driver = {
1292 .probe = bfin_serial_probe,
1293 .remove = bfin_serial_remove,
1294 .suspend = bfin_serial_suspend,
1295 .resume = bfin_serial_resume,
1297 .name = "bfin-uart",
1298 .owner = THIS_MODULE,
1302 static int __init bfin_serial_init(void)
1306 pr_info("Serial: Blackfin serial driver\n");
1308 bfin_serial_init_ports();
1310 ret = uart_register_driver(&bfin_serial_reg);
1312 ret = platform_driver_register(&bfin_serial_driver);
1314 pr_debug("uart register failed\n");
1315 uart_unregister_driver(&bfin_serial_reg);
1321 static void __exit bfin_serial_exit(void)
1323 platform_driver_unregister(&bfin_serial_driver);
1324 uart_unregister_driver(&bfin_serial_reg);
1328 module_init(bfin_serial_init);
1329 module_exit(bfin_serial_exit);
1331 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1332 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1333 MODULE_LICENSE("GPL");
1334 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1335 MODULE_ALIAS("platform:bfin-uart");