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[linux-2.6-omap-h63xx.git] / drivers / net / wireless / p54 / p54pci.c
1
2 /*
3  * Linux device driver for PCI based Prism54
4  *
5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
7  *
8  * Based on the islsm (softmac prism54) driver, which is:
9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/firmware.h>
19 #include <linux/etherdevice.h>
20 #include <linux/delay.h>
21 #include <linux/completion.h>
22 #include <net/mac80211.h>
23
24 #include "p54.h"
25 #include "p54pci.h"
26
27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
29 MODULE_LICENSE("GPL");
30 MODULE_ALIAS("prism54pci");
31
32 static struct pci_device_id p54p_table[] __devinitdata = {
33         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
34         { PCI_DEVICE(0x1260, 0x3890) },
35         /* 3COM 3CRWE154G72 Wireless LAN adapter */
36         { PCI_DEVICE(0x10b7, 0x6001) },
37         /* Intersil PRISM Indigo Wireless LAN adapter */
38         { PCI_DEVICE(0x1260, 0x3877) },
39         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
40         { PCI_DEVICE(0x1260, 0x3886) },
41         { },
42 };
43
44 MODULE_DEVICE_TABLE(pci, p54p_table);
45
46 static int p54p_upload_firmware(struct ieee80211_hw *dev)
47 {
48         struct p54p_priv *priv = dev->priv;
49         const struct firmware *fw_entry = NULL;
50         __le32 reg;
51         int err;
52         __le32 *data;
53         u32 remains, left, device_addr;
54
55         P54P_WRITE(int_enable, cpu_to_le32(0));
56         P54P_READ(int_enable);
57         udelay(10);
58
59         reg = P54P_READ(ctrl_stat);
60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
62         P54P_WRITE(ctrl_stat, reg);
63         P54P_READ(ctrl_stat);
64         udelay(10);
65
66         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
67         P54P_WRITE(ctrl_stat, reg);
68         wmb();
69         udelay(10);
70
71         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
72         P54P_WRITE(ctrl_stat, reg);
73         wmb();
74
75         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
76         if (err) {
77                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
78                        "(isl3886)\n", pci_name(priv->pdev));
79                 return err;
80         }
81
82         err = p54_parse_firmware(dev, fw_entry);
83         if (err) {
84                 release_firmware(fw_entry);
85                 return err;
86         }
87
88         data = (__le32 *) fw_entry->data;
89         remains = fw_entry->size;
90         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
91         while (remains) {
92                 u32 i = 0;
93                 left = min((u32)0x1000, remains);
94                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
95                 P54P_READ(int_enable);
96
97                 device_addr += 0x1000;
98                 while (i < left) {
99                         P54P_WRITE(direct_mem_win[i], *data++);
100                         i += sizeof(u32);
101                 }
102
103                 remains -= left;
104                 P54P_READ(int_enable);
105         }
106
107         release_firmware(fw_entry);
108
109         reg = P54P_READ(ctrl_stat);
110         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
111         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
112         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
113         P54P_WRITE(ctrl_stat, reg);
114         P54P_READ(ctrl_stat);
115         udelay(10);
116
117         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
118         P54P_WRITE(ctrl_stat, reg);
119         wmb();
120         udelay(10);
121
122         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
123         P54P_WRITE(ctrl_stat, reg);
124         wmb();
125         udelay(10);
126
127         /* wait for the firmware to boot properly */
128         mdelay(100);
129
130         return 0;
131 }
132
133 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
134         int ring_index, struct p54p_desc *ring, u32 ring_limit,
135         struct sk_buff **rx_buf)
136 {
137         struct p54p_priv *priv = dev->priv;
138         struct p54p_ring_control *ring_control = priv->ring_control;
139         u32 limit, idx, i;
140
141         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
142         limit = idx;
143         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
144         limit = ring_limit - limit;
145
146         i = idx % ring_limit;
147         while (limit-- > 1) {
148                 struct p54p_desc *desc = &ring[i];
149
150                 if (!desc->host_addr) {
151                         struct sk_buff *skb;
152                         dma_addr_t mapping;
153                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
154                         if (!skb)
155                                 break;
156
157                         mapping = pci_map_single(priv->pdev,
158                                                  skb_tail_pointer(skb),
159                                                  priv->common.rx_mtu + 32,
160                                                  PCI_DMA_FROMDEVICE);
161                         desc->host_addr = cpu_to_le32(mapping);
162                         desc->device_addr = 0;  // FIXME: necessary?
163                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
164                         desc->flags = 0;
165                         rx_buf[i] = skb;
166                 }
167
168                 i++;
169                 idx++;
170                 i %= ring_limit;
171         }
172
173         wmb();
174         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
175 }
176
177 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
178         int ring_index, struct p54p_desc *ring, u32 ring_limit,
179         struct sk_buff **rx_buf)
180 {
181         struct p54p_priv *priv = dev->priv;
182         struct p54p_ring_control *ring_control = priv->ring_control;
183         struct p54p_desc *desc;
184         u32 idx, i;
185
186         i = (*index) % ring_limit;
187         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
188         idx %= ring_limit;
189         while (i != idx) {
190                 u16 len;
191                 struct sk_buff *skb;
192                 desc = &ring[i];
193                 len = le16_to_cpu(desc->len);
194                 skb = rx_buf[i];
195
196                 if (!skb) {
197                         i++;
198                         i %= ring_limit;
199                         continue;
200                 }
201                 skb_put(skb, len);
202
203                 if (p54_rx(dev, skb)) {
204                         pci_unmap_single(priv->pdev,
205                                          le32_to_cpu(desc->host_addr),
206                                          priv->common.rx_mtu + 32,
207                                          PCI_DMA_FROMDEVICE);
208                         rx_buf[i] = NULL;
209                         desc->host_addr = 0;
210                 } else {
211                         skb_trim(skb, 0);
212                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
213                 }
214
215                 i++;
216                 i %= ring_limit;
217         }
218
219         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
220 }
221
222 /* caller must hold priv->lock */
223 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
224         int ring_index, struct p54p_desc *ring, u32 ring_limit,
225         void **tx_buf)
226 {
227         struct p54p_priv *priv = dev->priv;
228         struct p54p_ring_control *ring_control = priv->ring_control;
229         struct p54p_desc *desc;
230         u32 idx, i;
231
232         i = (*index) % ring_limit;
233         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
234         idx %= ring_limit;
235
236         while (i != idx) {
237                 desc = &ring[i];
238                 kfree(tx_buf[i]);
239                 tx_buf[i] = NULL;
240
241                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
242                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
243
244                 desc->host_addr = 0;
245                 desc->device_addr = 0;
246                 desc->len = 0;
247                 desc->flags = 0;
248
249                 i++;
250                 i %= ring_limit;
251         }
252 }
253
254 static void p54p_rx_tasklet(unsigned long dev_id)
255 {
256         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
257         struct p54p_priv *priv = dev->priv;
258         struct p54p_ring_control *ring_control = priv->ring_control;
259
260         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
261                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
262
263         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
264                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
265
266         wmb();
267         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
268 }
269
270 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
271 {
272         struct ieee80211_hw *dev = dev_id;
273         struct p54p_priv *priv = dev->priv;
274         struct p54p_ring_control *ring_control = priv->ring_control;
275         __le32 reg;
276
277         spin_lock(&priv->lock);
278         reg = P54P_READ(int_ident);
279         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
280                 spin_unlock(&priv->lock);
281                 return IRQ_HANDLED;
282         }
283
284         P54P_WRITE(int_ack, reg);
285
286         reg &= P54P_READ(int_enable);
287
288         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
289                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
290                                    3, ring_control->tx_mgmt,
291                                    ARRAY_SIZE(ring_control->tx_mgmt),
292                                    priv->tx_buf_mgmt);
293
294                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
295                                    1, ring_control->tx_data,
296                                    ARRAY_SIZE(ring_control->tx_data),
297                                    priv->tx_buf_data);
298
299                 tasklet_schedule(&priv->rx_tasklet);
300
301         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
302                 complete(&priv->boot_comp);
303
304         spin_unlock(&priv->lock);
305
306         return reg ? IRQ_HANDLED : IRQ_NONE;
307 }
308
309 static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
310                     size_t len, int free_on_tx)
311 {
312         struct p54p_priv *priv = dev->priv;
313         struct p54p_ring_control *ring_control = priv->ring_control;
314         unsigned long flags;
315         struct p54p_desc *desc;
316         dma_addr_t mapping;
317         u32 device_idx, idx, i;
318
319         spin_lock_irqsave(&priv->lock, flags);
320
321         device_idx = le32_to_cpu(ring_control->device_idx[1]);
322         idx = le32_to_cpu(ring_control->host_idx[1]);
323         i = idx % ARRAY_SIZE(ring_control->tx_data);
324
325         mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
326         desc = &ring_control->tx_data[i];
327         desc->host_addr = cpu_to_le32(mapping);
328         desc->device_addr = data->req_id;
329         desc->len = cpu_to_le16(len);
330         desc->flags = 0;
331
332         wmb();
333         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
334
335         if (free_on_tx)
336                 priv->tx_buf_data[i] = data;
337
338         spin_unlock_irqrestore(&priv->lock, flags);
339
340         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
341         P54P_READ(dev_int);
342
343         /* FIXME: unlikely to happen because the device usually runs out of
344            memory before we fill the ring up, but we can make it impossible */
345         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2)
346                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
347 }
348
349 static int p54p_open(struct ieee80211_hw *dev)
350 {
351         struct p54p_priv *priv = dev->priv;
352         int err;
353
354         init_completion(&priv->boot_comp);
355         err = request_irq(priv->pdev->irq, &p54p_interrupt,
356                           IRQF_SHARED, "p54pci", dev);
357         if (err) {
358                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
359                        wiphy_name(dev->wiphy));
360                 return err;
361         }
362
363         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
364         err = p54p_upload_firmware(dev);
365         if (err) {
366                 free_irq(priv->pdev->irq, dev);
367                 return err;
368         }
369         priv->rx_idx_data = priv->tx_idx_data = 0;
370         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
371
372         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
373                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
374
375         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
376                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
377
378         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
379         P54P_READ(ring_control_base);
380         wmb();
381         udelay(10);
382
383         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
384         P54P_READ(int_enable);
385         wmb();
386         udelay(10);
387
388         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
389         P54P_READ(dev_int);
390
391         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
392                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
393                        wiphy_name(dev->wiphy));
394                 free_irq(priv->pdev->irq, dev);
395                 return -ETIMEDOUT;
396         }
397
398         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
399         P54P_READ(int_enable);
400         wmb();
401         udelay(10);
402
403         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
404         P54P_READ(dev_int);
405         wmb();
406         udelay(10);
407
408         return 0;
409 }
410
411 static void p54p_stop(struct ieee80211_hw *dev)
412 {
413         struct p54p_priv *priv = dev->priv;
414         struct p54p_ring_control *ring_control = priv->ring_control;
415         unsigned int i;
416         struct p54p_desc *desc;
417
418         tasklet_kill(&priv->rx_tasklet);
419
420         P54P_WRITE(int_enable, cpu_to_le32(0));
421         P54P_READ(int_enable);
422         udelay(10);
423
424         free_irq(priv->pdev->irq, dev);
425
426         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
427
428         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
429                 desc = &ring_control->rx_data[i];
430                 if (desc->host_addr)
431                         pci_unmap_single(priv->pdev,
432                                          le32_to_cpu(desc->host_addr),
433                                          priv->common.rx_mtu + 32,
434                                          PCI_DMA_FROMDEVICE);
435                 kfree_skb(priv->rx_buf_data[i]);
436                 priv->rx_buf_data[i] = NULL;
437         }
438
439         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
440                 desc = &ring_control->rx_mgmt[i];
441                 if (desc->host_addr)
442                         pci_unmap_single(priv->pdev,
443                                          le32_to_cpu(desc->host_addr),
444                                          priv->common.rx_mtu + 32,
445                                          PCI_DMA_FROMDEVICE);
446                 kfree_skb(priv->rx_buf_mgmt[i]);
447                 priv->rx_buf_mgmt[i] = NULL;
448         }
449
450         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
451                 desc = &ring_control->tx_data[i];
452                 if (desc->host_addr)
453                         pci_unmap_single(priv->pdev,
454                                          le32_to_cpu(desc->host_addr),
455                                          le16_to_cpu(desc->len),
456                                          PCI_DMA_TODEVICE);
457
458                 kfree(priv->tx_buf_data[i]);
459                 priv->tx_buf_data[i] = NULL;
460         }
461
462         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
463                 desc = &ring_control->tx_mgmt[i];
464                 if (desc->host_addr)
465                         pci_unmap_single(priv->pdev,
466                                          le32_to_cpu(desc->host_addr),
467                                          le16_to_cpu(desc->len),
468                                          PCI_DMA_TODEVICE);
469
470                 kfree(priv->tx_buf_mgmt[i]);
471                 priv->tx_buf_mgmt[i] = NULL;
472         }
473
474         memset(ring_control, 0, sizeof(*ring_control));
475 }
476
477 static int __devinit p54p_probe(struct pci_dev *pdev,
478                                 const struct pci_device_id *id)
479 {
480         struct p54p_priv *priv;
481         struct ieee80211_hw *dev;
482         unsigned long mem_addr, mem_len;
483         int err;
484         DECLARE_MAC_BUF(mac);
485
486         err = pci_enable_device(pdev);
487         if (err) {
488                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
489                        pci_name(pdev));
490                 return err;
491         }
492
493         mem_addr = pci_resource_start(pdev, 0);
494         mem_len = pci_resource_len(pdev, 0);
495         if (mem_len < sizeof(struct p54p_csr)) {
496                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
497                        pci_name(pdev));
498                 pci_disable_device(pdev);
499                 return err;
500         }
501
502         err = pci_request_regions(pdev, "p54pci");
503         if (err) {
504                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
505                        pci_name(pdev));
506                 return err;
507         }
508
509         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
510             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
511                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
512                        pci_name(pdev));
513                 goto err_free_reg;
514         }
515
516         pci_set_master(pdev);
517         pci_try_set_mwi(pdev);
518
519         pci_write_config_byte(pdev, 0x40, 0);
520         pci_write_config_byte(pdev, 0x41, 0);
521
522         dev = p54_init_common(sizeof(*priv));
523         if (!dev) {
524                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
525                        pci_name(pdev));
526                 err = -ENOMEM;
527                 goto err_free_reg;
528         }
529
530         priv = dev->priv;
531         priv->pdev = pdev;
532
533         SET_IEEE80211_DEV(dev, &pdev->dev);
534         pci_set_drvdata(pdev, dev);
535
536         priv->map = ioremap(mem_addr, mem_len);
537         if (!priv->map) {
538                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
539                        pci_name(pdev));
540                 err = -EINVAL;  // TODO: use a better error code?
541                 goto err_free_dev;
542         }
543
544         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
545                                                   &priv->ring_control_dma);
546         if (!priv->ring_control) {
547                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
548                        pci_name(pdev));
549                 err = -ENOMEM;
550                 goto err_iounmap;
551         }
552         priv->common.open = p54p_open;
553         priv->common.stop = p54p_stop;
554         priv->common.tx = p54p_tx;
555
556         spin_lock_init(&priv->lock);
557         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
558
559         p54p_open(dev);
560         err = p54_read_eeprom(dev);
561         p54p_stop(dev);
562         if (err)
563                 goto err_free_desc;
564
565         err = ieee80211_register_hw(dev);
566         if (err) {
567                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
568                        pci_name(pdev));
569                 goto err_free_common;
570         }
571
572         return 0;
573
574  err_free_common:
575         p54_free_common(dev);
576
577  err_free_desc:
578         pci_free_consistent(pdev, sizeof(*priv->ring_control),
579                             priv->ring_control, priv->ring_control_dma);
580
581  err_iounmap:
582         iounmap(priv->map);
583
584  err_free_dev:
585         pci_set_drvdata(pdev, NULL);
586         ieee80211_free_hw(dev);
587
588  err_free_reg:
589         pci_release_regions(pdev);
590         pci_disable_device(pdev);
591         return err;
592 }
593
594 static void __devexit p54p_remove(struct pci_dev *pdev)
595 {
596         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
597         struct p54p_priv *priv;
598
599         if (!dev)
600                 return;
601
602         ieee80211_unregister_hw(dev);
603         priv = dev->priv;
604         pci_free_consistent(pdev, sizeof(*priv->ring_control),
605                             priv->ring_control, priv->ring_control_dma);
606         p54_free_common(dev);
607         iounmap(priv->map);
608         pci_release_regions(pdev);
609         pci_disable_device(pdev);
610         ieee80211_free_hw(dev);
611 }
612
613 #ifdef CONFIG_PM
614 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
615 {
616         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
617         struct p54p_priv *priv = dev->priv;
618
619         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
620                 ieee80211_stop_queues(dev);
621                 p54p_stop(dev);
622         }
623
624         pci_save_state(pdev);
625         pci_set_power_state(pdev, pci_choose_state(pdev, state));
626         return 0;
627 }
628
629 static int p54p_resume(struct pci_dev *pdev)
630 {
631         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
632         struct p54p_priv *priv = dev->priv;
633
634         pci_set_power_state(pdev, PCI_D0);
635         pci_restore_state(pdev);
636
637         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
638                 p54p_open(dev);
639                 ieee80211_wake_queues(dev);
640         }
641
642         return 0;
643 }
644 #endif /* CONFIG_PM */
645
646 static struct pci_driver p54p_driver = {
647         .name           = "p54pci",
648         .id_table       = p54p_table,
649         .probe          = p54p_probe,
650         .remove         = __devexit_p(p54p_remove),
651 #ifdef CONFIG_PM
652         .suspend        = p54p_suspend,
653         .resume         = p54p_resume,
654 #endif /* CONFIG_PM */
655 };
656
657 static int __init p54p_init(void)
658 {
659         return pci_register_driver(&p54p_driver);
660 }
661
662 static void __exit p54p_exit(void)
663 {
664         pci_unregister_driver(&p54p_driver);
665 }
666
667 module_init(p54p_init);
668 module_exit(p54p_exit);