drivers/net/wireless/iwlwifi/iwl-rx.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/etherdevice.h>
  31 #include <net/mac80211.h>
  32 #include <asm/unaligned.h>
  33 #include "iwl-eeprom.h"
  34 #include "iwl-dev.h"
  35 #include "iwl-core.h"
  36 #include "iwl-sta.h"
  37 #include "iwl-io.h"
  38 #include "iwl-calib.h"
  39 #include "iwl-helpers.h"
  40 /************************** RX-FUNCTIONS ****************************/
  41 /*
  42  * Rx theory of operation
  43  *
  44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  45  * each of which point to Receive Buffers to be filled by the NIC.  These get
  46  * used not only for Rx frames, but for any command response or notification
  47  * from the NIC.  The driver and NIC manage the Rx buffers by means
  48  * of indexes into the circular buffer.
  49  *
  50  * Rx Queue Indexes
  51  * The host/firmware share two index registers for managing the Rx buffers.
  52  *
  53  * The READ index maps to the first position that the firmware may be writing
  54  * to -- the driver can read up to (but not including) this position and get
  55  * good data.
  56  * The READ index is managed by the firmware once the card is enabled.
  57  *
  58  * The WRITE index maps to the last position the driver has read from -- the
  59  * position preceding WRITE is the last slot the firmware can place a packet.
  60  *
  61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  62  * WRITE = READ.
  63  *
  64  * During initialization, the host sets up the READ queue position to the first
  65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
  66  *
  67  * When the firmware places a packet in a buffer, it will advance the READ index
  68  * and fire the RX interrupt.  The driver can then query the READ index and
  69  * process as many packets as possible, moving the WRITE index forward as it
  70  * resets the Rx queue buffers with new memory.
  71  *
  72  * The management in the driver is as follows:
  73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
  74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  75  *   to replenish the iwl->rxq->rx_free.
  76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
  78  *   'processed' and 'read' driver indexes as well)
  79  * + A received packet is processed and handed to the kernel network stack,
  80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
  81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
  84  *   were enough free buffers and RX_STALLED is set it is cleared.
  85  *
  86  *
  87  * Driver sequence:
  88  *
  89  * iwl_rx_queue_alloc()   Allocates rx_free
  90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
  91  *                            iwl_rx_queue_restock
  92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  93  *                            queue, updates firmware pointers, and updates
  94  *                            the WRITE index.  If insufficient rx_free buffers
  95  *                            are available, schedules iwl_rx_replenish
  96  *
  97  * -- enable interrupts --
  98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
  99  *                            READ INDEX, detaching the SKB from the pool.
 100  *                            Moves the packet buffer from queue to rx_used.
 101  *                            Calls iwl_rx_queue_restock to refill any empty
 102  *                            slots.
 103  * ...
 104  *
 105  */
 106
 107 /**
 108  * iwl_rx_queue_space - Return number of free slots available in queue.
 109  */
 110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
 111 {
 112         int s = q->read - q->write;
 113         if (s <= 0)
 114                 s += RX_QUEUE_SIZE;
 115         /* keep some buffer to not confuse full and empty queue */
 116         s -= 2;
 117         if (s < 0)
 118                 s = 0;
 119         return s;
 120 }
 121 EXPORT_SYMBOL(iwl_rx_queue_space);
 122
 123 /**
 124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
 125  */
 126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
 127 {
 128         u32 reg = 0;
 129         int ret = 0;
 130         unsigned long flags;
 131
 132         spin_lock_irqsave(&q->lock, flags);
 133
 134         if (q->need_update == 0)
 135                 goto exit_unlock;
 136
 137         /* If power-saving is in use, make sure device is awake */
 138         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
 139                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
 140
 141                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
 142                         iwl_set_bit(priv, CSR_GP_CNTRL,
 143                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
 144                         goto exit_unlock;
 145                 }
 146
 147                 ret = iwl_grab_nic_access(priv);
 148                 if (ret)
 149                         goto exit_unlock;
 150
 151                 /* Device expects a multiple of 8 */
 152                 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
 153                                      q->write & ~0x7);
 154                 iwl_release_nic_access(priv);
 155
 156         /* Else device is assumed to be awake */
 157         } else
 158                 /* Device expects a multiple of 8 */
 159                 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
 160
 161
 162         q->need_update = 0;
 163
 164  exit_unlock:
 165         spin_unlock_irqrestore(&q->lock, flags);
 166         return ret;
 167 }
 168 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
 169 /**
 170  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 171  */
 172 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
 173                                           dma_addr_t dma_addr)
 174 {
 175         return cpu_to_le32((u32)(dma_addr >> 8));
 176 }
 177
 178 /**
 179  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
 180  *
 181  * If there are slots in the RX queue that need to be restocked,
 182  * and we have free pre-allocated buffers, fill the ranks as much
 183  * as we can, pulling from rx_free.
 184  *
 185  * This moves the 'write' index forward to catch up with 'processed', and
 186  * also updates the memory address in the firmware to reference the new
 187  * target buffer.
 188  */
 189 int iwl_rx_queue_restock(struct iwl_priv *priv)
 190 {
 191         struct iwl_rx_queue *rxq = &priv->rxq;
 192         struct list_head *element;
 193         struct iwl_rx_mem_buffer *rxb;
 194         unsigned long flags;
 195         int write;
 196         int ret = 0;
 197
 198         spin_lock_irqsave(&rxq->lock, flags);
 199         write = rxq->write & ~0x7;
 200         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 201                 /* Get next free Rx buffer, remove from free list */
 202                 element = rxq->rx_free.next;
 203                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 204                 list_del(element);
 205
 206                 /* Point to Rx buffer via next RBD in circular buffer */
 207                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
 208                 rxq->queue[rxq->write] = rxb;
 209                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 210                 rxq->free_count--;
 211         }
 212         spin_unlock_irqrestore(&rxq->lock, flags);
 213         /* If the pre-allocated buffer pool is dropping low, schedule to
 214          * refill it */
 215         if (rxq->free_count <= RX_LOW_WATERMARK)
 216                 queue_work(priv->workqueue, &priv->rx_replenish);
 217
 218
 219         /* If we've added more space for the firmware to place data, tell it.
 220          * Increment device's write pointer in multiples of 8. */
 221         if ((write != (rxq->write & ~0x7))
 222             || (abs(rxq->write - rxq->read) > 7)) {
 223                 spin_lock_irqsave(&rxq->lock, flags);
 224                 rxq->need_update = 1;
 225                 spin_unlock_irqrestore(&rxq->lock, flags);
 226                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
 227         }
 228
 229         return ret;
 230 }
 231 EXPORT_SYMBOL(iwl_rx_queue_restock);
 232
 233
 234 /**
 235  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
 236  *
 237  * When moving to rx_free an SKB is allocated for the slot.
 238  *
 239  * Also restock the Rx queue via iwl_rx_queue_restock.
 240  * This is called as a scheduled work item (except for during initialization)
 241  */
 242 void iwl_rx_allocate(struct iwl_priv *priv)
 243 {
 244         struct iwl_rx_queue *rxq = &priv->rxq;
 245         struct list_head *element;
 246         struct iwl_rx_mem_buffer *rxb;
 247         unsigned long flags;
 248         spin_lock_irqsave(&rxq->lock, flags);
 249         while (!list_empty(&rxq->rx_used)) {
 250                 element = rxq->rx_used.next;
 251                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 252
 253                 /* Alloc a new receive buffer */
 254                 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
 255                                 __GFP_NOWARN | GFP_ATOMIC);
 256                 if (!rxb->skb) {
 257                         if (net_ratelimit())
 258                                 printk(KERN_CRIT DRV_NAME
 259                                        ": Can not allocate SKB buffers\n");
 260                         /* We don't reschedule replenish work here -- we will
 261                          * call the restock method and if it still needs
 262                          * more buffers it will schedule replenish */
 263                         break;
 264                 }
 265                 priv->alloc_rxb_skb++;
 266                 list_del(element);
 267
 268                 /* Get physical address of RB/SKB */
 269                 rxb->real_dma_addr = pci_map_single(
 270                                         priv->pci_dev,
 271                                         rxb->skb->data,
 272                                         priv->hw_params.rx_buf_size + 256,
 273                                         PCI_DMA_FROMDEVICE);
 274                 /* dma address must be no more than 36 bits */
 275                 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
 276                 /* and also 256 byte aligned! */
 277                 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
 278                 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
 279
 280                 list_add_tail(&rxb->list, &rxq->rx_free);
 281                 rxq->free_count++;
 282         }
 283         spin_unlock_irqrestore(&rxq->lock, flags);
 284 }
 285 EXPORT_SYMBOL(iwl_rx_allocate);
 286
 287 void iwl_rx_replenish(struct iwl_priv *priv)
 288 {
 289         unsigned long flags;
 290
 291         iwl_rx_allocate(priv);
 292
 293         spin_lock_irqsave(&priv->lock, flags);
 294         iwl_rx_queue_restock(priv);
 295         spin_unlock_irqrestore(&priv->lock, flags);
 296 }
 297 EXPORT_SYMBOL(iwl_rx_replenish);
 298
 299
 300 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 301  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 302  * This free routine walks the list of POOL entries and if SKB is set to
 303  * non NULL it is unmapped and freed
 304  */
 305 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 306 {
 307         int i;
 308         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 309                 if (rxq->pool[i].skb != NULL) {
 310                         pci_unmap_single(priv->pci_dev,
 311                                          rxq->pool[i].real_dma_addr,
 312                                          priv->hw_params.rx_buf_size + 256,
 313                                          PCI_DMA_FROMDEVICE);
 314                         dev_kfree_skb(rxq->pool[i].skb);
 315                 }
 316         }
 317
 318         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 319                             rxq->dma_addr);
 320         rxq->bd = NULL;
 321 }
 322 EXPORT_SYMBOL(iwl_rx_queue_free);
 323
 324 int iwl_rx_queue_alloc(struct iwl_priv *priv)
 325 {
 326         struct iwl_rx_queue *rxq = &priv->rxq;
 327         struct pci_dev *dev = priv->pci_dev;
 328         int i;
 329
 330         spin_lock_init(&rxq->lock);
 331         INIT_LIST_HEAD(&rxq->rx_free);
 332         INIT_LIST_HEAD(&rxq->rx_used);
 333
 334         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
 335         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
 336         if (!rxq->bd)
 337                 return -ENOMEM;
 338
 339         /* Fill the rx_used queue with _all_ of the Rx buffers */
 340         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
 341                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 342
 343         /* Set us so that we have processed and used all buffers, but have
 344          * not restocked the Rx queue with fresh buffers */
 345         rxq->read = rxq->write = 0;
 346         rxq->free_count = 0;
 347         rxq->need_update = 0;
 348         return 0;
 349 }
 350 EXPORT_SYMBOL(iwl_rx_queue_alloc);
 351
 352 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 353 {
 354         unsigned long flags;
 355         int i;
 356         spin_lock_irqsave(&rxq->lock, flags);
 357         INIT_LIST_HEAD(&rxq->rx_free);
 358         INIT_LIST_HEAD(&rxq->rx_used);
 359         /* Fill the rx_used queue with _all_ of the Rx buffers */
 360         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
 361                 /* In the reset function, these buffers may have been allocated
 362                  * to an SKB, so we need to unmap and free potential storage */
 363                 if (rxq->pool[i].skb != NULL) {
 364                         pci_unmap_single(priv->pci_dev,
 365                                          rxq->pool[i].real_dma_addr,
 366                                          priv->hw_params.rx_buf_size + 256,
 367                                          PCI_DMA_FROMDEVICE);
 368                         priv->alloc_rxb_skb--;
 369                         dev_kfree_skb(rxq->pool[i].skb);
 370                         rxq->pool[i].skb = NULL;
 371                 }
 372                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 373         }
 374
 375         /* Set us so that we have processed and used all buffers, but have
 376          * not restocked the Rx queue with fresh buffers */
 377         rxq->read = rxq->write = 0;
 378         rxq->free_count = 0;
 379         spin_unlock_irqrestore(&rxq->lock, flags);
 380 }
 381 EXPORT_SYMBOL(iwl_rx_queue_reset);
 382
 383 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 384 {
 385         int ret;
 386         unsigned long flags;
 387         u32 rb_size;
 388         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 389         const u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT why this stalls RX */
 390
 391         spin_lock_irqsave(&priv->lock, flags);
 392         ret = iwl_grab_nic_access(priv);
 393         if (ret) {
 394                 spin_unlock_irqrestore(&priv->lock, flags);
 395                 return ret;
 396         }
 397
 398         if (priv->cfg->mod_params->amsdu_size_8K)
 399                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 400         else
 401                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 402
 403         /* Stop Rx DMA */
 404         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 405
 406         /* Reset driver's Rx queue write index */
 407         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 408
 409         /* Tell device where to find RBD circular buffer in DRAM */
 410         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 411                            (u32)(rxq->dma_addr >> 8));
 412
 413         /* Tell device where in DRAM to update its Rx status */
 414         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 415                            (priv->shared_phys + priv->rb_closed_offset) >> 4);
 416
 417         /* Enable Rx DMA
 418          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set becuase of HW bug in
 419          *      the credit mechanism in 5000 HW RX FIFO
 420          * Direct rx interrupts to hosts
 421          * Rx buffer size 4 or 8k
 422          * RB timeout 0x10
 423          * 256 RBDs
 424          */
 425         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 426                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 427                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 428                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 429                            rb_size|
 430                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 431                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 432
 433         iwl_release_nic_access(priv);
 434
 435         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
 436
 437         spin_unlock_irqrestore(&priv->lock, flags);
 438
 439         return 0;
 440 }
 441
 442 int iwl_rxq_stop(struct iwl_priv *priv)
 443 {
 444         int ret;
 445         unsigned long flags;
 446
 447         spin_lock_irqsave(&priv->lock, flags);
 448         ret = iwl_grab_nic_access(priv);
 449         if (unlikely(ret)) {
 450                 spin_unlock_irqrestore(&priv->lock, flags);
 451                 return ret;
 452         }
 453
 454         /* stop Rx DMA */
 455         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 456         ret = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 457                                      (1 << 24), 1000);
 458         if (ret < 0)
 459                 IWL_ERROR("Can't stop Rx DMA.\n");
 460
 461         iwl_release_nic_access(priv);
 462         spin_unlock_irqrestore(&priv->lock, flags);
 463
 464         return 0;
 465 }
 466 EXPORT_SYMBOL(iwl_rxq_stop);
 467
 468 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
 469                                 struct iwl_rx_mem_buffer *rxb)
 470
 471 {
 472         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 473         struct iwl4965_missed_beacon_notif *missed_beacon;
 474
 475         missed_beacon = &pkt->u.missed_beacon;
 476         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
 477                 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
 478                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
 479                     le32_to_cpu(missed_beacon->total_missed_becons),
 480                     le32_to_cpu(missed_beacon->num_recvd_beacons),
 481                     le32_to_cpu(missed_beacon->num_expected_beacons));
 482                 if (!test_bit(STATUS_SCANNING, &priv->status))
 483                         iwl_init_sensitivity(priv);
 484         }
 485 }
 486 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
 487
 488 int iwl_rx_agg_start(struct iwl_priv *priv, const u8 *addr, int tid, u16 ssn)
 489 {
 490         unsigned long flags;
 491         int sta_id;
 492
 493         sta_id = iwl_find_station(priv, addr);
 494         if (sta_id == IWL_INVALID_STATION)
 495                 return -ENXIO;
 496
 497         spin_lock_irqsave(&priv->sta_lock, flags);
 498         priv->stations[sta_id].sta.station_flags_msk = 0;
 499         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
 500         priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
 501         priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
 502         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
 503         spin_unlock_irqrestore(&priv->sta_lock, flags);
 504
 505         return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
 506                                         CMD_ASYNC);
 507 }
 508 EXPORT_SYMBOL(iwl_rx_agg_start);
 509
 510 int iwl_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
 511 {
 512         unsigned long flags;
 513         int sta_id;
 514
 515         sta_id = iwl_find_station(priv, addr);
 516         if (sta_id == IWL_INVALID_STATION)
 517                 return -ENXIO;
 518
 519         spin_lock_irqsave(&priv->sta_lock, flags);
 520         priv->stations[sta_id].sta.station_flags_msk = 0;
 521         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
 522         priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
 523         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
 524         spin_unlock_irqrestore(&priv->sta_lock, flags);
 525
 526         return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
 527                                         CMD_ASYNC);
 528 }
 529 EXPORT_SYMBOL(iwl_rx_agg_stop);
 530
 531
 532 /* Calculate noise level, based on measurements during network silence just
 533  *   before arriving beacon.  This measurement can be done only if we know
 534  *   exactly when to expect beacons, therefore only when we're associated. */
 535 static void iwl_rx_calc_noise(struct iwl_priv *priv)
 536 {
 537         struct statistics_rx_non_phy *rx_info
 538                                 = &(priv->statistics.rx.general);
 539         int num_active_rx = 0;
 540         int total_silence = 0;
 541         int bcn_silence_a =
 542                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
 543         int bcn_silence_b =
 544                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
 545         int bcn_silence_c =
 546                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
 547
 548         if (bcn_silence_a) {
 549                 total_silence += bcn_silence_a;
 550                 num_active_rx++;
 551         }
 552         if (bcn_silence_b) {
 553                 total_silence += bcn_silence_b;
 554                 num_active_rx++;
 555         }
 556         if (bcn_silence_c) {
 557                 total_silence += bcn_silence_c;
 558                 num_active_rx++;
 559         }
 560
 561         /* Average among active antennas */
 562         if (num_active_rx)
 563                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
 564         else
 565                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 566
 567         IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
 568                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
 569                         priv->last_rx_noise);
 570 }
 571
 572 #define REG_RECALIB_PERIOD (60)
 573
 574 void iwl_rx_statistics(struct iwl_priv *priv,
 575                               struct iwl_rx_mem_buffer *rxb)
 576 {
 577         int change;
 578         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 579
 580         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 581                      (int)sizeof(priv->statistics), pkt->len);
 582
 583         change = ((priv->statistics.general.temperature !=
 584                    pkt->u.stats.general.temperature) ||
 585                   ((priv->statistics.flag &
 586                     STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
 587                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
 588
 589         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
 590
 591         set_bit(STATUS_STATISTICS, &priv->status);
 592
 593         /* Reschedule the statistics timer to occur in
 594          * REG_RECALIB_PERIOD seconds to ensure we get a
 595          * thermal update even if the uCode doesn't give
 596          * us one */
 597         mod_timer(&priv->statistics_periodic, jiffies +
 598                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
 599
 600         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
 601             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
 602                 iwl_rx_calc_noise(priv);
 603                 queue_work(priv->workqueue, &priv->run_time_calib_work);
 604         }
 605
 606         iwl_leds_background(priv);
 607
 608         if (priv->cfg->ops->lib->temperature && change)
 609                 priv->cfg->ops->lib->temperature(priv);
 610 }
 611 EXPORT_SYMBOL(iwl_rx_statistics);
 612
 613 #define PERFECT_RSSI (-20) /* dBm */
 614 #define WORST_RSSI (-95)   /* dBm */
 615 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
 616
 617 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
 618  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
 619  *   about formulas used below. */
 620 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
 621 {
 622         int sig_qual;
 623         int degradation = PERFECT_RSSI - rssi_dbm;
 624
 625         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
 626          * as indicator; formula is (signal dbm - noise dbm).
 627          * SNR at or above 40 is a great signal (100%).
 628          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
 629          * Weakest usable signal is usually 10 - 15 dB SNR. */
 630         if (noise_dbm) {
 631                 if (rssi_dbm - noise_dbm >= 40)
 632                         return 100;
 633                 else if (rssi_dbm < noise_dbm)
 634                         return 0;
 635                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
 636
 637         /* Else use just the signal level.
 638          * This formula is a least squares fit of data points collected and
 639          *   compared with a reference system that had a percentage (%) display
 640          *   for signal quality. */
 641         } else
 642                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
 643                             (15 * RSSI_RANGE + 62 * degradation)) /
 644                            (RSSI_RANGE * RSSI_RANGE);
 645
 646         if (sig_qual > 100)
 647                 sig_qual = 100;
 648         else if (sig_qual < 1)
 649                 sig_qual = 0;
 650
 651         return sig_qual;
 652 }
 653
 654 #ifdef CONFIG_IWLWIFI_DEBUG
 655
 656 /**
 657  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
 658  *
 659  * You may hack this function to show different aspects of received frames,
 660  * including selective frame dumps.
 661  * group100 parameter selects whether to show 1 out of 100 good frames.
 662  *
 663  * TODO:  This was originally written for 3945, need to audit for
 664  *        proper operation with 4965.
 665  */
 666 static void iwl_dbg_report_frame(struct iwl_priv *priv,
 667                       struct iwl_rx_packet *pkt,
 668                       struct ieee80211_hdr *header, int group100)
 669 {
 670         u32 to_us;
 671         u32 print_summary = 0;
 672         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 673         u32 hundred = 0;
 674         u32 dataframe = 0;
 675         __le16 fc;
 676         u16 seq_ctl;
 677         u16 channel;
 678         u16 phy_flags;
 679         int rate_sym;
 680         u16 length;
 681         u16 status;
 682         u16 bcn_tmr;
 683         u32 tsf_low;
 684         u64 tsf;
 685         u8 rssi;
 686         u8 agc;
 687         u16 sig_avg;
 688         u16 noise_diff;
 689         struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 690         struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 691         struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
 692         u8 *data = IWL_RX_DATA(pkt);
 693
 694         if (likely(!(priv->debug_level & IWL_DL_RX)))
 695                 return;
 696
 697         /* MAC header */
 698         fc = header->frame_control;
 699         seq_ctl = le16_to_cpu(header->seq_ctrl);
 700
 701         /* metadata */
 702         channel = le16_to_cpu(rx_hdr->channel);
 703         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 704         rate_sym = rx_hdr->rate;
 705         length = le16_to_cpu(rx_hdr->len);
 706
 707         /* end-of-frame status and timestamp */
 708         status = le32_to_cpu(rx_end->status);
 709         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 710         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 711         tsf = le64_to_cpu(rx_end->timestamp);
 712
 713         /* signal statistics */
 714         rssi = rx_stats->rssi;
 715         agc = rx_stats->agc;
 716         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 717         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 718
 719         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 720
 721         /* if data frame is to us and all is good,
 722          *   (optionally) print summary for only 1 out of every 100 */
 723         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 724             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 725                 dataframe = 1;
 726                 if (!group100)
 727                         print_summary = 1;      /* print each frame */
 728                 else if (priv->framecnt_to_us < 100) {
 729                         priv->framecnt_to_us++;
 730                         print_summary = 0;
 731                 } else {
 732                         priv->framecnt_to_us = 0;
 733                         print_summary = 1;
 734                         hundred = 1;
 735                 }
 736         } else {
 737                 /* print summary for all other frames */
 738                 print_summary = 1;
 739         }
 740
 741         if (print_summary) {
 742                 char *title;
 743                 int rate_idx;
 744                 u32 bitrate;
 745
 746                 if (hundred)
 747                         title = "100Frames";
 748                 else if (ieee80211_has_retry(fc))
 749                         title = "Retry";
 750                 else if (ieee80211_is_assoc_resp(fc))
 751                         title = "AscRsp";
 752                 else if (ieee80211_is_reassoc_resp(fc))
 753                         title = "RasRsp";
 754                 else if (ieee80211_is_probe_resp(fc)) {
 755                         title = "PrbRsp";
 756                         print_dump = 1; /* dump frame contents */
 757                 } else if (ieee80211_is_beacon(fc)) {
 758                         title = "Beacon";
 759                         print_dump = 1; /* dump frame contents */
 760                 } else if (ieee80211_is_atim(fc))
 761                         title = "ATIM";
 762                 else if (ieee80211_is_auth(fc))
 763                         title = "Auth";
 764                 else if (ieee80211_is_deauth(fc))
 765                         title = "DeAuth";
 766                 else if (ieee80211_is_disassoc(fc))
 767                         title = "DisAssoc";
 768                 else
 769                         title = "Frame";
 770
 771                 rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
 772                 if (unlikely(rate_idx == -1))
 773                         bitrate = 0;
 774                 else
 775                         bitrate = iwl_rates[rate_idx].ieee / 2;
 776
 777                 /* print frame summary.
 778                  * MAC addresses show just the last byte (for brevity),
 779                  *    but you can hack it to show more, if you'd like to. */
 780                 if (dataframe)
 781                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 782                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
 783                                      title, le16_to_cpu(fc), header->addr1[5],
 784                                      length, rssi, channel, bitrate);
 785                 else {
 786                         /* src/dst addresses assume managed mode */
 787                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 788                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 789                                      "phy=0x%02x, chnl=%d\n",
 790                                      title, le16_to_cpu(fc), header->addr1[5],
 791                                      header->addr3[5], rssi,
 792                                      tsf_low - priv->scan_start_tsf,
 793                                      phy_flags, channel);
 794                 }
 795         }
 796         if (print_dump)
 797                 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
 798 }
 799 #else
 800 static inline void iwl_dbg_report_frame(struct iwl_priv *priv,
 801                                             struct iwl_rx_packet *pkt,
 802                                             struct ieee80211_hdr *header,
 803                                             int group100)
 804 {
 805 }
 806 #endif
 807
 808 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
 809 {
 810         /* 0 - mgmt, 1 - cnt, 2 - data */
 811         int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
 812         priv->rx_stats[idx].cnt++;
 813         priv->rx_stats[idx].bytes += len;
 814 }
 815
 816 /*
 817  * returns non-zero if packet should be dropped
 818  */
 819 static int iwl_set_decrypted_flag(struct iwl_priv *priv,
 820                                       struct ieee80211_hdr *hdr,
 821                                       u32 decrypt_res,
 822                                       struct ieee80211_rx_status *stats)
 823 {
 824         u16 fc = le16_to_cpu(hdr->frame_control);
 825
 826         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
 827                 return 0;
 828
 829         if (!(fc & IEEE80211_FCTL_PROTECTED))
 830                 return 0;
 831
 832         IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
 833         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
 834         case RX_RES_STATUS_SEC_TYPE_TKIP:
 835                 /* The uCode has got a bad phase 1 Key, pushes the packet.
 836                  * Decryption will be done in SW. */
 837                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 838                     RX_RES_STATUS_BAD_KEY_TTAK)
 839                         break;
 840
 841         case RX_RES_STATUS_SEC_TYPE_WEP:
 842                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 843                     RX_RES_STATUS_BAD_ICV_MIC) {
 844                         /* bad ICV, the packet is destroyed since the
 845                          * decryption is inplace, drop it */
 846                         IWL_DEBUG_RX("Packet destroyed\n");
 847                         return -1;
 848                 }
 849         case RX_RES_STATUS_SEC_TYPE_CCMP:
 850                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
 851                     RX_RES_STATUS_DECRYPT_OK) {
 852                         IWL_DEBUG_RX("hw decrypt successfully!!!\n");
 853                         stats->flag |= RX_FLAG_DECRYPTED;
 854                 }
 855                 break;
 856
 857         default:
 858                 break;
 859         }
 860         return 0;
 861 }
 862
 863 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 864 {
 865         u32 decrypt_out = 0;
 866
 867         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 868                                         RX_RES_STATUS_STATION_FOUND)
 869                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 870                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 871
 872         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 873
 874         /* packet was not encrypted */
 875         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 876                                         RX_RES_STATUS_SEC_TYPE_NONE)
 877                 return decrypt_out;
 878
 879         /* packet was encrypted with unknown alg */
 880         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 881                                         RX_RES_STATUS_SEC_TYPE_ERR)
 882                 return decrypt_out;
 883
 884         /* decryption was not done in HW */
 885         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 886                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 887                 return decrypt_out;
 888
 889         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 890
 891         case RX_RES_STATUS_SEC_TYPE_CCMP:
 892                 /* alg is CCM: check MIC only */
 893                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 894                         /* Bad MIC */
 895                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 896                 else
 897                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 898
 899                 break;
 900
 901         case RX_RES_STATUS_SEC_TYPE_TKIP:
 902                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 903                         /* Bad TTAK */
 904                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 905                         break;
 906                 }
 907                 /* fall through if TTAK OK */
 908         default:
 909                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 910                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 911                 else
 912                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 913                 break;
 914         };
 915
 916         IWL_DEBUG_RX("decrypt_in:0x%x  decrypt_out = 0x%x\n",
 917                                         decrypt_in, decrypt_out);
 918
 919         return decrypt_out;
 920 }
 921
 922 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
 923                                        int include_phy,
 924                                        struct iwl_rx_mem_buffer *rxb,
 925                                        struct ieee80211_rx_status *stats)
 926 {
 927         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 928         struct iwl_rx_phy_res *rx_start = (include_phy) ?
 929             (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
 930         struct ieee80211_hdr *hdr;
 931         u16 len;
 932         __le32 *rx_end;
 933         unsigned int skblen;
 934         u32 ampdu_status;
 935         u32 ampdu_status_legacy;
 936
 937         if (!include_phy && priv->last_phy_res[0])
 938                 rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
 939
 940         if (!rx_start) {
 941                 IWL_ERROR("MPDU frame without a PHY data\n");
 942                 return;
 943         }
 944         if (include_phy) {
 945                 hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
 946                                                rx_start->cfg_phy_cnt);
 947
 948                 len = le16_to_cpu(rx_start->byte_count);
 949
 950                 rx_end = (__le32 *)((u8 *) &pkt->u.raw[0] +
 951                                   sizeof(struct iwl_rx_phy_res) +
 952                                   rx_start->cfg_phy_cnt + len);
 953
 954         } else {
 955                 struct iwl4965_rx_mpdu_res_start *amsdu =
 956                     (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
 957
 958                 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
 959                                sizeof(struct iwl4965_rx_mpdu_res_start));
 960                 len =  le16_to_cpu(amsdu->byte_count);
 961                 rx_start->byte_count = amsdu->byte_count;
 962                 rx_end = (__le32 *) (((u8 *) hdr) + len);
 963         }
 964
 965         ampdu_status = le32_to_cpu(*rx_end);
 966         skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
 967
 968         if (!include_phy) {
 969                 /* New status scheme, need to translate */
 970                 ampdu_status_legacy = ampdu_status;
 971                 ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
 972         }
 973
 974         /* start from MAC */
 975         skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
 976         skb_put(rxb->skb, len); /* end where data ends */
 977
 978         /* We only process data packets if the interface is open */
 979         if (unlikely(!priv->is_open)) {
 980                 IWL_DEBUG_DROP_LIMIT
 981                     ("Dropping packet while interface is not open.\n");
 982                 return;
 983         }
 984
 985         hdr = (struct ieee80211_hdr *)rxb->skb->data;
 986
 987         /*  in case of HW accelerated crypto and bad decryption, drop */
 988         if (!priv->hw_params.sw_crypto &&
 989             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 990                 return;
 991
 992         iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
 993         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 994         priv->alloc_rxb_skb--;
 995         rxb->skb = NULL;
 996 }
 997
 998 /* Calc max signal level (dBm) among 3 possible receivers */
 999 static inline int iwl_calc_rssi(struct iwl_priv *priv,
1000                                 struct iwl_rx_phy_res *rx_resp)
1001 {
1002         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
1003 }
1004
1005
1006 static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
1007 {
1008         unsigned long flags;
1009
1010         spin_lock_irqsave(&priv->sta_lock, flags);
1011         priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
1012         priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
1013         priv->stations[sta_id].sta.sta.modify_mask = 0;
1014         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1015         spin_unlock_irqrestore(&priv->sta_lock, flags);
1016
1017         iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
1018 }
1019
1020 static void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
1021 {
1022         /* FIXME: need locking over ps_status ??? */
1023         u8 sta_id = iwl_find_station(priv, addr);
1024
1025         if (sta_id != IWL_INVALID_STATION) {
1026                 u8 sta_awake = priv->stations[sta_id].
1027                                 ps_status == STA_PS_STATUS_WAKE;
1028
1029                 if (sta_awake && ps_bit)
1030                         priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
1031                 else if (!sta_awake && !ps_bit) {
1032                         iwl_sta_modify_ps_wake(priv, sta_id);
1033                         priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
1034                 }
1035         }
1036 }
1037
1038 /* This is necessary only for a number of statistics, see the caller. */
1039 static int iwl_is_network_packet(struct iwl_priv *priv,
1040                 struct ieee80211_hdr *header)
1041 {
1042         /* Filter incoming packets to determine if they are targeted toward
1043          * this network, discarding packets coming from ourselves */
1044         switch (priv->iw_mode) {
1045         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
1046                 /* packets to our IBSS update information */
1047                 return !compare_ether_addr(header->addr3, priv->bssid);
1048         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
1049                 /* packets to our IBSS update information */
1050                 return !compare_ether_addr(header->addr2, priv->bssid);
1051         default:
1052                 return 1;
1053         }
1054 }
1055
1056 /* Called for REPLY_RX (legacy ABG frames), or
1057  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1058 void iwl_rx_reply_rx(struct iwl_priv *priv,
1059                                 struct iwl_rx_mem_buffer *rxb)
1060 {
1061         struct ieee80211_hdr *header;
1062         struct ieee80211_rx_status rx_status;
1063         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1064         /* Use phy data (Rx signal strength, etc.) contained within
1065          *   this rx packet for legacy frames,
1066          *   or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
1067         int include_phy = (pkt->hdr.cmd == REPLY_RX);
1068         struct iwl_rx_phy_res *rx_start = (include_phy) ?
1069                 (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) :
1070                 (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1071         __le32 *rx_end;
1072         unsigned int len = 0;
1073         u16 fc;
1074         u8 network_packet;
1075
1076         rx_status.mactime = le64_to_cpu(rx_start->timestamp);
1077         rx_status.freq =
1078                 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
1079         rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1080                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1081         rx_status.rate_idx =
1082                 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
1083         if (rx_status.band == IEEE80211_BAND_5GHZ)
1084                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
1085
1086         rx_status.flag = 0;
1087
1088         /* TSF isn't reliable. In order to allow smooth user experience,
1089          * this W/A doesn't propagate it to the mac80211 */
1090         /*rx_status.flag |= RX_FLAG_TSFT;*/
1091
1092         if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
1093                 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
1094                                 rx_start->cfg_phy_cnt);
1095                 return;
1096         }
1097
1098         if (!include_phy) {
1099                 if (priv->last_phy_res[0])
1100                         rx_start = (struct iwl_rx_phy_res *)
1101                                 &priv->last_phy_res[1];
1102                 else
1103                         rx_start = NULL;
1104         }
1105
1106         if (!rx_start) {
1107                 IWL_ERROR("MPDU frame without a PHY data\n");
1108                 return;
1109         }
1110
1111         if (include_phy) {
1112                 header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
1113                                                   + rx_start->cfg_phy_cnt);
1114
1115                 len = le16_to_cpu(rx_start->byte_count);
1116                 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
1117                                   sizeof(struct iwl_rx_phy_res) + len);
1118         } else {
1119                 struct iwl4965_rx_mpdu_res_start *amsdu =
1120                         (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1121
1122                 header = (void *)(pkt->u.raw +
1123                         sizeof(struct iwl4965_rx_mpdu_res_start));
1124                 len = le16_to_cpu(amsdu->byte_count);
1125                 rx_end = (__le32 *) (pkt->u.raw +
1126                         sizeof(struct iwl4965_rx_mpdu_res_start) + len);
1127         }
1128
1129         if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
1130             !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1131                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
1132                                 le32_to_cpu(*rx_end));
1133                 return;
1134         }
1135
1136         priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
1137
1138         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1139         rx_status.signal = iwl_calc_rssi(priv, rx_start);
1140
1141         /* Meaningful noise values are available only from beacon statistics,
1142          *   which are gathered only when associated, and indicate noise
1143          *   only for the associated network channel ...
1144          * Ignore these noise values while scanning (other channels) */
1145         if (iwl_is_associated(priv) &&
1146             !test_bit(STATUS_SCANNING, &priv->status)) {
1147                 rx_status.noise = priv->last_rx_noise;
1148                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1149                                                          rx_status.noise);
1150         } else {
1151                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1152                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1153         }
1154
1155         /* Reset beacon noise level if not associated. */
1156         if (!iwl_is_associated(priv))
1157                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1158
1159         /* Set "1" to report good data frames in groups of 100 */
1160         /* FIXME: need to optimze the call: */
1161         iwl_dbg_report_frame(priv, pkt, header, 1);
1162
1163         IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
1164                 rx_status.signal, rx_status.noise, rx_status.signal,
1165                 (unsigned long long)rx_status.mactime);
1166
1167         /*
1168          * "antenna number"
1169          *
1170          * It seems that the antenna field in the phy flags value
1171          * is actually a bitfield. This is undefined by radiotap,
1172          * it wants an actual antenna number but I always get "7"
1173          * for most legacy frames I receive indicating that the
1174          * same frame was received on all three RX chains.
1175          *
1176          * I think this field should be removed in favour of a
1177          * new 802.11n radiotap field "RX chains" that is defined
1178          * as a bitmask.
1179          */
1180         rx_status.antenna = le16_to_cpu(rx_start->phy_flags &
1181                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
1182
1183         /* set the preamble flag if appropriate */
1184         if (rx_start->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1185                 rx_status.flag |= RX_FLAG_SHORTPRE;
1186
1187         /* Take shortcut when only in monitor mode */
1188         if (priv->iw_mode == NL80211_IFTYPE_MONITOR) {
1189                 iwl_pass_packet_to_mac80211(priv, include_phy,
1190                                                  rxb, &rx_status);
1191                 return;
1192         }
1193
1194         network_packet = iwl_is_network_packet(priv, header);
1195         if (network_packet) {
1196                 priv->last_rx_rssi = rx_status.signal;
1197                 priv->last_beacon_time =  priv->ucode_beacon_time;
1198                 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
1199         }
1200
1201         fc = le16_to_cpu(header->frame_control);
1202         switch (fc & IEEE80211_FCTL_FTYPE) {
1203         case IEEE80211_FTYPE_MGMT:
1204         case IEEE80211_FTYPE_DATA:
1205                 if (priv->iw_mode == NL80211_IFTYPE_AP)
1206                         iwl_update_ps_mode(priv, fc  & IEEE80211_FCTL_PM,
1207                                                 header->addr2);
1208                 /* fall through */
1209         default:
1210                         iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
1211                                    &rx_status);
1212                 break;
1213
1214         }
1215 }
1216 EXPORT_SYMBOL(iwl_rx_reply_rx);
1217
1218 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1219  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1220 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1221                                     struct iwl_rx_mem_buffer *rxb)
1222 {
1223         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1224         priv->last_phy_res[0] = 1;
1225         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1226                sizeof(struct iwl_rx_phy_res));
1227 }
1228 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);