]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blob - drivers/mtd/nand/omap-nand-flash.c
Merge branch 'omap-fixes'
[linux-2.6-omap-h63xx.git] / drivers / mtd / nand / omap-nand-flash.c
1 /*
2  * drivers/mtd/nand/omap-nand-flash.c
3  *
4  * Copyright (c) 2004 Texas Instruments, Jian Zhang <jzhang@ti.com>
5  * Copyright (c) 2004 David Brownell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/delay.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/types.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22
23 #include <asm/io.h>
24 #include <mach/hardware.h>
25 #include <asm/mach-types.h>
26 #include <asm/mach/flash.h>
27 #include <mach/tc.h>
28
29 #include <mach/nand.h>
30
31 #define DRIVER_NAME     "omapnand"
32
33 #ifdef CONFIG_MTD_PARTITIONS
34 static const char *part_probes[] = { "cmdlinepart", NULL };
35 #endif
36
37 struct omap_nand_info {
38         struct omap_nand_platform_data *pdata;
39         struct mtd_partition    *parts;
40         struct mtd_info         mtd;
41         struct nand_chip        nand;
42 };
43
44 /*
45  *      hardware specific access to control-lines
46  *      NOTE:  boards may use different bits for these!!
47  *
48  *      ctrl:
49  *      NAND_NCE: bit 0 - don't care
50  *      NAND_CLE: bit 1 -> bit 1  (0x0002)
51  *      NAND_ALE: bit 2 -> bit 2  (0x0004)
52  */
53
54 static void omap_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
55 {
56         struct nand_chip *chip = mtd->priv;
57         unsigned long mask;
58
59         if (cmd == NAND_CMD_NONE)
60                 return;
61
62         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
63         if (ctrl & NAND_ALE)
64                 mask |= 0x04;
65         writeb(cmd, (unsigned long)chip->IO_ADDR_W | mask);
66 }
67
68 static int omap_nand_dev_ready(struct mtd_info *mtd)
69 {
70         struct omap_nand_info *info = container_of(mtd, struct omap_nand_info, mtd);
71
72         return info->pdata->dev_ready(info->pdata);
73 }
74
75 static int __devinit omap_nand_probe(struct platform_device *pdev)
76 {
77         struct omap_nand_info           *info;
78         struct omap_nand_platform_data  *pdata = pdev->dev.platform_data;
79         struct resource                 *res = pdev->resource;
80         unsigned long                   size = res->end - res->start + 1;
81         int                             err;
82
83         info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
84         if (!info)
85                 return -ENOMEM;
86
87         if (!request_mem_region(res->start, size, pdev->dev.driver->name)) {
88                 err = -EBUSY;
89                 goto out_free_info;
90         }
91
92         info->nand.IO_ADDR_R = ioremap(res->start, size);
93         if (!info->nand.IO_ADDR_R) {
94                 err = -ENOMEM;
95                 goto out_release_mem_region;
96         }
97         info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
98         info->nand.cmd_ctrl = omap_nand_hwcontrol;
99         info->nand.ecc.mode = NAND_ECC_SOFT;
100         info->nand.options = pdata->options;
101         if (pdata->dev_ready)
102                 info->nand.dev_ready = omap_nand_dev_ready;
103         else
104                 info->nand.chip_delay = 20;
105
106         info->mtd.name = dev_name(&pdev->dev);
107         info->mtd.priv = &info->nand;
108
109         info->pdata = pdata;
110
111         /* DIP switches on H2 and some other boards change between 8 and 16 bit
112          * bus widths for flash.  Try the other width if the first try fails.
113          */
114         if (nand_scan(&info->mtd, 1)) {
115                 info->nand.options ^= NAND_BUSWIDTH_16;
116                 if (nand_scan(&info->mtd, 1)) {
117                         err = -ENXIO;
118                         goto out_iounmap;
119                 }
120         }
121         info->mtd.owner = THIS_MODULE;
122
123 #ifdef CONFIG_MTD_PARTITIONS
124         err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
125         if (err > 0)
126                 add_mtd_partitions(&info->mtd, info->parts, err);
127         else if (err < 0 && pdata->parts)
128                 add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts);
129         else
130 #endif
131                 add_mtd_device(&info->mtd);
132
133         platform_set_drvdata(pdev, info);
134
135         return 0;
136
137 out_iounmap:
138         iounmap(info->nand.IO_ADDR_R);
139 out_release_mem_region:
140         release_mem_region(res->start, size);
141 out_free_info:
142         kfree(info);
143
144         return err;
145 }
146
147 static int omap_nand_remove(struct platform_device *pdev)
148 {
149         struct omap_nand_info *info = platform_get_drvdata(pdev);
150
151         platform_set_drvdata(pdev, NULL);
152         /* Release NAND device, its internal structures and partitions */
153         nand_release(&info->mtd);
154         iounmap(info->nand.IO_ADDR_R);
155         kfree(info);
156         return 0;
157 }
158
159 static struct platform_driver omap_nand_driver = {
160         .probe          = omap_nand_probe,
161         .remove         = omap_nand_remove,
162         .driver         = {
163                 .name   = DRIVER_NAME,
164         },
165 };
166 MODULE_ALIAS(DRIVER_NAME);
167
168 static int __init omap_nand_init(void)
169 {
170         return platform_driver_register(&omap_nand_driver);
171 }
172
173 static void __exit omap_nand_exit(void)
174 {
175         platform_driver_unregister(&omap_nand_driver);
176 }
177
178 module_init(omap_nand_init);
179 module_exit(omap_nand_exit);
180
181 MODULE_LICENSE("GPL");
182 MODULE_AUTHOR("Jian Zhang <jzhang@ti.com> (and others)");
183 MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");
184