2 * Driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
14 * This code is placed under the terms of the GNU General Public License
17 * debug - set to 1 if you'd like to see debug messages
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/string.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/slab.h>
29 #include <linux/videodev.h>
30 #include <linux/i2c.h>
31 #include <linux/init.h>
32 #include <linux/kthread.h>
33 #include <linux/freezer.h>
35 #include <media/tvaudio.h>
36 #include <media/v4l2-common.h>
37 #include <media/v4l2-chip-ident.h>
38 #include <media/v4l2-i2c-drv-legacy.h>
40 #include <media/i2c-addr.h>
42 /* ---------------------------------------------------------------------- */
45 static int debug; /* insmod parameter */
46 module_param(debug, int, 0644);
48 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50 MODULE_LICENSE("GPL");
54 /* ---------------------------------------------------------------------- */
60 typedef int (*getvalue)(int);
61 typedef int (*checkit)(struct CHIPSTATE*);
62 typedef int (*initialize)(struct CHIPSTATE*);
63 typedef int (*getmode)(struct CHIPSTATE*);
64 typedef void (*setmode)(struct CHIPSTATE*, int mode);
67 typedef struct AUDIOCMD {
68 int count; /* # of bytes to send */
69 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
72 /* chip description */
74 char *name; /* chip name */
75 int addr_lo, addr_hi; /* i2c address range */
76 int registers; /* # of registers */
80 initialize initialize;
82 #define CHIP_HAS_VOLUME 1
83 #define CHIP_HAS_BASSTREBLE 2
84 #define CHIP_HAS_INPUTSEL 4
85 #define CHIP_NEED_CHECKMODE 8
87 /* various i2c command sequences */
90 /* which register has which value */
91 int leftreg,rightreg,treblereg,bassreg;
93 /* initialize with (defaults to 65535/65535/32768/32768 */
94 int leftinit,rightinit,trebleinit,bassinit;
96 /* functions to convert the values (v4l -> chip) */
97 getvalue volfunc,treblefunc,bassfunc;
103 /* input switch register + values for v4l inputs */
110 /* current state of the chip */
112 struct i2c_client *c;
114 /* chip-specific description - should point to
115 an entry at CHIPDESC table */
116 struct CHIPDESC *desc;
118 /* shadow register set */
121 /* current settings */
122 __u16 left,right,treble,bass,muted,mode;
128 struct task_struct *thread;
129 struct timer_list wt;
134 /* ---------------------------------------------------------------------- */
137 static unsigned short normal_i2c[] = {
138 I2C_ADDR_TDA8425 >> 1,
139 I2C_ADDR_TEA6300 >> 1,
140 I2C_ADDR_TEA6420 >> 1,
141 I2C_ADDR_TDA9840 >> 1,
142 I2C_ADDR_TDA985x_L >> 1,
143 I2C_ADDR_TDA985x_H >> 1,
144 I2C_ADDR_TDA9874 >> 1,
145 I2C_ADDR_PIC16C54 >> 1,
149 /* ---------------------------------------------------------------------- */
150 /* i2c I/O functions */
152 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
154 unsigned char buffer[2];
157 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
159 chip->shadow.bytes[1] = val;
161 if (1 != i2c_master_send(chip->c,buffer,1)) {
162 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
167 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
169 "Tried to access a non-existent register: %d\n",
174 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
175 chip->c->name, subaddr, val);
176 chip->shadow.bytes[subaddr+1] = val;
179 if (2 != i2c_master_send(chip->c,buffer,2)) {
180 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
181 chip->c->name, subaddr, val);
188 static int chip_write_masked(struct CHIPSTATE *chip,
189 int subaddr, int val, int mask)
193 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
195 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
197 "Tried to access a non-existent register: %d\n",
202 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
205 return chip_write(chip, subaddr, val);
208 static int chip_read(struct CHIPSTATE *chip)
210 unsigned char buffer;
212 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
213 v4l_warn(chip->c, "%s: I/O error (read)\n",
217 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
221 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
223 unsigned char write[1];
224 unsigned char read[1];
225 struct i2c_msg msgs[2] = {
226 { chip->c->addr, 0, 1, write },
227 { chip->c->addr, I2C_M_RD, 1, read }
231 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
232 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
235 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
236 chip->c->name, subaddr,read[0]);
240 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
247 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
249 "Tried to access a non-existent register range: %d to %d\n",
250 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
254 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
256 /* update our shadow register set; print bytes if (debug > 0) */
257 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
258 chip->c->name, name,cmd->bytes[0]);
259 for (i = 1; i < cmd->count; i++) {
261 printk(" 0x%x",cmd->bytes[i]);
262 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
267 /* send data to the chip */
268 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
269 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
275 /* ---------------------------------------------------------------------- */
276 /* kernel thread for doing i2c stuff asyncronly
277 * right now it is used only to check the audio mode (mono/stereo/whatever)
278 * some time after switching to another TV channel, then turn on stereo
282 static void chip_thread_wake(unsigned long data)
284 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
285 wake_up_process(chip->thread);
288 static int chip_thread(void *data)
290 struct CHIPSTATE *chip = data;
291 struct CHIPDESC *desc = chip->desc;
294 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
297 set_current_state(TASK_INTERRUPTIBLE);
298 if (!kthread_should_stop())
300 set_current_state(TASK_RUNNING);
302 if (kthread_should_stop())
304 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
306 /* don't do anything for radio or if mode != auto */
307 if (chip->radio || chip->mode != 0)
310 /* have a look what's going on */
311 mode = desc->getmode(chip);
312 if (mode == chip->prevmode)
315 /* chip detected a new audio mode - set it */
316 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n",
319 chip->prevmode = mode;
321 if (mode & V4L2_TUNER_MODE_STEREO)
322 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
323 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
324 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
325 else if (mode & V4L2_TUNER_MODE_LANG1)
326 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
327 else if (mode & V4L2_TUNER_MODE_LANG2)
328 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
330 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
332 /* schedule next check */
333 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
336 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
340 /* ---------------------------------------------------------------------- */
341 /* audio chip descriptions - defines+functions for tda9840 */
343 #define TDA9840_SW 0x00
344 #define TDA9840_LVADJ 0x02
345 #define TDA9840_STADJ 0x03
346 #define TDA9840_TEST 0x04
348 #define TDA9840_MONO 0x10
349 #define TDA9840_STEREO 0x2a
350 #define TDA9840_DUALA 0x12
351 #define TDA9840_DUALB 0x1e
352 #define TDA9840_DUALAB 0x1a
353 #define TDA9840_DUALBA 0x16
354 #define TDA9840_EXTERNAL 0x7a
356 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
357 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
358 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
360 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
361 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
363 static int tda9840_getmode(struct CHIPSTATE *chip)
367 val = chip_read(chip);
368 mode = V4L2_TUNER_MODE_MONO;
369 if (val & TDA9840_DS_DUAL)
370 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
371 if (val & TDA9840_ST_STEREO)
372 mode |= V4L2_TUNER_MODE_STEREO;
374 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
379 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
382 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
385 case V4L2_TUNER_MODE_MONO:
388 case V4L2_TUNER_MODE_STEREO:
391 case V4L2_TUNER_MODE_LANG1:
394 case V4L2_TUNER_MODE_LANG2:
402 chip_write(chip, TDA9840_SW, t);
405 static int tda9840_checkit(struct CHIPSTATE *chip)
408 rc = chip_read(chip);
409 /* lower 5 bits should be 0 */
410 return ((rc & 0x1f) == 0) ? 1 : 0;
413 /* ---------------------------------------------------------------------- */
414 /* audio chip descriptions - defines+functions for tda985x */
416 /* subaddresses for TDA9855 */
417 #define TDA9855_VR 0x00 /* Volume, right */
418 #define TDA9855_VL 0x01 /* Volume, left */
419 #define TDA9855_BA 0x02 /* Bass */
420 #define TDA9855_TR 0x03 /* Treble */
421 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
423 /* subaddresses for TDA9850 */
424 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
426 /* subaddesses for both chips */
427 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
428 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
429 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
430 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
431 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
432 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
434 /* Masks for bits in TDA9855 subaddresses */
435 /* 0x00 - VR in TDA9855 */
436 /* 0x01 - VL in TDA9855 */
437 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
438 * in 1dB steps - mute is 0x27 */
441 /* 0x02 - BA in TDA9855 */
442 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
443 * in .5dB steps - 0 is 0x0E */
446 /* 0x03 - TR in TDA9855 */
447 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
448 * in 3dB steps - 0 is 0x7 */
450 /* Masks for bits in both chips' subaddresses */
451 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
452 /* Unique to TDA9855: */
453 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
454 * in 3dB steps - mute is 0x0 */
456 /* Unique to TDA9850: */
457 /* lower 4 bits control stereo noise threshold, over which stereo turns off
458 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
461 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
462 /* Unique to TDA9855: */
463 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
464 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
465 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
466 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
467 /* Bits 0 to 3 select various combinations
468 * of line in and line out, only the
469 * interesting ones are defined */
470 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
471 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
473 /* Unique to TDA9850: */
474 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
475 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
478 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
479 /* Common to TDA9855 and TDA9850: */
480 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
481 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
482 #define TDA985x_MONO 0 /* Forces Mono output */
483 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
485 /* Unique to TDA9855: */
486 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
487 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
488 #define TDA9855_LINEAR 0 /* Linear Stereo */
489 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
490 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
491 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
492 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
494 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
495 /* Common to both TDA9855 and TDA9850: */
496 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
497 * in .5dB steps - 0dB is 0x7 */
499 /* 0x08, 0x09 - A1 and A2 (read/write) */
500 /* Common to both TDA9855 and TDA9850: */
501 /* lower 5 bites are wideband and spectral expander alignment
502 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
503 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
504 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
505 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
508 /* Common to both TDA9855 and TDA9850: */
509 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
510 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
511 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
513 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
514 static int tda9855_bass(int val) { return val/0xccc+0x06; }
515 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
517 static int tda985x_getmode(struct CHIPSTATE *chip)
521 mode = ((TDA985x_STP | TDA985x_SAPP) &
522 chip_read(chip)) >> 4;
523 /* Add mono mode regardless of SAP and stereo */
524 /* Allows forced mono */
525 return mode | V4L2_TUNER_MODE_MONO;
528 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
531 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
534 case V4L2_TUNER_MODE_MONO:
537 case V4L2_TUNER_MODE_STEREO:
538 c6 |= TDA985x_STEREO;
540 case V4L2_TUNER_MODE_LANG1:
547 chip_write(chip,TDA985x_C6,c6);
551 /* ---------------------------------------------------------------------- */
552 /* audio chip descriptions - defines+functions for tda9873h */
554 /* Subaddresses for TDA9873H */
556 #define TDA9873_SW 0x00 /* Switching */
557 #define TDA9873_AD 0x01 /* Adjust */
558 #define TDA9873_PT 0x02 /* Port */
560 /* Subaddress 0x00: Switching Data
563 * B1, B0: Input source selection
565 * 1, 0 external stereo
568 #define TDA9873_INP_MASK 3
569 #define TDA9873_INTERNAL 0
570 #define TDA9873_EXT_STEREO 2
571 #define TDA9873_EXT_MONO 1
573 /* B3, B2: output signal select
574 * B4 : transmission mode
577 * 1, 1, 1 Stereo (reversed channel)
584 #define TDA9873_TR_MASK (7 << 2)
585 #define TDA9873_TR_MONO 4
586 #define TDA9873_TR_STEREO 1 << 4
587 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
588 #define TDA9873_TR_DUALA 1 << 2
589 #define TDA9873_TR_DUALB 1 << 3
591 /* output level controls
592 * B5: output level switch (0 = reduced gain, 1 = normal gain)
593 * B6: mute (1 = muted)
594 * B7: auto-mute (1 = auto-mute enabled)
597 #define TDA9873_GAIN_NORMAL 1 << 5
598 #define TDA9873_MUTE 1 << 6
599 #define TDA9873_AUTOMUTE 1 << 7
601 /* Subaddress 0x01: Adjust/standard */
603 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
604 * Recommended value is +0 dB
607 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
609 /* Bits C6..C4 control FM stantard
611 * 0, 0, 0 B/G (PAL FM)
620 #define TDA9873_DK1 2
621 #define TDA9873_DK2 3
622 #define TDA9873_DK3 4
625 /* C7 controls identification response time (1=fast/0=normal)
627 #define TDA9873_IDR_NORM 0
628 #define TDA9873_IDR_FAST 1 << 7
631 /* Subaddress 0x02: Port data */
633 /* E1, E0 free programmable ports P1/P2
640 #define TDA9873_PORTS 3
643 #define TDA9873_TST_PORT 1 << 2
645 /* E5..E3 control mono output channel (together with transmission mode bit B4)
650 * 0 1 0 1 mono (from stereo decoder)
652 #define TDA9873_MOUT_MONO 0
653 #define TDA9873_MOUT_FMONO 0
654 #define TDA9873_MOUT_DUALA 0
655 #define TDA9873_MOUT_DUALB 1 << 3
656 #define TDA9873_MOUT_ST 1 << 4
657 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
658 #define TDA9873_MOUT_EXTL 1 << 5
659 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
660 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
661 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
663 /* Status bits: (chip read) */
664 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
665 #define TDA9873_STEREO 2 /* Stereo sound is identified */
666 #define TDA9873_DUAL 4 /* Dual sound is identified */
668 static int tda9873_getmode(struct CHIPSTATE *chip)
672 val = chip_read(chip);
673 mode = V4L2_TUNER_MODE_MONO;
674 if (val & TDA9873_STEREO)
675 mode |= V4L2_TUNER_MODE_STEREO;
676 if (val & TDA9873_DUAL)
677 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
678 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
683 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
685 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
686 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
688 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
689 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
693 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
694 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
697 case V4L2_TUNER_MODE_MONO:
698 sw_data |= TDA9873_TR_MONO;
700 case V4L2_TUNER_MODE_STEREO:
701 sw_data |= TDA9873_TR_STEREO;
703 case V4L2_TUNER_MODE_LANG1:
704 sw_data |= TDA9873_TR_DUALA;
706 case V4L2_TUNER_MODE_LANG2:
707 sw_data |= TDA9873_TR_DUALB;
714 chip_write(chip, TDA9873_SW, sw_data);
715 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
719 static int tda9873_checkit(struct CHIPSTATE *chip)
723 if (-1 == (rc = chip_read2(chip,254)))
725 return (rc & ~0x1f) == 0x80;
729 /* ---------------------------------------------------------------------- */
730 /* audio chip description - defines+functions for tda9874h and tda9874a */
731 /* Dariusz Kowalewski <darekk@automex.pl> */
733 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
734 #define TDA9874A_AGCGR 0x00 /* AGC gain */
735 #define TDA9874A_GCONR 0x01 /* general config */
736 #define TDA9874A_MSR 0x02 /* monitor select */
737 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
738 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
739 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
740 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
741 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
742 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
743 #define TDA9874A_DCR 0x09 /* demodulator config */
744 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
745 #define TDA9874A_FMMR 0x0b /* FM dematrix */
746 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
747 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
748 #define TDA9874A_NCONR 0x0e /* NICAM config */
749 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
750 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
751 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
752 #define TDA9874A_AMCONR 0x12 /* audio mute control */
753 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
754 #define TDA9874A_AOSR 0x14 /* analog output select */
755 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
756 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
757 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
758 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
759 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
761 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
762 #define TDA9874A_DSR 0x00 /* device status */
763 #define TDA9874A_NSR 0x01 /* NICAM status */
764 #define TDA9874A_NECR 0x02 /* NICAM error count */
765 #define TDA9874A_DR1 0x03 /* add. data LSB */
766 #define TDA9874A_DR2 0x04 /* add. data MSB */
767 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
768 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
769 #define TDA9874A_SIFLR 0x07 /* SIF level */
770 #define TDA9874A_TR2 252 /* test reg. 2 */
771 #define TDA9874A_TR1 253 /* test reg. 1 */
772 #define TDA9874A_DIC 254 /* device id. code */
773 #define TDA9874A_SIC 255 /* software id. code */
776 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
777 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
778 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
779 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
780 static int tda9874a_dic = -1; /* device id. code */
782 /* insmod options for tda9874a */
783 static unsigned int tda9874a_SIF = UNSET;
784 static unsigned int tda9874a_AMSEL = UNSET;
785 static unsigned int tda9874a_STD = UNSET;
786 module_param(tda9874a_SIF, int, 0444);
787 module_param(tda9874a_AMSEL, int, 0444);
788 module_param(tda9874a_STD, int, 0444);
791 * initialization table for tda9874 decoder:
792 * - carrier 1 freq. registers (3 bytes)
793 * - carrier 2 freq. registers (3 bytes)
794 * - demudulator config register
795 * - FM de-emphasis register (slow identification mode)
796 * Note: frequency registers must be written in single i2c transfer.
798 static struct tda9874a_MODES {
801 } tda9874a_modelist[9] = {
802 { "A2, B/G", /* default */
803 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
805 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
807 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
809 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
811 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
813 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
815 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
817 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
819 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
822 static int tda9874a_setup(struct CHIPSTATE *chip)
824 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
825 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
826 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
827 if(tda9874a_dic == 0x11) {
828 chip_write(chip, TDA9874A_FMMR, 0x80);
829 } else { /* dic == 0x07 */
830 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
831 chip_write(chip, TDA9874A_FMMR, 0x00);
833 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
834 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
835 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
836 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
837 /* Note: If signal quality is poor you may want to change NICAM */
838 /* error limit registers (NLELR and NUELR) to some greater values. */
839 /* Then the sound would remain stereo, but won't be so clear. */
840 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
841 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
843 if(tda9874a_dic == 0x11) {
844 chip_write(chip, TDA9874A_AMCONR, 0xf9);
845 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
846 chip_write(chip, TDA9874A_AOSR, 0x80);
847 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
848 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
849 } else { /* dic == 0x07 */
850 chip_write(chip, TDA9874A_AMCONR, 0xfb);
851 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
852 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
854 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
855 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
859 static int tda9874a_getmode(struct CHIPSTATE *chip)
862 int necr; /* just for debugging */
864 mode = V4L2_TUNER_MODE_MONO;
866 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
868 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
870 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
873 /* need to store dsr/nsr somewhere */
874 chip->shadow.bytes[MAXREGS-2] = dsr;
875 chip->shadow.bytes[MAXREGS-1] = nsr;
878 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
879 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
880 * that sound has (temporarily) switched from NICAM to
881 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
882 * error count. So in fact there is no stereo in this case :-(
883 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
884 * external 4052 multiplexer in audio_hook().
886 if(nsr & 0x02) /* NSR.S/MB=1 */
887 mode |= V4L2_TUNER_MODE_STEREO;
888 if(nsr & 0x01) /* NSR.D/SB=1 */
889 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
891 if(dsr & 0x02) /* DSR.IDSTE=1 */
892 mode |= V4L2_TUNER_MODE_STEREO;
893 if(dsr & 0x04) /* DSR.IDDUA=1 */
894 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
897 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
898 dsr, nsr, necr, mode);
902 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
904 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
905 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
907 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
908 tda9874a_NCONR &= 0xfe; /* enable */
910 tda9874a_NCONR |= 0x01; /* disable */
911 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
914 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
915 * and has auto-select function for audio output (AOSR register).
916 * Old TDA9874H doesn't support these features.
917 * TDA9874A also has additional mono output pin (OUTM), which
918 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
920 if(tda9874a_dic == 0x11) {
922 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
925 case V4L2_TUNER_MODE_MONO:
926 case V4L2_TUNER_MODE_STEREO:
928 case V4L2_TUNER_MODE_LANG1:
929 aosr = 0x80; /* auto-select, dual A/A */
930 mdacosr = (tda9874a_mode) ? 0x82:0x80;
932 case V4L2_TUNER_MODE_LANG2:
933 aosr = 0xa0; /* auto-select, dual B/B */
934 mdacosr = (tda9874a_mode) ? 0x83:0x81;
940 chip_write(chip, TDA9874A_AOSR, aosr);
941 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
943 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
944 mode, aosr, mdacosr);
946 } else { /* dic == 0x07 */
950 case V4L2_TUNER_MODE_MONO:
951 fmmr = 0x00; /* mono */
952 aosr = 0x10; /* A/A */
954 case V4L2_TUNER_MODE_STEREO:
957 aosr = 0x00; /* handled by NICAM auto-mute */
959 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
963 case V4L2_TUNER_MODE_LANG1:
964 fmmr = 0x02; /* dual */
965 aosr = 0x10; /* dual A/A */
967 case V4L2_TUNER_MODE_LANG2:
968 fmmr = 0x02; /* dual */
969 aosr = 0x20; /* dual B/B */
975 chip_write(chip, TDA9874A_FMMR, fmmr);
976 chip_write(chip, TDA9874A_AOSR, aosr);
978 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
983 static int tda9874a_checkit(struct CHIPSTATE *chip)
985 int dic,sic; /* device id. and software id. codes */
987 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
989 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
992 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
994 if((dic == 0x11)||(dic == 0x07)) {
995 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
996 tda9874a_dic = dic; /* remember device id. */
999 return 0; /* not found */
1002 static int tda9874a_initialize(struct CHIPSTATE *chip)
1004 if (tda9874a_SIF > 2)
1006 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1008 if(tda9874a_AMSEL > 1)
1011 if(tda9874a_SIF == 1)
1012 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1014 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1016 tda9874a_ESP = tda9874a_STD;
1017 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1019 if(tda9874a_AMSEL == 0)
1020 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1022 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1024 tda9874a_setup(chip);
1029 /* ---------------------------------------------------------------------- */
1030 /* audio chip descriptions - defines+functions for tea6420 */
1032 #define TEA6300_VL 0x00 /* volume left */
1033 #define TEA6300_VR 0x01 /* volume right */
1034 #define TEA6300_BA 0x02 /* bass */
1035 #define TEA6300_TR 0x03 /* treble */
1036 #define TEA6300_FA 0x04 /* fader control */
1037 #define TEA6300_S 0x05 /* switch register */
1038 /* values for those registers: */
1039 #define TEA6300_S_SA 0x01 /* stereo A input */
1040 #define TEA6300_S_SB 0x02 /* stereo B */
1041 #define TEA6300_S_SC 0x04 /* stereo C */
1042 #define TEA6300_S_GMU 0x80 /* general mute */
1044 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1045 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1046 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1047 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1048 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1049 #define TEA6320_BA 0x05 /* bass (0-4) */
1050 #define TEA6320_TR 0x06 /* treble (0-4) */
1051 #define TEA6320_S 0x07 /* switch register */
1052 /* values for those registers: */
1053 #define TEA6320_S_SA 0x07 /* stereo A input */
1054 #define TEA6320_S_SB 0x06 /* stereo B */
1055 #define TEA6320_S_SC 0x05 /* stereo C */
1056 #define TEA6320_S_SD 0x04 /* stereo D */
1057 #define TEA6320_S_GMU 0x80 /* general mute */
1059 #define TEA6420_S_SA 0x00 /* stereo A input */
1060 #define TEA6420_S_SB 0x01 /* stereo B */
1061 #define TEA6420_S_SC 0x02 /* stereo C */
1062 #define TEA6420_S_SD 0x03 /* stereo D */
1063 #define TEA6420_S_SE 0x04 /* stereo E */
1064 #define TEA6420_S_GMU 0x05 /* general mute */
1066 static int tea6300_shift10(int val) { return val >> 10; }
1067 static int tea6300_shift12(int val) { return val >> 12; }
1069 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1070 /* 0x0c mirror those immediately higher) */
1071 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1072 static int tea6320_shift11(int val) { return val >> 11; }
1073 static int tea6320_initialize(struct CHIPSTATE * chip)
1075 chip_write(chip, TEA6320_FFR, 0x3f);
1076 chip_write(chip, TEA6320_FFL, 0x3f);
1077 chip_write(chip, TEA6320_FRR, 0x3f);
1078 chip_write(chip, TEA6320_FRL, 0x3f);
1084 /* ---------------------------------------------------------------------- */
1085 /* audio chip descriptions - defines+functions for tda8425 */
1087 #define TDA8425_VL 0x00 /* volume left */
1088 #define TDA8425_VR 0x01 /* volume right */
1089 #define TDA8425_BA 0x02 /* bass */
1090 #define TDA8425_TR 0x03 /* treble */
1091 #define TDA8425_S1 0x08 /* switch functions */
1092 /* values for those registers: */
1093 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1094 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1095 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1096 #define TDA8425_S1_MU 0x20 /* mute bit */
1097 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1098 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1099 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1100 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1101 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1102 #define TDA8425_S1_ML 0x06 /* language selector */
1103 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1104 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1105 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1106 #define TDA8425_S1_IS 0x01 /* channel selector */
1109 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1110 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1112 static int tda8425_initialize(struct CHIPSTATE *chip)
1114 struct CHIPDESC *desc = chip->desc;
1115 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1116 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1118 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1119 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1124 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1126 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1128 if (mode & V4L2_TUNER_MODE_LANG1) {
1129 s1 |= TDA8425_S1_ML_SOUND_A;
1130 s1 |= TDA8425_S1_STEREO_PSEUDO;
1132 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1133 s1 |= TDA8425_S1_ML_SOUND_B;
1134 s1 |= TDA8425_S1_STEREO_PSEUDO;
1137 s1 |= TDA8425_S1_ML_STEREO;
1139 if (mode & V4L2_TUNER_MODE_MONO)
1140 s1 |= TDA8425_S1_STEREO_MONO;
1141 if (mode & V4L2_TUNER_MODE_STEREO)
1142 s1 |= TDA8425_S1_STEREO_SPATIAL;
1144 chip_write(chip,TDA8425_S1,s1);
1148 /* ---------------------------------------------------------------------- */
1149 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1151 /* the registers of 16C54, I2C sub address. */
1152 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1153 #define PIC16C54_REG_MISC 0x02
1155 /* bit definition of the RESET register, I2C data. */
1156 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1157 /* code of remote controller */
1158 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1159 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1160 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1161 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1162 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1163 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1164 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1166 /* ---------------------------------------------------------------------- */
1167 /* audio chip descriptions - defines+functions for TA8874Z */
1169 /* write 1st byte */
1170 #define TA8874Z_LED_STE 0x80
1171 #define TA8874Z_LED_BIL 0x40
1172 #define TA8874Z_LED_EXT 0x20
1173 #define TA8874Z_MONO_SET 0x10
1174 #define TA8874Z_MUTE 0x08
1175 #define TA8874Z_F_MONO 0x04
1176 #define TA8874Z_MODE_SUB 0x02
1177 #define TA8874Z_MODE_MAIN 0x01
1179 /* write 2nd byte */
1180 /*#define TA8874Z_TI 0x80 */ /* test mode */
1181 #define TA8874Z_SEPARATION 0x3f
1182 #define TA8874Z_SEPARATION_DEFAULT 0x10
1185 #define TA8874Z_B1 0x80
1186 #define TA8874Z_B0 0x40
1187 #define TA8874Z_CHAG_FLAG 0x20
1195 static int ta8874z_getmode(struct CHIPSTATE *chip)
1199 val = chip_read(chip);
1200 mode = V4L2_TUNER_MODE_MONO;
1201 if (val & TA8874Z_B1){
1202 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1203 }else if (!(val & TA8874Z_B0)){
1204 mode |= V4L2_TUNER_MODE_STEREO;
1206 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1210 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1211 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1212 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1213 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1215 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1219 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1222 case V4L2_TUNER_MODE_MONO:
1225 case V4L2_TUNER_MODE_STEREO:
1226 t = &ta8874z_stereo;
1228 case V4L2_TUNER_MODE_LANG1:
1231 case V4L2_TUNER_MODE_LANG2:
1239 chip_cmd(chip, "TA8874Z", t);
1242 static int ta8874z_checkit(struct CHIPSTATE *chip)
1245 rc = chip_read(chip);
1246 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1249 /* ---------------------------------------------------------------------- */
1250 /* audio chip descriptions - struct CHIPDESC */
1252 /* insmod options to enable/disable individual audio chips */
1253 static int tda8425 = 1;
1254 static int tda9840 = 1;
1255 static int tda9850 = 1;
1256 static int tda9855 = 1;
1257 static int tda9873 = 1;
1258 static int tda9874a = 1;
1259 static int tea6300; /* default 0 - address clash with msp34xx */
1260 static int tea6320; /* default 0 - address clash with msp34xx */
1261 static int tea6420 = 1;
1262 static int pic16c54 = 1;
1263 static int ta8874z; /* default 0 - address clash with tda9840 */
1265 module_param(tda8425, int, 0444);
1266 module_param(tda9840, int, 0444);
1267 module_param(tda9850, int, 0444);
1268 module_param(tda9855, int, 0444);
1269 module_param(tda9873, int, 0444);
1270 module_param(tda9874a, int, 0444);
1271 module_param(tea6300, int, 0444);
1272 module_param(tea6320, int, 0444);
1273 module_param(tea6420, int, 0444);
1274 module_param(pic16c54, int, 0444);
1275 module_param(ta8874z, int, 0444);
1277 static struct CHIPDESC chiplist[] = {
1280 .insmodopt = &tda9840,
1281 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1282 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1284 .flags = CHIP_NEED_CHECKMODE,
1287 .checkit = tda9840_checkit,
1288 .getmode = tda9840_getmode,
1289 .setmode = tda9840_setmode,
1291 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1292 /* ,TDA9840_SW, TDA9840_MONO */} }
1296 .insmodopt = &tda9873,
1297 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1298 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1300 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1303 .checkit = tda9873_checkit,
1304 .getmode = tda9873_getmode,
1305 .setmode = tda9873_setmode,
1307 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1308 .inputreg = TDA9873_SW,
1309 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1310 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1311 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1315 .name = "tda9874h/a",
1316 .insmodopt = &tda9874a,
1317 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1318 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1319 .flags = CHIP_NEED_CHECKMODE,
1322 .initialize = tda9874a_initialize,
1323 .checkit = tda9874a_checkit,
1324 .getmode = tda9874a_getmode,
1325 .setmode = tda9874a_setmode,
1329 .insmodopt = &tda9850,
1330 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1331 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1334 .getmode = tda985x_getmode,
1335 .setmode = tda985x_setmode,
1337 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1341 .insmodopt = &tda9855,
1342 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1343 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1345 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1347 .leftreg = TDA9855_VL,
1348 .rightreg = TDA9855_VR,
1349 .bassreg = TDA9855_BA,
1350 .treblereg = TDA9855_TR,
1353 .volfunc = tda9855_volume,
1354 .bassfunc = tda9855_bass,
1355 .treblefunc = tda9855_treble,
1356 .getmode = tda985x_getmode,
1357 .setmode = tda985x_setmode,
1359 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1360 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1361 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1362 0x07, 0x10, 0x10, 0x03 }}
1366 .insmodopt = &tea6300,
1367 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1368 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1370 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1372 .leftreg = TEA6300_VR,
1373 .rightreg = TEA6300_VL,
1374 .bassreg = TEA6300_BA,
1375 .treblereg = TEA6300_TR,
1378 .volfunc = tea6300_shift10,
1379 .bassfunc = tea6300_shift12,
1380 .treblefunc = tea6300_shift12,
1382 .inputreg = TEA6300_S,
1383 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1384 .inputmute = TEA6300_S_GMU,
1388 .insmodopt = &tea6320,
1389 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1390 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1392 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1394 .leftreg = TEA6320_V,
1395 .rightreg = TEA6320_V,
1396 .bassreg = TEA6320_BA,
1397 .treblereg = TEA6320_TR,
1400 .initialize = tea6320_initialize,
1401 .volfunc = tea6320_volume,
1402 .bassfunc = tea6320_shift11,
1403 .treblefunc = tea6320_shift11,
1405 .inputreg = TEA6320_S,
1406 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1407 .inputmute = TEA6300_S_GMU,
1411 .insmodopt = &tea6420,
1412 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1413 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1415 .flags = CHIP_HAS_INPUTSEL,
1418 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1419 .inputmute = TEA6300_S_GMU,
1423 .insmodopt = &tda8425,
1424 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1425 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1427 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1429 .leftreg = TDA8425_VL,
1430 .rightreg = TDA8425_VR,
1431 .bassreg = TDA8425_BA,
1432 .treblereg = TDA8425_TR,
1435 .initialize = tda8425_initialize,
1436 .volfunc = tda8425_shift10,
1437 .bassfunc = tda8425_shift12,
1438 .treblefunc = tda8425_shift12,
1439 .setmode = tda8425_setmode,
1441 .inputreg = TDA8425_S1,
1442 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1443 .inputmute = TDA8425_S1_OFF,
1447 .name = "pic16c54 (PV951)",
1448 .insmodopt = &pic16c54,
1449 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1450 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1452 .flags = CHIP_HAS_INPUTSEL,
1454 .inputreg = PIC16C54_REG_MISC,
1455 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1456 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1457 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1458 PIC16C54_MISC_SND_MUTE},
1459 .inputmute = PIC16C54_MISC_SND_MUTE,
1463 .checkit = ta8874z_checkit,
1464 .insmodopt = &ta8874z,
1465 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1466 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1468 .flags = CHIP_NEED_CHECKMODE,
1471 .getmode = ta8874z_getmode,
1472 .setmode = ta8874z_setmode,
1474 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1476 { .name = NULL } /* EOF */
1480 /* ---------------------------------------------------------------------- */
1481 /* i2c registration */
1483 static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1485 struct CHIPSTATE *chip;
1486 struct CHIPDESC *desc;
1489 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1490 printk(KERN_INFO "tvaudio: known chips: ");
1491 for (desc = chiplist; desc->name != NULL; desc++)
1492 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1496 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1500 i2c_set_clientdata(client, chip);
1502 /* find description for the chip */
1503 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1504 for (desc = chiplist; desc->name != NULL; desc++) {
1505 if (0 == *(desc->insmodopt))
1507 if (client->addr < desc->addr_lo ||
1508 client->addr > desc->addr_hi)
1510 if (desc->checkit && !desc->checkit(chip))
1514 if (desc->name == NULL) {
1515 v4l_dbg(1, debug, client, "no matching chip description found\n");
1519 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1521 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
1522 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1523 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1524 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1527 /* fill required data structures */
1529 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1531 chip->shadow.count = desc->registers+1;
1532 chip->prevmode = -1;
1533 chip->audmode = V4L2_TUNER_MODE_LANG1;
1535 /* initialization */
1536 if (desc->initialize != NULL)
1537 desc->initialize(chip);
1539 chip_cmd(chip,"init",&desc->init);
1541 if (desc->flags & CHIP_HAS_VOLUME) {
1542 if (!desc->volfunc) {
1543 /* This shouldn't be happen. Warn user, but keep working
1544 without volume controls
1546 v4l_info(chip->c, "volume callback undefined!\n");
1547 desc->flags &= ~CHIP_HAS_VOLUME;
1549 chip->left = desc->leftinit ? desc->leftinit : 65535;
1550 chip->right = desc->rightinit ? desc->rightinit : 65535;
1551 chip_write(chip, desc->leftreg,
1552 desc->volfunc(chip->left));
1553 chip_write(chip, desc->rightreg,
1554 desc->volfunc(chip->right));
1557 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1558 if (!desc->bassfunc || !desc->treblefunc) {
1559 /* This shouldn't be happen. Warn user, but keep working
1560 without bass/treble controls
1562 v4l_info(chip->c, "bass/treble callbacks undefined!\n");
1563 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1565 chip->treble = desc->trebleinit ?
1566 desc->trebleinit : 32768;
1567 chip->bass = desc->bassinit ?
1568 desc->bassinit : 32768;
1569 chip_write(chip, desc->bassreg,
1570 desc->bassfunc(chip->bass));
1571 chip_write(chip, desc->treblereg,
1572 desc->treblefunc(chip->treble));
1576 chip->thread = NULL;
1577 if (desc->flags & CHIP_NEED_CHECKMODE) {
1578 if (!desc->getmode || !desc->setmode) {
1579 /* This shouldn't be happen. Warn user, but keep working
1582 v4l_info(chip->c, "set/get mode callbacks undefined!\n");
1585 /* start async thread */
1586 init_timer(&chip->wt);
1587 chip->wt.function = chip_thread_wake;
1588 chip->wt.data = (unsigned long)chip;
1589 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
1590 if (IS_ERR(chip->thread)) {
1591 v4l_warn(chip->c, "%s: failed to create kthread\n",
1593 chip->thread = NULL;
1599 static int chip_remove(struct i2c_client *client)
1601 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1603 del_timer_sync(&chip->wt);
1605 /* shutdown async thread */
1606 kthread_stop(chip->thread);
1607 chip->thread = NULL;
1614 static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1615 struct v4l2_control *ctrl)
1617 struct CHIPDESC *desc = chip->desc;
1620 case V4L2_CID_AUDIO_MUTE:
1621 ctrl->value=chip->muted;
1623 case V4L2_CID_AUDIO_VOLUME:
1624 if (!(desc->flags & CHIP_HAS_VOLUME))
1626 ctrl->value = max(chip->left,chip->right);
1628 case V4L2_CID_AUDIO_BALANCE:
1631 if (!(desc->flags & CHIP_HAS_VOLUME))
1633 volume = max(chip->left,chip->right);
1635 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1640 case V4L2_CID_AUDIO_BASS:
1641 if (desc->flags & CHIP_HAS_BASSTREBLE)
1643 ctrl->value = chip->bass;
1645 case V4L2_CID_AUDIO_TREBLE:
1646 if (desc->flags & CHIP_HAS_BASSTREBLE)
1648 ctrl->value = chip->treble;
1654 static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1655 struct v4l2_control *ctrl)
1657 struct CHIPDESC *desc = chip->desc;
1660 case V4L2_CID_AUDIO_MUTE:
1661 if (ctrl->value < 0 || ctrl->value >= 2)
1663 chip->muted = ctrl->value;
1665 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1667 chip_write_masked(chip,desc->inputreg,
1668 desc->inputmap[chip->input],desc->inputmask);
1670 case V4L2_CID_AUDIO_VOLUME:
1674 if (!(desc->flags & CHIP_HAS_VOLUME))
1677 volume = max(chip->left,chip->right);
1679 balance=(32768*min(chip->left,chip->right))/volume;
1684 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1685 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1687 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1688 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1692 case V4L2_CID_AUDIO_BALANCE:
1694 int volume, balance;
1695 if (!(desc->flags & CHIP_HAS_VOLUME))
1698 volume = max(chip->left,chip->right);
1699 balance = ctrl->value;
1701 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1702 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1706 case V4L2_CID_AUDIO_BASS:
1707 if (desc->flags & CHIP_HAS_BASSTREBLE)
1709 chip->bass = ctrl->value;
1710 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1713 case V4L2_CID_AUDIO_TREBLE:
1714 if (desc->flags & CHIP_HAS_BASSTREBLE)
1717 chip->treble = ctrl->value;
1718 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1726 /* ---------------------------------------------------------------------- */
1727 /* video4linux interface */
1729 static int chip_command(struct i2c_client *client,
1730 unsigned int cmd, void *arg)
1732 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1733 struct CHIPDESC *desc = chip->desc;
1735 v4l_dbg(1, debug, chip->c, "%s: chip_command 0x%x\n", chip->c->name, cmd);
1738 case AUDC_SET_RADIO:
1740 chip->watch_stereo = 0;
1741 /* del_timer(&chip->wt); */
1743 /* --- v4l ioctls --- */
1744 /* take care: bttv does userspace copying, we'll get a
1745 kernel pointer here... */
1746 case VIDIOC_QUERYCTRL:
1748 struct v4l2_queryctrl *qc = arg;
1751 case V4L2_CID_AUDIO_MUTE:
1753 case V4L2_CID_AUDIO_VOLUME:
1754 case V4L2_CID_AUDIO_BALANCE:
1755 if (!(desc->flags & CHIP_HAS_VOLUME))
1758 case V4L2_CID_AUDIO_BASS:
1759 case V4L2_CID_AUDIO_TREBLE:
1760 if (desc->flags & CHIP_HAS_BASSTREBLE)
1766 return v4l2_ctrl_query_fill_std(qc);
1769 return tvaudio_set_ctrl(chip, arg);
1772 return tvaudio_get_ctrl(chip, arg);
1773 case VIDIOC_INT_G_AUDIO_ROUTING:
1775 struct v4l2_routing *rt = arg;
1777 rt->input = chip->input;
1781 case VIDIOC_INT_S_AUDIO_ROUTING:
1783 struct v4l2_routing *rt = arg;
1785 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1787 /* There are four inputs: tuner, radio, extern and intern. */
1788 chip->input = rt->input;
1791 chip_write_masked(chip, desc->inputreg,
1792 desc->inputmap[chip->input], desc->inputmask);
1795 case VIDIOC_S_TUNER:
1797 struct v4l2_tuner *vt = arg;
1802 switch (vt->audmode) {
1803 case V4L2_TUNER_MODE_MONO:
1804 case V4L2_TUNER_MODE_STEREO:
1805 case V4L2_TUNER_MODE_LANG1:
1806 case V4L2_TUNER_MODE_LANG2:
1809 case V4L2_TUNER_MODE_LANG1_LANG2:
1810 mode = V4L2_TUNER_MODE_STEREO;
1815 chip->audmode = vt->audmode;
1817 if (desc->setmode && mode) {
1818 chip->watch_stereo = 0;
1819 /* del_timer(&chip->wt); */
1821 desc->setmode(chip, mode);
1825 case VIDIOC_G_TUNER:
1827 struct v4l2_tuner *vt = arg;
1828 int mode = V4L2_TUNER_MODE_MONO;
1832 vt->audmode = chip->audmode;
1834 vt->capability = V4L2_TUNER_CAP_STEREO |
1835 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1838 mode = desc->getmode(chip);
1840 if (mode & V4L2_TUNER_MODE_MONO)
1841 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1842 if (mode & V4L2_TUNER_MODE_STEREO)
1843 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1844 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1845 When this module is converted fully to v4l2, then this
1846 should change for those chips that can detect SAP. */
1847 if (mode & V4L2_TUNER_MODE_LANG1)
1848 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1849 V4L2_TUNER_SUB_LANG2;
1855 case VIDIOC_S_FREQUENCY:
1856 chip->mode = 0; /* automatic */
1858 /* For chips that provide getmode and setmode, and doesn't
1859 automatically follows the stereo carrier, a kthread is
1860 created to set the audio standard. In this case, when then
1861 the video channel is changed, tvaudio starts on MONO mode.
1862 After waiting for 2 seconds, the kernel thread is called,
1863 to follow whatever audio standard is pointed by the
1867 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1868 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1869 chip->prevmode = -1; /* reset previous mode */
1870 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1874 case VIDIOC_G_CHIP_IDENT:
1875 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1880 static int chip_legacy_probe(struct i2c_adapter *adap)
1882 /* don't attach on saa7146 based cards,
1883 because dedicated drivers are used */
1884 if ((adap->id == I2C_HW_SAA7146))
1886 if (adap->class & I2C_CLASS_TV_ANALOG)
1891 /* This driver supports many devices and the idea is to let the driver
1892 detect which device is present. So rather than listing all supported
1893 devices here, we pretend to support a single, fake device type. */
1894 static const struct i2c_device_id chip_id[] = {
1898 MODULE_DEVICE_TABLE(i2c, chip_id);
1900 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1902 .driverid = I2C_DRIVERID_TVAUDIO,
1903 .command = chip_command,
1904 .probe = chip_probe,
1905 .remove = chip_remove,
1906 .legacy_probe = chip_legacy_probe,
1907 .id_table = chip_id,