2 * Driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
11 * - Some cleanups, code fixes, etc
12 * - Convert it to V4L2 API
14 * This code is placed under the terms of the GNU General Public License
17 * debug - set to 1 if you'd like to see debug messages
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/sched.h>
24 #include <linux/string.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/errno.h>
28 #include <linux/slab.h>
29 #include <linux/videodev.h>
30 #include <linux/i2c.h>
31 #include <linux/init.h>
32 #include <linux/kthread.h>
33 #include <linux/freezer.h>
35 #include <media/tvaudio.h>
36 #include <media/v4l2-common.h>
37 #include <media/v4l2-chip-ident.h>
38 #include <media/v4l2-i2c-drv-legacy.h>
40 #include <media/i2c-addr.h>
42 /* ---------------------------------------------------------------------- */
45 static int debug; /* insmod parameter */
46 module_param(debug, int, 0644);
48 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
49 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
50 MODULE_LICENSE("GPL");
54 /* ---------------------------------------------------------------------- */
60 typedef int (*getvalue)(int);
61 typedef int (*checkit)(struct CHIPSTATE*);
62 typedef int (*initialize)(struct CHIPSTATE*);
63 typedef int (*getmode)(struct CHIPSTATE*);
64 typedef void (*setmode)(struct CHIPSTATE*, int mode);
67 typedef struct AUDIOCMD {
68 int count; /* # of bytes to send */
69 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
72 /* chip description */
74 char *name; /* chip name */
75 int addr_lo, addr_hi; /* i2c address range */
76 int registers; /* # of registers */
80 initialize initialize;
82 #define CHIP_HAS_VOLUME 1
83 #define CHIP_HAS_BASSTREBLE 2
84 #define CHIP_HAS_INPUTSEL 4
85 #define CHIP_NEED_CHECKMODE 8
87 /* various i2c command sequences */
90 /* which register has which value */
91 int leftreg,rightreg,treblereg,bassreg;
93 /* initialize with (defaults to 65535/65535/32768/32768 */
94 int leftinit,rightinit,trebleinit,bassinit;
96 /* functions to convert the values (v4l -> chip) */
97 getvalue volfunc,treblefunc,bassfunc;
103 /* input switch register + values for v4l inputs */
109 static struct CHIPDESC chiplist[];
111 /* current state of the chip */
113 struct i2c_client *c;
115 /* chip-specific description - should point to
116 an entry at CHIPDESC table */
117 struct CHIPDESC *desc;
119 /* shadow register set */
122 /* current settings */
123 __u16 left,right,treble,bass,muted,mode;
129 struct task_struct *thread;
130 struct timer_list wt;
135 /* ---------------------------------------------------------------------- */
138 static unsigned short normal_i2c[] = {
139 I2C_ADDR_TDA8425 >> 1,
140 I2C_ADDR_TEA6300 >> 1,
141 I2C_ADDR_TEA6420 >> 1,
142 I2C_ADDR_TDA9840 >> 1,
143 I2C_ADDR_TDA985x_L >> 1,
144 I2C_ADDR_TDA985x_H >> 1,
145 I2C_ADDR_TDA9874 >> 1,
146 I2C_ADDR_PIC16C54 >> 1,
150 /* ---------------------------------------------------------------------- */
151 /* i2c I/O functions */
153 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
155 unsigned char buffer[2];
158 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
160 chip->shadow.bytes[1] = val;
162 if (1 != i2c_master_send(chip->c,buffer,1)) {
163 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
168 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
169 chip->c->name, subaddr, val);
170 chip->shadow.bytes[subaddr+1] = val;
173 if (2 != i2c_master_send(chip->c,buffer,2)) {
174 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
175 chip->c->name, subaddr, val);
182 static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
186 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
188 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
191 return chip_write(chip, subaddr, val);
194 static int chip_read(struct CHIPSTATE *chip)
196 unsigned char buffer;
198 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
199 v4l_warn(chip->c, "%s: I/O error (read)\n",
203 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
207 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
209 unsigned char write[1];
210 unsigned char read[1];
211 struct i2c_msg msgs[2] = {
212 { chip->c->addr, 0, 1, write },
213 { chip->c->addr, I2C_M_RD, 1, read }
217 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
218 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
221 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
222 chip->c->name, subaddr,read[0]);
226 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
233 /* update our shadow register set; print bytes if (debug > 0) */
234 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
235 chip->c->name, name,cmd->bytes[0]);
236 for (i = 1; i < cmd->count; i++) {
238 printk(" 0x%x",cmd->bytes[i]);
239 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
244 /* send data to the chip */
245 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
246 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
252 /* ---------------------------------------------------------------------- */
253 /* kernel thread for doing i2c stuff asyncronly
254 * right now it is used only to check the audio mode (mono/stereo/whatever)
255 * some time after switching to another TV channel, then turn on stereo
259 static void chip_thread_wake(unsigned long data)
261 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
262 wake_up_process(chip->thread);
265 static int chip_thread(void *data)
267 struct CHIPSTATE *chip = data;
268 struct CHIPDESC *desc = chip->desc;
271 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
274 set_current_state(TASK_INTERRUPTIBLE);
275 if (!kthread_should_stop())
277 set_current_state(TASK_RUNNING);
279 if (kthread_should_stop())
281 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
283 /* don't do anything for radio or if mode != auto */
284 if (chip->radio || chip->mode != 0)
287 /* have a look what's going on */
288 mode = desc->getmode(chip);
289 if (mode == chip->prevmode)
292 /* chip detected a new audio mode - set it */
293 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n",
296 chip->prevmode = mode;
298 if (mode & V4L2_TUNER_MODE_STEREO)
299 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
300 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
301 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
302 else if (mode & V4L2_TUNER_MODE_LANG1)
303 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
304 else if (mode & V4L2_TUNER_MODE_LANG2)
305 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
307 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
309 /* schedule next check */
310 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
313 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
317 /* ---------------------------------------------------------------------- */
318 /* audio chip descriptions - defines+functions for tda9840 */
320 #define TDA9840_SW 0x00
321 #define TDA9840_LVADJ 0x02
322 #define TDA9840_STADJ 0x03
323 #define TDA9840_TEST 0x04
325 #define TDA9840_MONO 0x10
326 #define TDA9840_STEREO 0x2a
327 #define TDA9840_DUALA 0x12
328 #define TDA9840_DUALB 0x1e
329 #define TDA9840_DUALAB 0x1a
330 #define TDA9840_DUALBA 0x16
331 #define TDA9840_EXTERNAL 0x7a
333 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
334 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
335 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
337 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
338 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
340 static int tda9840_getmode(struct CHIPSTATE *chip)
344 val = chip_read(chip);
345 mode = V4L2_TUNER_MODE_MONO;
346 if (val & TDA9840_DS_DUAL)
347 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
348 if (val & TDA9840_ST_STEREO)
349 mode |= V4L2_TUNER_MODE_STEREO;
351 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
356 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
359 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
362 case V4L2_TUNER_MODE_MONO:
365 case V4L2_TUNER_MODE_STEREO:
368 case V4L2_TUNER_MODE_LANG1:
371 case V4L2_TUNER_MODE_LANG2:
379 chip_write(chip, TDA9840_SW, t);
382 static int tda9840_checkit(struct CHIPSTATE *chip)
385 rc = chip_read(chip);
386 /* lower 5 bits should be 0 */
387 return ((rc & 0x1f) == 0) ? 1 : 0;
390 /* ---------------------------------------------------------------------- */
391 /* audio chip descriptions - defines+functions for tda985x */
393 /* subaddresses for TDA9855 */
394 #define TDA9855_VR 0x00 /* Volume, right */
395 #define TDA9855_VL 0x01 /* Volume, left */
396 #define TDA9855_BA 0x02 /* Bass */
397 #define TDA9855_TR 0x03 /* Treble */
398 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
400 /* subaddresses for TDA9850 */
401 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
403 /* subaddesses for both chips */
404 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
405 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
406 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
407 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
408 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
409 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
411 /* Masks for bits in TDA9855 subaddresses */
412 /* 0x00 - VR in TDA9855 */
413 /* 0x01 - VL in TDA9855 */
414 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
415 * in 1dB steps - mute is 0x27 */
418 /* 0x02 - BA in TDA9855 */
419 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
420 * in .5dB steps - 0 is 0x0E */
423 /* 0x03 - TR in TDA9855 */
424 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
425 * in 3dB steps - 0 is 0x7 */
427 /* Masks for bits in both chips' subaddresses */
428 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
429 /* Unique to TDA9855: */
430 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
431 * in 3dB steps - mute is 0x0 */
433 /* Unique to TDA9850: */
434 /* lower 4 bits control stereo noise threshold, over which stereo turns off
435 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
438 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
439 /* Unique to TDA9855: */
440 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
441 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
442 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
443 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
444 /* Bits 0 to 3 select various combinations
445 * of line in and line out, only the
446 * interesting ones are defined */
447 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
448 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
450 /* Unique to TDA9850: */
451 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
452 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
455 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
456 /* Common to TDA9855 and TDA9850: */
457 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
458 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
459 #define TDA985x_MONO 0 /* Forces Mono output */
460 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
462 /* Unique to TDA9855: */
463 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
464 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
465 #define TDA9855_LINEAR 0 /* Linear Stereo */
466 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
467 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
468 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
469 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
471 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
472 /* Common to both TDA9855 and TDA9850: */
473 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
474 * in .5dB steps - 0dB is 0x7 */
476 /* 0x08, 0x09 - A1 and A2 (read/write) */
477 /* Common to both TDA9855 and TDA9850: */
478 /* lower 5 bites are wideband and spectral expander alignment
479 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
480 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
481 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
482 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
485 /* Common to both TDA9855 and TDA9850: */
486 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
487 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
488 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
490 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
491 static int tda9855_bass(int val) { return val/0xccc+0x06; }
492 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
494 static int tda985x_getmode(struct CHIPSTATE *chip)
498 mode = ((TDA985x_STP | TDA985x_SAPP) &
499 chip_read(chip)) >> 4;
500 /* Add mono mode regardless of SAP and stereo */
501 /* Allows forced mono */
502 return mode | V4L2_TUNER_MODE_MONO;
505 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
508 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
511 case V4L2_TUNER_MODE_MONO:
514 case V4L2_TUNER_MODE_STEREO:
515 c6 |= TDA985x_STEREO;
517 case V4L2_TUNER_MODE_LANG1:
524 chip_write(chip,TDA985x_C6,c6);
528 /* ---------------------------------------------------------------------- */
529 /* audio chip descriptions - defines+functions for tda9873h */
531 /* Subaddresses for TDA9873H */
533 #define TDA9873_SW 0x00 /* Switching */
534 #define TDA9873_AD 0x01 /* Adjust */
535 #define TDA9873_PT 0x02 /* Port */
537 /* Subaddress 0x00: Switching Data
540 * B1, B0: Input source selection
542 * 1, 0 external stereo
545 #define TDA9873_INP_MASK 3
546 #define TDA9873_INTERNAL 0
547 #define TDA9873_EXT_STEREO 2
548 #define TDA9873_EXT_MONO 1
550 /* B3, B2: output signal select
551 * B4 : transmission mode
554 * 1, 1, 1 Stereo (reversed channel)
561 #define TDA9873_TR_MASK (7 << 2)
562 #define TDA9873_TR_MONO 4
563 #define TDA9873_TR_STEREO 1 << 4
564 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
565 #define TDA9873_TR_DUALA 1 << 2
566 #define TDA9873_TR_DUALB 1 << 3
568 /* output level controls
569 * B5: output level switch (0 = reduced gain, 1 = normal gain)
570 * B6: mute (1 = muted)
571 * B7: auto-mute (1 = auto-mute enabled)
574 #define TDA9873_GAIN_NORMAL 1 << 5
575 #define TDA9873_MUTE 1 << 6
576 #define TDA9873_AUTOMUTE 1 << 7
578 /* Subaddress 0x01: Adjust/standard */
580 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
581 * Recommended value is +0 dB
584 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
586 /* Bits C6..C4 control FM stantard
588 * 0, 0, 0 B/G (PAL FM)
597 #define TDA9873_DK1 2
598 #define TDA9873_DK2 3
599 #define TDA9873_DK3 4
602 /* C7 controls identification response time (1=fast/0=normal)
604 #define TDA9873_IDR_NORM 0
605 #define TDA9873_IDR_FAST 1 << 7
608 /* Subaddress 0x02: Port data */
610 /* E1, E0 free programmable ports P1/P2
617 #define TDA9873_PORTS 3
620 #define TDA9873_TST_PORT 1 << 2
622 /* E5..E3 control mono output channel (together with transmission mode bit B4)
627 * 0 1 0 1 mono (from stereo decoder)
629 #define TDA9873_MOUT_MONO 0
630 #define TDA9873_MOUT_FMONO 0
631 #define TDA9873_MOUT_DUALA 0
632 #define TDA9873_MOUT_DUALB 1 << 3
633 #define TDA9873_MOUT_ST 1 << 4
634 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
635 #define TDA9873_MOUT_EXTL 1 << 5
636 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
637 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
638 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
640 /* Status bits: (chip read) */
641 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
642 #define TDA9873_STEREO 2 /* Stereo sound is identified */
643 #define TDA9873_DUAL 4 /* Dual sound is identified */
645 static int tda9873_getmode(struct CHIPSTATE *chip)
649 val = chip_read(chip);
650 mode = V4L2_TUNER_MODE_MONO;
651 if (val & TDA9873_STEREO)
652 mode |= V4L2_TUNER_MODE_STEREO;
653 if (val & TDA9873_DUAL)
654 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
655 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
660 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
662 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
663 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
665 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
666 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
670 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
671 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
674 case V4L2_TUNER_MODE_MONO:
675 sw_data |= TDA9873_TR_MONO;
677 case V4L2_TUNER_MODE_STEREO:
678 sw_data |= TDA9873_TR_STEREO;
680 case V4L2_TUNER_MODE_LANG1:
681 sw_data |= TDA9873_TR_DUALA;
683 case V4L2_TUNER_MODE_LANG2:
684 sw_data |= TDA9873_TR_DUALB;
691 chip_write(chip, TDA9873_SW, sw_data);
692 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
696 static int tda9873_checkit(struct CHIPSTATE *chip)
700 if (-1 == (rc = chip_read2(chip,254)))
702 return (rc & ~0x1f) == 0x80;
706 /* ---------------------------------------------------------------------- */
707 /* audio chip description - defines+functions for tda9874h and tda9874a */
708 /* Dariusz Kowalewski <darekk@automex.pl> */
710 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
711 #define TDA9874A_AGCGR 0x00 /* AGC gain */
712 #define TDA9874A_GCONR 0x01 /* general config */
713 #define TDA9874A_MSR 0x02 /* monitor select */
714 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
715 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
716 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
717 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
718 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
719 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
720 #define TDA9874A_DCR 0x09 /* demodulator config */
721 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
722 #define TDA9874A_FMMR 0x0b /* FM dematrix */
723 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
724 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
725 #define TDA9874A_NCONR 0x0e /* NICAM config */
726 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
727 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
728 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
729 #define TDA9874A_AMCONR 0x12 /* audio mute control */
730 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
731 #define TDA9874A_AOSR 0x14 /* analog output select */
732 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
733 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
734 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
735 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
736 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
738 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
739 #define TDA9874A_DSR 0x00 /* device status */
740 #define TDA9874A_NSR 0x01 /* NICAM status */
741 #define TDA9874A_NECR 0x02 /* NICAM error count */
742 #define TDA9874A_DR1 0x03 /* add. data LSB */
743 #define TDA9874A_DR2 0x04 /* add. data MSB */
744 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
745 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
746 #define TDA9874A_SIFLR 0x07 /* SIF level */
747 #define TDA9874A_TR2 252 /* test reg. 2 */
748 #define TDA9874A_TR1 253 /* test reg. 1 */
749 #define TDA9874A_DIC 254 /* device id. code */
750 #define TDA9874A_SIC 255 /* software id. code */
753 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
754 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
755 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
756 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
757 static int tda9874a_dic = -1; /* device id. code */
759 /* insmod options for tda9874a */
760 static unsigned int tda9874a_SIF = UNSET;
761 static unsigned int tda9874a_AMSEL = UNSET;
762 static unsigned int tda9874a_STD = UNSET;
763 module_param(tda9874a_SIF, int, 0444);
764 module_param(tda9874a_AMSEL, int, 0444);
765 module_param(tda9874a_STD, int, 0444);
768 * initialization table for tda9874 decoder:
769 * - carrier 1 freq. registers (3 bytes)
770 * - carrier 2 freq. registers (3 bytes)
771 * - demudulator config register
772 * - FM de-emphasis register (slow identification mode)
773 * Note: frequency registers must be written in single i2c transfer.
775 static struct tda9874a_MODES {
778 } tda9874a_modelist[9] = {
779 { "A2, B/G", /* default */
780 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
782 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
784 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
786 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
788 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
790 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
792 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
794 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
796 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
799 static int tda9874a_setup(struct CHIPSTATE *chip)
801 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
802 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
803 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
804 if(tda9874a_dic == 0x11) {
805 chip_write(chip, TDA9874A_FMMR, 0x80);
806 } else { /* dic == 0x07 */
807 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
808 chip_write(chip, TDA9874A_FMMR, 0x00);
810 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
811 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
812 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
813 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
814 /* Note: If signal quality is poor you may want to change NICAM */
815 /* error limit registers (NLELR and NUELR) to some greater values. */
816 /* Then the sound would remain stereo, but won't be so clear. */
817 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
818 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
820 if(tda9874a_dic == 0x11) {
821 chip_write(chip, TDA9874A_AMCONR, 0xf9);
822 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
823 chip_write(chip, TDA9874A_AOSR, 0x80);
824 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
825 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
826 } else { /* dic == 0x07 */
827 chip_write(chip, TDA9874A_AMCONR, 0xfb);
828 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
829 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
831 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
832 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
836 static int tda9874a_getmode(struct CHIPSTATE *chip)
839 int necr; /* just for debugging */
841 mode = V4L2_TUNER_MODE_MONO;
843 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
845 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
847 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
850 /* need to store dsr/nsr somewhere */
851 chip->shadow.bytes[MAXREGS-2] = dsr;
852 chip->shadow.bytes[MAXREGS-1] = nsr;
855 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
856 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
857 * that sound has (temporarily) switched from NICAM to
858 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
859 * error count. So in fact there is no stereo in this case :-(
860 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
861 * external 4052 multiplexer in audio_hook().
863 if(nsr & 0x02) /* NSR.S/MB=1 */
864 mode |= V4L2_TUNER_MODE_STEREO;
865 if(nsr & 0x01) /* NSR.D/SB=1 */
866 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
868 if(dsr & 0x02) /* DSR.IDSTE=1 */
869 mode |= V4L2_TUNER_MODE_STEREO;
870 if(dsr & 0x04) /* DSR.IDDUA=1 */
871 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
874 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
875 dsr, nsr, necr, mode);
879 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
881 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
882 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
884 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
885 tda9874a_NCONR &= 0xfe; /* enable */
887 tda9874a_NCONR |= 0x01; /* disable */
888 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
891 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
892 * and has auto-select function for audio output (AOSR register).
893 * Old TDA9874H doesn't support these features.
894 * TDA9874A also has additional mono output pin (OUTM), which
895 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
897 if(tda9874a_dic == 0x11) {
899 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
902 case V4L2_TUNER_MODE_MONO:
903 case V4L2_TUNER_MODE_STEREO:
905 case V4L2_TUNER_MODE_LANG1:
906 aosr = 0x80; /* auto-select, dual A/A */
907 mdacosr = (tda9874a_mode) ? 0x82:0x80;
909 case V4L2_TUNER_MODE_LANG2:
910 aosr = 0xa0; /* auto-select, dual B/B */
911 mdacosr = (tda9874a_mode) ? 0x83:0x81;
917 chip_write(chip, TDA9874A_AOSR, aosr);
918 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
920 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
921 mode, aosr, mdacosr);
923 } else { /* dic == 0x07 */
927 case V4L2_TUNER_MODE_MONO:
928 fmmr = 0x00; /* mono */
929 aosr = 0x10; /* A/A */
931 case V4L2_TUNER_MODE_STEREO:
934 aosr = 0x00; /* handled by NICAM auto-mute */
936 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
940 case V4L2_TUNER_MODE_LANG1:
941 fmmr = 0x02; /* dual */
942 aosr = 0x10; /* dual A/A */
944 case V4L2_TUNER_MODE_LANG2:
945 fmmr = 0x02; /* dual */
946 aosr = 0x20; /* dual B/B */
952 chip_write(chip, TDA9874A_FMMR, fmmr);
953 chip_write(chip, TDA9874A_AOSR, aosr);
955 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
960 static int tda9874a_checkit(struct CHIPSTATE *chip)
962 int dic,sic; /* device id. and software id. codes */
964 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
966 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
969 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
971 if((dic == 0x11)||(dic == 0x07)) {
972 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
973 tda9874a_dic = dic; /* remember device id. */
976 return 0; /* not found */
979 static int tda9874a_initialize(struct CHIPSTATE *chip)
981 if (tda9874a_SIF > 2)
983 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
985 if(tda9874a_AMSEL > 1)
988 if(tda9874a_SIF == 1)
989 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
991 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
993 tda9874a_ESP = tda9874a_STD;
994 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
996 if(tda9874a_AMSEL == 0)
997 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
999 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1001 tda9874a_setup(chip);
1006 /* ---------------------------------------------------------------------- */
1007 /* audio chip descriptions - defines+functions for tea6420 */
1009 #define TEA6300_VL 0x00 /* volume left */
1010 #define TEA6300_VR 0x01 /* volume right */
1011 #define TEA6300_BA 0x02 /* bass */
1012 #define TEA6300_TR 0x03 /* treble */
1013 #define TEA6300_FA 0x04 /* fader control */
1014 #define TEA6300_S 0x05 /* switch register */
1015 /* values for those registers: */
1016 #define TEA6300_S_SA 0x01 /* stereo A input */
1017 #define TEA6300_S_SB 0x02 /* stereo B */
1018 #define TEA6300_S_SC 0x04 /* stereo C */
1019 #define TEA6300_S_GMU 0x80 /* general mute */
1021 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1022 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1023 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1024 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1025 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1026 #define TEA6320_BA 0x05 /* bass (0-4) */
1027 #define TEA6320_TR 0x06 /* treble (0-4) */
1028 #define TEA6320_S 0x07 /* switch register */
1029 /* values for those registers: */
1030 #define TEA6320_S_SA 0x07 /* stereo A input */
1031 #define TEA6320_S_SB 0x06 /* stereo B */
1032 #define TEA6320_S_SC 0x05 /* stereo C */
1033 #define TEA6320_S_SD 0x04 /* stereo D */
1034 #define TEA6320_S_GMU 0x80 /* general mute */
1036 #define TEA6420_S_SA 0x00 /* stereo A input */
1037 #define TEA6420_S_SB 0x01 /* stereo B */
1038 #define TEA6420_S_SC 0x02 /* stereo C */
1039 #define TEA6420_S_SD 0x03 /* stereo D */
1040 #define TEA6420_S_SE 0x04 /* stereo E */
1041 #define TEA6420_S_GMU 0x05 /* general mute */
1043 static int tea6300_shift10(int val) { return val >> 10; }
1044 static int tea6300_shift12(int val) { return val >> 12; }
1046 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1047 /* 0x0c mirror those immediately higher) */
1048 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1049 static int tea6320_shift11(int val) { return val >> 11; }
1050 static int tea6320_initialize(struct CHIPSTATE * chip)
1052 chip_write(chip, TEA6320_FFR, 0x3f);
1053 chip_write(chip, TEA6320_FFL, 0x3f);
1054 chip_write(chip, TEA6320_FRR, 0x3f);
1055 chip_write(chip, TEA6320_FRL, 0x3f);
1061 /* ---------------------------------------------------------------------- */
1062 /* audio chip descriptions - defines+functions for tda8425 */
1064 #define TDA8425_VL 0x00 /* volume left */
1065 #define TDA8425_VR 0x01 /* volume right */
1066 #define TDA8425_BA 0x02 /* bass */
1067 #define TDA8425_TR 0x03 /* treble */
1068 #define TDA8425_S1 0x08 /* switch functions */
1069 /* values for those registers: */
1070 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1071 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1072 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1073 #define TDA8425_S1_MU 0x20 /* mute bit */
1074 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1075 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1076 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1077 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1078 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1079 #define TDA8425_S1_ML 0x06 /* language selector */
1080 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1081 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1082 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1083 #define TDA8425_S1_IS 0x01 /* channel selector */
1086 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1087 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1089 static int tda8425_initialize(struct CHIPSTATE *chip)
1091 struct CHIPDESC *desc = chip->desc;
1092 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1093 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1095 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1096 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1101 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1103 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1105 if (mode & V4L2_TUNER_MODE_LANG1) {
1106 s1 |= TDA8425_S1_ML_SOUND_A;
1107 s1 |= TDA8425_S1_STEREO_PSEUDO;
1109 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1110 s1 |= TDA8425_S1_ML_SOUND_B;
1111 s1 |= TDA8425_S1_STEREO_PSEUDO;
1114 s1 |= TDA8425_S1_ML_STEREO;
1116 if (mode & V4L2_TUNER_MODE_MONO)
1117 s1 |= TDA8425_S1_STEREO_MONO;
1118 if (mode & V4L2_TUNER_MODE_STEREO)
1119 s1 |= TDA8425_S1_STEREO_SPATIAL;
1121 chip_write(chip,TDA8425_S1,s1);
1125 /* ---------------------------------------------------------------------- */
1126 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1128 /* the registers of 16C54, I2C sub address. */
1129 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1130 #define PIC16C54_REG_MISC 0x02
1132 /* bit definition of the RESET register, I2C data. */
1133 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1134 /* code of remote controller */
1135 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1136 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1137 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1138 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1139 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1140 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1141 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1143 /* ---------------------------------------------------------------------- */
1144 /* audio chip descriptions - defines+functions for TA8874Z */
1146 /* write 1st byte */
1147 #define TA8874Z_LED_STE 0x80
1148 #define TA8874Z_LED_BIL 0x40
1149 #define TA8874Z_LED_EXT 0x20
1150 #define TA8874Z_MONO_SET 0x10
1151 #define TA8874Z_MUTE 0x08
1152 #define TA8874Z_F_MONO 0x04
1153 #define TA8874Z_MODE_SUB 0x02
1154 #define TA8874Z_MODE_MAIN 0x01
1156 /* write 2nd byte */
1157 /*#define TA8874Z_TI 0x80 */ /* test mode */
1158 #define TA8874Z_SEPARATION 0x3f
1159 #define TA8874Z_SEPARATION_DEFAULT 0x10
1162 #define TA8874Z_B1 0x80
1163 #define TA8874Z_B0 0x40
1164 #define TA8874Z_CHAG_FLAG 0x20
1172 static int ta8874z_getmode(struct CHIPSTATE *chip)
1176 val = chip_read(chip);
1177 mode = V4L2_TUNER_MODE_MONO;
1178 if (val & TA8874Z_B1){
1179 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1180 }else if (!(val & TA8874Z_B0)){
1181 mode |= V4L2_TUNER_MODE_STEREO;
1183 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1187 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1188 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1189 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1190 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1192 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1196 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1199 case V4L2_TUNER_MODE_MONO:
1202 case V4L2_TUNER_MODE_STEREO:
1203 t = &ta8874z_stereo;
1205 case V4L2_TUNER_MODE_LANG1:
1208 case V4L2_TUNER_MODE_LANG2:
1216 chip_cmd(chip, "TA8874Z", t);
1219 static int ta8874z_checkit(struct CHIPSTATE *chip)
1222 rc = chip_read(chip);
1223 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1226 /* ---------------------------------------------------------------------- */
1227 /* audio chip descriptions - struct CHIPDESC */
1229 /* insmod options to enable/disable individual audio chips */
1230 static int tda8425 = 1;
1231 static int tda9840 = 1;
1232 static int tda9850 = 1;
1233 static int tda9855 = 1;
1234 static int tda9873 = 1;
1235 static int tda9874a = 1;
1236 static int tea6300; /* default 0 - address clash with msp34xx */
1237 static int tea6320; /* default 0 - address clash with msp34xx */
1238 static int tea6420 = 1;
1239 static int pic16c54 = 1;
1240 static int ta8874z; /* default 0 - address clash with tda9840 */
1242 module_param(tda8425, int, 0444);
1243 module_param(tda9840, int, 0444);
1244 module_param(tda9850, int, 0444);
1245 module_param(tda9855, int, 0444);
1246 module_param(tda9873, int, 0444);
1247 module_param(tda9874a, int, 0444);
1248 module_param(tea6300, int, 0444);
1249 module_param(tea6320, int, 0444);
1250 module_param(tea6420, int, 0444);
1251 module_param(pic16c54, int, 0444);
1252 module_param(ta8874z, int, 0444);
1254 static struct CHIPDESC chiplist[] = {
1257 .insmodopt = &tda9840,
1258 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1259 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1261 .flags = CHIP_NEED_CHECKMODE,
1264 .checkit = tda9840_checkit,
1265 .getmode = tda9840_getmode,
1266 .setmode = tda9840_setmode,
1268 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1269 /* ,TDA9840_SW, TDA9840_MONO */} }
1273 .insmodopt = &tda9873,
1274 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1275 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1277 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1280 .checkit = tda9873_checkit,
1281 .getmode = tda9873_getmode,
1282 .setmode = tda9873_setmode,
1284 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1285 .inputreg = TDA9873_SW,
1286 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1287 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1288 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1292 .name = "tda9874h/a",
1293 .insmodopt = &tda9874a,
1294 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1295 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1296 .flags = CHIP_NEED_CHECKMODE,
1299 .initialize = tda9874a_initialize,
1300 .checkit = tda9874a_checkit,
1301 .getmode = tda9874a_getmode,
1302 .setmode = tda9874a_setmode,
1306 .insmodopt = &tda9850,
1307 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1308 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1311 .getmode = tda985x_getmode,
1312 .setmode = tda985x_setmode,
1314 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1318 .insmodopt = &tda9855,
1319 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1320 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1322 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1324 .leftreg = TDA9855_VL,
1325 .rightreg = TDA9855_VR,
1326 .bassreg = TDA9855_BA,
1327 .treblereg = TDA9855_TR,
1330 .volfunc = tda9855_volume,
1331 .bassfunc = tda9855_bass,
1332 .treblefunc = tda9855_treble,
1333 .getmode = tda985x_getmode,
1334 .setmode = tda985x_setmode,
1336 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1337 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1338 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1339 0x07, 0x10, 0x10, 0x03 }}
1343 .insmodopt = &tea6300,
1344 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1345 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1347 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1349 .leftreg = TEA6300_VR,
1350 .rightreg = TEA6300_VL,
1351 .bassreg = TEA6300_BA,
1352 .treblereg = TEA6300_TR,
1355 .volfunc = tea6300_shift10,
1356 .bassfunc = tea6300_shift12,
1357 .treblefunc = tea6300_shift12,
1359 .inputreg = TEA6300_S,
1360 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1361 .inputmute = TEA6300_S_GMU,
1365 .insmodopt = &tea6320,
1366 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1367 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1369 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1371 .leftreg = TEA6320_V,
1372 .rightreg = TEA6320_V,
1373 .bassreg = TEA6320_BA,
1374 .treblereg = TEA6320_TR,
1377 .initialize = tea6320_initialize,
1378 .volfunc = tea6320_volume,
1379 .bassfunc = tea6320_shift11,
1380 .treblefunc = tea6320_shift11,
1382 .inputreg = TEA6320_S,
1383 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1384 .inputmute = TEA6300_S_GMU,
1388 .insmodopt = &tea6420,
1389 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1390 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1392 .flags = CHIP_HAS_INPUTSEL,
1395 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1396 .inputmute = TEA6300_S_GMU,
1400 .insmodopt = &tda8425,
1401 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1402 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1404 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1406 .leftreg = TDA8425_VL,
1407 .rightreg = TDA8425_VR,
1408 .bassreg = TDA8425_BA,
1409 .treblereg = TDA8425_TR,
1412 .initialize = tda8425_initialize,
1413 .volfunc = tda8425_shift10,
1414 .bassfunc = tda8425_shift12,
1415 .treblefunc = tda8425_shift12,
1416 .setmode = tda8425_setmode,
1418 .inputreg = TDA8425_S1,
1419 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1420 .inputmute = TDA8425_S1_OFF,
1424 .name = "pic16c54 (PV951)",
1425 .insmodopt = &pic16c54,
1426 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1427 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1429 .flags = CHIP_HAS_INPUTSEL,
1431 .inputreg = PIC16C54_REG_MISC,
1432 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1433 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1434 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1435 PIC16C54_MISC_SND_MUTE},
1436 .inputmute = PIC16C54_MISC_SND_MUTE,
1440 .checkit = ta8874z_checkit,
1441 .insmodopt = &ta8874z,
1442 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1443 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1445 .flags = CHIP_NEED_CHECKMODE,
1448 .getmode = ta8874z_getmode,
1449 .setmode = ta8874z_setmode,
1451 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1453 { .name = NULL } /* EOF */
1457 /* ---------------------------------------------------------------------- */
1458 /* i2c registration */
1460 static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1462 struct CHIPSTATE *chip;
1463 struct CHIPDESC *desc;
1466 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1467 printk(KERN_INFO "tvaudio: known chips: ");
1468 for (desc = chiplist; desc->name != NULL; desc++)
1469 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1473 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1477 i2c_set_clientdata(client, chip);
1479 /* find description for the chip */
1480 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1481 for (desc = chiplist; desc->name != NULL; desc++) {
1482 if (0 == *(desc->insmodopt))
1484 if (client->addr < desc->addr_lo ||
1485 client->addr > desc->addr_hi)
1487 if (desc->checkit && !desc->checkit(chip))
1491 if (desc->name == NULL) {
1492 v4l_dbg(1, debug, client, "no matching chip description found\n");
1496 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1498 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
1499 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1500 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1501 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1504 /* fill required data structures */
1506 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1508 chip->shadow.count = desc->registers+1;
1509 chip->prevmode = -1;
1510 chip->audmode = V4L2_TUNER_MODE_LANG1;
1512 /* initialization */
1513 if (desc->initialize != NULL)
1514 desc->initialize(chip);
1516 chip_cmd(chip,"init",&desc->init);
1518 if (desc->flags & CHIP_HAS_VOLUME) {
1519 if (!desc->volfunc) {
1520 /* This shouldn't be happen. Warn user, but keep working
1521 without volume controls
1523 v4l_info(chip->c, "volume callback undefined!\n");
1524 desc->flags &= ~CHIP_HAS_VOLUME;
1526 chip->left = desc->leftinit ? desc->leftinit : 65535;
1527 chip->right = desc->rightinit ? desc->rightinit : 65535;
1528 chip_write(chip, desc->leftreg,
1529 desc->volfunc(chip->left));
1530 chip_write(chip, desc->rightreg,
1531 desc->volfunc(chip->right));
1534 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1535 if (!desc->bassfunc || !desc->treblefunc) {
1536 /* This shouldn't be happen. Warn user, but keep working
1537 without bass/treble controls
1539 v4l_info(chip->c, "bass/treble callbacks undefined!\n");
1540 desc->flags &= ~CHIP_HAS_BASSTREBLE;
1542 chip->treble = desc->trebleinit ?
1543 desc->trebleinit : 32768;
1544 chip->bass = desc->bassinit ?
1545 desc->bassinit : 32768;
1546 chip_write(chip, desc->bassreg,
1547 desc->bassfunc(chip->bass));
1548 chip_write(chip, desc->treblereg,
1549 desc->treblefunc(chip->treble));
1553 chip->thread = NULL;
1554 if (desc->flags & CHIP_NEED_CHECKMODE) {
1555 if (!desc->getmode || !desc->setmode) {
1556 /* This shouldn't be happen. Warn user, but keep working
1559 v4l_info(chip->c, "set/get mode callbacks undefined!\n");
1562 /* start async thread */
1563 init_timer(&chip->wt);
1564 chip->wt.function = chip_thread_wake;
1565 chip->wt.data = (unsigned long)chip;
1566 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
1567 if (IS_ERR(chip->thread)) {
1568 v4l_warn(chip->c, "%s: failed to create kthread\n",
1570 chip->thread = NULL;
1576 static int chip_remove(struct i2c_client *client)
1578 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1580 del_timer_sync(&chip->wt);
1582 /* shutdown async thread */
1583 kthread_stop(chip->thread);
1584 chip->thread = NULL;
1591 static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1592 struct v4l2_control *ctrl)
1594 struct CHIPDESC *desc = chip->desc;
1597 case V4L2_CID_AUDIO_MUTE:
1598 ctrl->value=chip->muted;
1600 case V4L2_CID_AUDIO_VOLUME:
1601 if (!(desc->flags & CHIP_HAS_VOLUME))
1603 ctrl->value = max(chip->left,chip->right);
1605 case V4L2_CID_AUDIO_BALANCE:
1608 if (!(desc->flags & CHIP_HAS_VOLUME))
1610 volume = max(chip->left,chip->right);
1612 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1617 case V4L2_CID_AUDIO_BASS:
1618 if (desc->flags & CHIP_HAS_BASSTREBLE)
1620 ctrl->value = chip->bass;
1622 case V4L2_CID_AUDIO_TREBLE:
1623 if (desc->flags & CHIP_HAS_BASSTREBLE)
1625 ctrl->value = chip->treble;
1631 static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1632 struct v4l2_control *ctrl)
1634 struct CHIPDESC *desc = chip->desc;
1637 case V4L2_CID_AUDIO_MUTE:
1638 if (ctrl->value < 0 || ctrl->value >= 2)
1640 chip->muted = ctrl->value;
1642 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1644 chip_write_masked(chip,desc->inputreg,
1645 desc->inputmap[chip->input],desc->inputmask);
1647 case V4L2_CID_AUDIO_VOLUME:
1651 if (!(desc->flags & CHIP_HAS_VOLUME))
1654 volume = max(chip->left,chip->right);
1656 balance=(32768*min(chip->left,chip->right))/volume;
1661 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1662 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1664 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1665 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1669 case V4L2_CID_AUDIO_BALANCE:
1671 int volume, balance;
1672 if (!(desc->flags & CHIP_HAS_VOLUME))
1675 volume = max(chip->left,chip->right);
1676 balance = ctrl->value;
1678 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1679 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1683 case V4L2_CID_AUDIO_BASS:
1684 if (desc->flags & CHIP_HAS_BASSTREBLE)
1686 chip->bass = ctrl->value;
1687 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1690 case V4L2_CID_AUDIO_TREBLE:
1691 if (desc->flags & CHIP_HAS_BASSTREBLE)
1694 chip->treble = ctrl->value;
1695 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1703 /* ---------------------------------------------------------------------- */
1704 /* video4linux interface */
1706 static int chip_command(struct i2c_client *client,
1707 unsigned int cmd, void *arg)
1709 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1710 struct CHIPDESC *desc = chip->desc;
1712 v4l_dbg(1, debug, chip->c, "%s: chip_command 0x%x\n", chip->c->name, cmd);
1715 case AUDC_SET_RADIO:
1717 chip->watch_stereo = 0;
1718 /* del_timer(&chip->wt); */
1720 /* --- v4l ioctls --- */
1721 /* take care: bttv does userspace copying, we'll get a
1722 kernel pointer here... */
1723 case VIDIOC_QUERYCTRL:
1725 struct v4l2_queryctrl *qc = arg;
1728 case V4L2_CID_AUDIO_MUTE:
1730 case V4L2_CID_AUDIO_VOLUME:
1731 case V4L2_CID_AUDIO_BALANCE:
1732 if (!(desc->flags & CHIP_HAS_VOLUME))
1735 case V4L2_CID_AUDIO_BASS:
1736 case V4L2_CID_AUDIO_TREBLE:
1737 if (desc->flags & CHIP_HAS_BASSTREBLE)
1743 return v4l2_ctrl_query_fill_std(qc);
1746 return tvaudio_set_ctrl(chip, arg);
1749 return tvaudio_get_ctrl(chip, arg);
1750 case VIDIOC_INT_G_AUDIO_ROUTING:
1752 struct v4l2_routing *rt = arg;
1754 rt->input = chip->input;
1758 case VIDIOC_INT_S_AUDIO_ROUTING:
1760 struct v4l2_routing *rt = arg;
1762 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1764 /* There are four inputs: tuner, radio, extern and intern. */
1765 chip->input = rt->input;
1768 chip_write_masked(chip, desc->inputreg,
1769 desc->inputmap[chip->input], desc->inputmask);
1772 case VIDIOC_S_TUNER:
1774 struct v4l2_tuner *vt = arg;
1779 switch (vt->audmode) {
1780 case V4L2_TUNER_MODE_MONO:
1781 case V4L2_TUNER_MODE_STEREO:
1782 case V4L2_TUNER_MODE_LANG1:
1783 case V4L2_TUNER_MODE_LANG2:
1786 case V4L2_TUNER_MODE_LANG1_LANG2:
1787 mode = V4L2_TUNER_MODE_STEREO;
1792 chip->audmode = vt->audmode;
1794 if (desc->setmode && mode) {
1795 chip->watch_stereo = 0;
1796 /* del_timer(&chip->wt); */
1798 desc->setmode(chip, mode);
1802 case VIDIOC_G_TUNER:
1804 struct v4l2_tuner *vt = arg;
1805 int mode = V4L2_TUNER_MODE_MONO;
1809 vt->audmode = chip->audmode;
1811 vt->capability = V4L2_TUNER_CAP_STEREO |
1812 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1815 mode = desc->getmode(chip);
1817 if (mode & V4L2_TUNER_MODE_MONO)
1818 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1819 if (mode & V4L2_TUNER_MODE_STEREO)
1820 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1821 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1822 When this module is converted fully to v4l2, then this
1823 should change for those chips that can detect SAP. */
1824 if (mode & V4L2_TUNER_MODE_LANG1)
1825 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1826 V4L2_TUNER_SUB_LANG2;
1832 case VIDIOC_S_FREQUENCY:
1833 chip->mode = 0; /* automatic */
1835 /* For chips that provide getmode, setmode and checkmode,
1836 a kthread is created to automatically to set the audio
1837 standard. In this case, start with MONO and wait 2 seconds
1838 for the decoding to stablize. Then, run kthread to change
1839 to stereo, if carrier detected.
1842 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1843 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1844 chip->prevmode = -1; /* reset previous mode */
1845 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1849 case VIDIOC_G_CHIP_IDENT:
1850 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1855 static int chip_legacy_probe(struct i2c_adapter *adap)
1857 /* don't attach on saa7146 based cards,
1858 because dedicated drivers are used */
1859 if ((adap->id == I2C_HW_SAA7146))
1861 if (adap->class & I2C_CLASS_TV_ANALOG)
1866 /* This driver supports many devices and the idea is to let the driver
1867 detect which device is present. So rather than listing all supported
1868 devices here, we pretend to support a single, fake device type. */
1869 static const struct i2c_device_id chip_id[] = {
1873 MODULE_DEVICE_TABLE(i2c, chip_id);
1875 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1877 .driverid = I2C_DRIVERID_TVAUDIO,
1878 .command = chip_command,
1879 .probe = chip_probe,
1880 .remove = chip_remove,
1881 .legacy_probe = chip_legacy_probe,
1882 .id_table = chip_id,