2 * experimental driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * This code is placed under the terms of the GNU General Public License
13 * debug - set to 1 if you'd like to see debug messages
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/string.h>
21 #include <linux/timer.h>
22 #include <linux/delay.h>
23 #include <linux/errno.h>
24 #include <linux/slab.h>
25 #include <linux/videodev.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/kthread.h>
29 #include <linux/freezer.h>
31 #include <media/tvaudio.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-chip-ident.h>
34 #include <media/v4l2-i2c-drv-legacy.h>
36 #include <media/i2c-addr.h>
38 /* ---------------------------------------------------------------------- */
41 static int debug; /* insmod parameter */
42 module_param(debug, int, 0644);
44 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46 MODULE_LICENSE("GPL");
50 /* ---------------------------------------------------------------------- */
56 typedef int (*getvalue)(int);
57 typedef int (*checkit)(struct CHIPSTATE*);
58 typedef int (*initialize)(struct CHIPSTATE*);
59 typedef int (*getmode)(struct CHIPSTATE*);
60 typedef void (*setmode)(struct CHIPSTATE*, int mode);
63 typedef struct AUDIOCMD {
64 int count; /* # of bytes to send */
65 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
68 /* chip description */
70 char *name; /* chip name */
71 int addr_lo, addr_hi; /* i2c address range */
72 int registers; /* # of registers */
76 initialize initialize;
78 #define CHIP_HAS_VOLUME 1
79 #define CHIP_HAS_BASSTREBLE 2
80 #define CHIP_HAS_INPUTSEL 4
81 #define CHIP_NEED_CHECKMODE 8
83 /* various i2c command sequences */
86 /* which register has which value */
87 int leftreg,rightreg,treblereg,bassreg;
89 /* initialize with (defaults to 65535/65535/32768/32768 */
90 int leftinit,rightinit,trebleinit,bassinit;
92 /* functions to convert the values (v4l -> chip) */
93 getvalue volfunc,treblefunc,bassfunc;
99 /* input switch register + values for v4l inputs */
105 static struct CHIPDESC chiplist[];
107 /* current state of the chip */
109 struct i2c_client *c;
111 /* index into CHIPDESC array */
114 /* shadow register set */
117 /* current settings */
118 __u16 left,right,treble,bass,muted,mode;
124 struct task_struct *thread;
125 struct timer_list wt;
130 /* ---------------------------------------------------------------------- */
133 static unsigned short normal_i2c[] = {
134 I2C_ADDR_TDA8425 >> 1,
135 I2C_ADDR_TEA6300 >> 1,
136 I2C_ADDR_TEA6420 >> 1,
137 I2C_ADDR_TDA9840 >> 1,
138 I2C_ADDR_TDA985x_L >> 1,
139 I2C_ADDR_TDA985x_H >> 1,
140 I2C_ADDR_TDA9874 >> 1,
141 I2C_ADDR_PIC16C54 >> 1,
145 /* ---------------------------------------------------------------------- */
146 /* i2c I/O functions */
148 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
150 unsigned char buffer[2];
153 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
155 chip->shadow.bytes[1] = val;
157 if (1 != i2c_master_send(chip->c,buffer,1)) {
158 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
163 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
164 chip->c->name, subaddr, val);
165 chip->shadow.bytes[subaddr+1] = val;
168 if (2 != i2c_master_send(chip->c,buffer,2)) {
169 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
170 chip->c->name, subaddr, val);
177 static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
181 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
183 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
186 return chip_write(chip, subaddr, val);
189 static int chip_read(struct CHIPSTATE *chip)
191 unsigned char buffer;
193 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
194 v4l_warn(chip->c, "%s: I/O error (read)\n",
198 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
202 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
204 unsigned char write[1];
205 unsigned char read[1];
206 struct i2c_msg msgs[2] = {
207 { chip->c->addr, 0, 1, write },
208 { chip->c->addr, I2C_M_RD, 1, read }
212 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
213 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
216 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
217 chip->c->name, subaddr,read[0]);
221 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
228 /* update our shadow register set; print bytes if (debug > 0) */
229 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
230 chip->c->name, name,cmd->bytes[0]);
231 for (i = 1; i < cmd->count; i++) {
233 printk(" 0x%x",cmd->bytes[i]);
234 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
239 /* send data to the chip */
240 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
241 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
247 /* ---------------------------------------------------------------------- */
248 /* kernel thread for doing i2c stuff asyncronly
249 * right now it is used only to check the audio mode (mono/stereo/whatever)
250 * some time after switching to another TV channel, then turn on stereo
254 static void chip_thread_wake(unsigned long data)
256 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
257 wake_up_process(chip->thread);
260 static int chip_thread(void *data)
262 struct CHIPSTATE *chip = data;
263 struct CHIPDESC *desc = chiplist + chip->type;
266 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
269 set_current_state(TASK_INTERRUPTIBLE);
270 if (!kthread_should_stop())
272 set_current_state(TASK_RUNNING);
274 if (kthread_should_stop())
276 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
278 /* don't do anything for radio or if mode != auto */
279 if (chip->radio || chip->mode != 0)
282 /* have a look what's going on */
283 mode = desc->getmode(chip);
284 if (mode == chip->prevmode)
287 /* chip detected a new audio mode - set it */
288 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n",
291 chip->prevmode = mode;
293 if (mode & V4L2_TUNER_MODE_STEREO)
294 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
295 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
296 desc->setmode(chip, V4L2_TUNER_MODE_STEREO);
297 else if (mode & V4L2_TUNER_MODE_LANG1)
298 desc->setmode(chip, V4L2_TUNER_MODE_LANG1);
299 else if (mode & V4L2_TUNER_MODE_LANG2)
300 desc->setmode(chip, V4L2_TUNER_MODE_LANG2);
302 desc->setmode(chip, V4L2_TUNER_MODE_MONO);
304 /* schedule next check */
305 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
308 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
312 /* ---------------------------------------------------------------------- */
313 /* audio chip descriptions - defines+functions for tda9840 */
315 #define TDA9840_SW 0x00
316 #define TDA9840_LVADJ 0x02
317 #define TDA9840_STADJ 0x03
318 #define TDA9840_TEST 0x04
320 #define TDA9840_MONO 0x10
321 #define TDA9840_STEREO 0x2a
322 #define TDA9840_DUALA 0x12
323 #define TDA9840_DUALB 0x1e
324 #define TDA9840_DUALAB 0x1a
325 #define TDA9840_DUALBA 0x16
326 #define TDA9840_EXTERNAL 0x7a
328 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
329 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
330 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
332 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
333 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
335 static int tda9840_getmode(struct CHIPSTATE *chip)
339 val = chip_read(chip);
340 mode = V4L2_TUNER_MODE_MONO;
341 if (val & TDA9840_DS_DUAL)
342 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
343 if (val & TDA9840_ST_STEREO)
344 mode |= V4L2_TUNER_MODE_STEREO;
346 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
351 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
354 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
357 case V4L2_TUNER_MODE_MONO:
360 case V4L2_TUNER_MODE_STEREO:
363 case V4L2_TUNER_MODE_LANG1:
366 case V4L2_TUNER_MODE_LANG2:
374 chip_write(chip, TDA9840_SW, t);
377 static int tda9840_checkit(struct CHIPSTATE *chip)
380 rc = chip_read(chip);
381 /* lower 5 bits should be 0 */
382 return ((rc & 0x1f) == 0) ? 1 : 0;
385 /* ---------------------------------------------------------------------- */
386 /* audio chip descriptions - defines+functions for tda985x */
388 /* subaddresses for TDA9855 */
389 #define TDA9855_VR 0x00 /* Volume, right */
390 #define TDA9855_VL 0x01 /* Volume, left */
391 #define TDA9855_BA 0x02 /* Bass */
392 #define TDA9855_TR 0x03 /* Treble */
393 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
395 /* subaddresses for TDA9850 */
396 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
398 /* subaddesses for both chips */
399 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
400 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
401 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
402 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
403 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
404 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
406 /* Masks for bits in TDA9855 subaddresses */
407 /* 0x00 - VR in TDA9855 */
408 /* 0x01 - VL in TDA9855 */
409 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
410 * in 1dB steps - mute is 0x27 */
413 /* 0x02 - BA in TDA9855 */
414 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
415 * in .5dB steps - 0 is 0x0E */
418 /* 0x03 - TR in TDA9855 */
419 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
420 * in 3dB steps - 0 is 0x7 */
422 /* Masks for bits in both chips' subaddresses */
423 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
424 /* Unique to TDA9855: */
425 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
426 * in 3dB steps - mute is 0x0 */
428 /* Unique to TDA9850: */
429 /* lower 4 bits control stereo noise threshold, over which stereo turns off
430 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
433 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
434 /* Unique to TDA9855: */
435 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
436 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
437 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
438 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
439 /* Bits 0 to 3 select various combinations
440 * of line in and line out, only the
441 * interesting ones are defined */
442 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
443 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
445 /* Unique to TDA9850: */
446 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
447 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
450 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
451 /* Common to TDA9855 and TDA9850: */
452 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
453 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
454 #define TDA985x_MONO 0 /* Forces Mono output */
455 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
457 /* Unique to TDA9855: */
458 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
459 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
460 #define TDA9855_LINEAR 0 /* Linear Stereo */
461 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
462 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
463 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
464 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
466 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
467 /* Common to both TDA9855 and TDA9850: */
468 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
469 * in .5dB steps - 0dB is 0x7 */
471 /* 0x08, 0x09 - A1 and A2 (read/write) */
472 /* Common to both TDA9855 and TDA9850: */
473 /* lower 5 bites are wideband and spectral expander alignment
474 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
475 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
476 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
477 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
480 /* Common to both TDA9855 and TDA9850: */
481 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
482 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
483 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
485 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
486 static int tda9855_bass(int val) { return val/0xccc+0x06; }
487 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
489 static int tda985x_getmode(struct CHIPSTATE *chip)
493 mode = ((TDA985x_STP | TDA985x_SAPP) &
494 chip_read(chip)) >> 4;
495 /* Add mono mode regardless of SAP and stereo */
496 /* Allows forced mono */
497 return mode | V4L2_TUNER_MODE_MONO;
500 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
503 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
506 case V4L2_TUNER_MODE_MONO:
509 case V4L2_TUNER_MODE_STEREO:
510 c6 |= TDA985x_STEREO;
512 case V4L2_TUNER_MODE_LANG1:
519 chip_write(chip,TDA985x_C6,c6);
523 /* ---------------------------------------------------------------------- */
524 /* audio chip descriptions - defines+functions for tda9873h */
526 /* Subaddresses for TDA9873H */
528 #define TDA9873_SW 0x00 /* Switching */
529 #define TDA9873_AD 0x01 /* Adjust */
530 #define TDA9873_PT 0x02 /* Port */
532 /* Subaddress 0x00: Switching Data
535 * B1, B0: Input source selection
537 * 1, 0 external stereo
540 #define TDA9873_INP_MASK 3
541 #define TDA9873_INTERNAL 0
542 #define TDA9873_EXT_STEREO 2
543 #define TDA9873_EXT_MONO 1
545 /* B3, B2: output signal select
546 * B4 : transmission mode
549 * 1, 1, 1 Stereo (reversed channel)
556 #define TDA9873_TR_MASK (7 << 2)
557 #define TDA9873_TR_MONO 4
558 #define TDA9873_TR_STEREO 1 << 4
559 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
560 #define TDA9873_TR_DUALA 1 << 2
561 #define TDA9873_TR_DUALB 1 << 3
563 /* output level controls
564 * B5: output level switch (0 = reduced gain, 1 = normal gain)
565 * B6: mute (1 = muted)
566 * B7: auto-mute (1 = auto-mute enabled)
569 #define TDA9873_GAIN_NORMAL 1 << 5
570 #define TDA9873_MUTE 1 << 6
571 #define TDA9873_AUTOMUTE 1 << 7
573 /* Subaddress 0x01: Adjust/standard */
575 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
576 * Recommended value is +0 dB
579 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
581 /* Bits C6..C4 control FM stantard
583 * 0, 0, 0 B/G (PAL FM)
592 #define TDA9873_DK1 2
593 #define TDA9873_DK2 3
594 #define TDA9873_DK3 4
597 /* C7 controls identification response time (1=fast/0=normal)
599 #define TDA9873_IDR_NORM 0
600 #define TDA9873_IDR_FAST 1 << 7
603 /* Subaddress 0x02: Port data */
605 /* E1, E0 free programmable ports P1/P2
612 #define TDA9873_PORTS 3
615 #define TDA9873_TST_PORT 1 << 2
617 /* E5..E3 control mono output channel (together with transmission mode bit B4)
622 * 0 1 0 1 mono (from stereo decoder)
624 #define TDA9873_MOUT_MONO 0
625 #define TDA9873_MOUT_FMONO 0
626 #define TDA9873_MOUT_DUALA 0
627 #define TDA9873_MOUT_DUALB 1 << 3
628 #define TDA9873_MOUT_ST 1 << 4
629 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
630 #define TDA9873_MOUT_EXTL 1 << 5
631 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
632 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
633 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
635 /* Status bits: (chip read) */
636 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
637 #define TDA9873_STEREO 2 /* Stereo sound is identified */
638 #define TDA9873_DUAL 4 /* Dual sound is identified */
640 static int tda9873_getmode(struct CHIPSTATE *chip)
644 val = chip_read(chip);
645 mode = V4L2_TUNER_MODE_MONO;
646 if (val & TDA9873_STEREO)
647 mode |= V4L2_TUNER_MODE_STEREO;
648 if (val & TDA9873_DUAL)
649 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
650 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
655 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
657 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
658 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
660 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
661 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
665 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
666 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
669 case V4L2_TUNER_MODE_MONO:
670 sw_data |= TDA9873_TR_MONO;
672 case V4L2_TUNER_MODE_STEREO:
673 sw_data |= TDA9873_TR_STEREO;
675 case V4L2_TUNER_MODE_LANG1:
676 sw_data |= TDA9873_TR_DUALA;
678 case V4L2_TUNER_MODE_LANG2:
679 sw_data |= TDA9873_TR_DUALB;
686 chip_write(chip, TDA9873_SW, sw_data);
687 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
691 static int tda9873_checkit(struct CHIPSTATE *chip)
695 if (-1 == (rc = chip_read2(chip,254)))
697 return (rc & ~0x1f) == 0x80;
701 /* ---------------------------------------------------------------------- */
702 /* audio chip description - defines+functions for tda9874h and tda9874a */
703 /* Dariusz Kowalewski <darekk@automex.pl> */
705 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
706 #define TDA9874A_AGCGR 0x00 /* AGC gain */
707 #define TDA9874A_GCONR 0x01 /* general config */
708 #define TDA9874A_MSR 0x02 /* monitor select */
709 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
710 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
711 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
712 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
713 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
714 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
715 #define TDA9874A_DCR 0x09 /* demodulator config */
716 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
717 #define TDA9874A_FMMR 0x0b /* FM dematrix */
718 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
719 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
720 #define TDA9874A_NCONR 0x0e /* NICAM config */
721 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
722 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
723 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
724 #define TDA9874A_AMCONR 0x12 /* audio mute control */
725 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
726 #define TDA9874A_AOSR 0x14 /* analog output select */
727 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
728 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
729 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
730 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
731 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
733 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
734 #define TDA9874A_DSR 0x00 /* device status */
735 #define TDA9874A_NSR 0x01 /* NICAM status */
736 #define TDA9874A_NECR 0x02 /* NICAM error count */
737 #define TDA9874A_DR1 0x03 /* add. data LSB */
738 #define TDA9874A_DR2 0x04 /* add. data MSB */
739 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
740 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
741 #define TDA9874A_SIFLR 0x07 /* SIF level */
742 #define TDA9874A_TR2 252 /* test reg. 2 */
743 #define TDA9874A_TR1 253 /* test reg. 1 */
744 #define TDA9874A_DIC 254 /* device id. code */
745 #define TDA9874A_SIC 255 /* software id. code */
748 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
749 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
750 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
751 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
752 static int tda9874a_dic = -1; /* device id. code */
754 /* insmod options for tda9874a */
755 static unsigned int tda9874a_SIF = UNSET;
756 static unsigned int tda9874a_AMSEL = UNSET;
757 static unsigned int tda9874a_STD = UNSET;
758 module_param(tda9874a_SIF, int, 0444);
759 module_param(tda9874a_AMSEL, int, 0444);
760 module_param(tda9874a_STD, int, 0444);
763 * initialization table for tda9874 decoder:
764 * - carrier 1 freq. registers (3 bytes)
765 * - carrier 2 freq. registers (3 bytes)
766 * - demudulator config register
767 * - FM de-emphasis register (slow identification mode)
768 * Note: frequency registers must be written in single i2c transfer.
770 static struct tda9874a_MODES {
773 } tda9874a_modelist[9] = {
774 { "A2, B/G", /* default */
775 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
777 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
779 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
781 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
783 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
785 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
787 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
789 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
791 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
794 static int tda9874a_setup(struct CHIPSTATE *chip)
796 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
797 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
798 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
799 if(tda9874a_dic == 0x11) {
800 chip_write(chip, TDA9874A_FMMR, 0x80);
801 } else { /* dic == 0x07 */
802 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
803 chip_write(chip, TDA9874A_FMMR, 0x00);
805 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
806 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
807 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
808 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
809 /* Note: If signal quality is poor you may want to change NICAM */
810 /* error limit registers (NLELR and NUELR) to some greater values. */
811 /* Then the sound would remain stereo, but won't be so clear. */
812 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
813 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
815 if(tda9874a_dic == 0x11) {
816 chip_write(chip, TDA9874A_AMCONR, 0xf9);
817 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
818 chip_write(chip, TDA9874A_AOSR, 0x80);
819 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
820 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
821 } else { /* dic == 0x07 */
822 chip_write(chip, TDA9874A_AMCONR, 0xfb);
823 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
824 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
826 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
827 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
831 static int tda9874a_getmode(struct CHIPSTATE *chip)
834 int necr; /* just for debugging */
836 mode = V4L2_TUNER_MODE_MONO;
838 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
840 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
842 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
845 /* need to store dsr/nsr somewhere */
846 chip->shadow.bytes[MAXREGS-2] = dsr;
847 chip->shadow.bytes[MAXREGS-1] = nsr;
850 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
851 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
852 * that sound has (temporarily) switched from NICAM to
853 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
854 * error count. So in fact there is no stereo in this case :-(
855 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
856 * external 4052 multiplexer in audio_hook().
858 if(nsr & 0x02) /* NSR.S/MB=1 */
859 mode |= V4L2_TUNER_MODE_STEREO;
860 if(nsr & 0x01) /* NSR.D/SB=1 */
861 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
863 if(dsr & 0x02) /* DSR.IDSTE=1 */
864 mode |= V4L2_TUNER_MODE_STEREO;
865 if(dsr & 0x04) /* DSR.IDDUA=1 */
866 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
869 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
870 dsr, nsr, necr, mode);
874 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
876 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
877 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
879 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
880 tda9874a_NCONR &= 0xfe; /* enable */
882 tda9874a_NCONR |= 0x01; /* disable */
883 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
886 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
887 * and has auto-select function for audio output (AOSR register).
888 * Old TDA9874H doesn't support these features.
889 * TDA9874A also has additional mono output pin (OUTM), which
890 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
892 if(tda9874a_dic == 0x11) {
894 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
897 case V4L2_TUNER_MODE_MONO:
898 case V4L2_TUNER_MODE_STEREO:
900 case V4L2_TUNER_MODE_LANG1:
901 aosr = 0x80; /* auto-select, dual A/A */
902 mdacosr = (tda9874a_mode) ? 0x82:0x80;
904 case V4L2_TUNER_MODE_LANG2:
905 aosr = 0xa0; /* auto-select, dual B/B */
906 mdacosr = (tda9874a_mode) ? 0x83:0x81;
912 chip_write(chip, TDA9874A_AOSR, aosr);
913 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
915 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
916 mode, aosr, mdacosr);
918 } else { /* dic == 0x07 */
922 case V4L2_TUNER_MODE_MONO:
923 fmmr = 0x00; /* mono */
924 aosr = 0x10; /* A/A */
926 case V4L2_TUNER_MODE_STEREO:
929 aosr = 0x00; /* handled by NICAM auto-mute */
931 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
935 case V4L2_TUNER_MODE_LANG1:
936 fmmr = 0x02; /* dual */
937 aosr = 0x10; /* dual A/A */
939 case V4L2_TUNER_MODE_LANG2:
940 fmmr = 0x02; /* dual */
941 aosr = 0x20; /* dual B/B */
947 chip_write(chip, TDA9874A_FMMR, fmmr);
948 chip_write(chip, TDA9874A_AOSR, aosr);
950 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
955 static int tda9874a_checkit(struct CHIPSTATE *chip)
957 int dic,sic; /* device id. and software id. codes */
959 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
961 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
964 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
966 if((dic == 0x11)||(dic == 0x07)) {
967 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
968 tda9874a_dic = dic; /* remember device id. */
971 return 0; /* not found */
974 static int tda9874a_initialize(struct CHIPSTATE *chip)
976 if (tda9874a_SIF > 2)
978 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
980 if(tda9874a_AMSEL > 1)
983 if(tda9874a_SIF == 1)
984 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
986 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
988 tda9874a_ESP = tda9874a_STD;
989 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
991 if(tda9874a_AMSEL == 0)
992 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
994 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
996 tda9874a_setup(chip);
1001 /* ---------------------------------------------------------------------- */
1002 /* audio chip descriptions - defines+functions for tea6420 */
1004 #define TEA6300_VL 0x00 /* volume left */
1005 #define TEA6300_VR 0x01 /* volume right */
1006 #define TEA6300_BA 0x02 /* bass */
1007 #define TEA6300_TR 0x03 /* treble */
1008 #define TEA6300_FA 0x04 /* fader control */
1009 #define TEA6300_S 0x05 /* switch register */
1010 /* values for those registers: */
1011 #define TEA6300_S_SA 0x01 /* stereo A input */
1012 #define TEA6300_S_SB 0x02 /* stereo B */
1013 #define TEA6300_S_SC 0x04 /* stereo C */
1014 #define TEA6300_S_GMU 0x80 /* general mute */
1016 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1017 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1018 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1019 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1020 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1021 #define TEA6320_BA 0x05 /* bass (0-4) */
1022 #define TEA6320_TR 0x06 /* treble (0-4) */
1023 #define TEA6320_S 0x07 /* switch register */
1024 /* values for those registers: */
1025 #define TEA6320_S_SA 0x07 /* stereo A input */
1026 #define TEA6320_S_SB 0x06 /* stereo B */
1027 #define TEA6320_S_SC 0x05 /* stereo C */
1028 #define TEA6320_S_SD 0x04 /* stereo D */
1029 #define TEA6320_S_GMU 0x80 /* general mute */
1031 #define TEA6420_S_SA 0x00 /* stereo A input */
1032 #define TEA6420_S_SB 0x01 /* stereo B */
1033 #define TEA6420_S_SC 0x02 /* stereo C */
1034 #define TEA6420_S_SD 0x03 /* stereo D */
1035 #define TEA6420_S_SE 0x04 /* stereo E */
1036 #define TEA6420_S_GMU 0x05 /* general mute */
1038 static int tea6300_shift10(int val) { return val >> 10; }
1039 static int tea6300_shift12(int val) { return val >> 12; }
1041 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1042 /* 0x0c mirror those immediately higher) */
1043 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1044 static int tea6320_shift11(int val) { return val >> 11; }
1045 static int tea6320_initialize(struct CHIPSTATE * chip)
1047 chip_write(chip, TEA6320_FFR, 0x3f);
1048 chip_write(chip, TEA6320_FFL, 0x3f);
1049 chip_write(chip, TEA6320_FRR, 0x3f);
1050 chip_write(chip, TEA6320_FRL, 0x3f);
1056 /* ---------------------------------------------------------------------- */
1057 /* audio chip descriptions - defines+functions for tda8425 */
1059 #define TDA8425_VL 0x00 /* volume left */
1060 #define TDA8425_VR 0x01 /* volume right */
1061 #define TDA8425_BA 0x02 /* bass */
1062 #define TDA8425_TR 0x03 /* treble */
1063 #define TDA8425_S1 0x08 /* switch functions */
1064 /* values for those registers: */
1065 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1066 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1067 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1068 #define TDA8425_S1_MU 0x20 /* mute bit */
1069 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1070 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1071 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1072 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1073 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1074 #define TDA8425_S1_ML 0x06 /* language selector */
1075 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1076 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1077 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1078 #define TDA8425_S1_IS 0x01 /* channel selector */
1081 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1082 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1084 static int tda8425_initialize(struct CHIPSTATE *chip)
1086 struct CHIPDESC *desc = chiplist + chip->type;
1087 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1088 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1090 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1091 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1096 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1098 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1100 if (mode & V4L2_TUNER_MODE_LANG1) {
1101 s1 |= TDA8425_S1_ML_SOUND_A;
1102 s1 |= TDA8425_S1_STEREO_PSEUDO;
1104 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1105 s1 |= TDA8425_S1_ML_SOUND_B;
1106 s1 |= TDA8425_S1_STEREO_PSEUDO;
1109 s1 |= TDA8425_S1_ML_STEREO;
1111 if (mode & V4L2_TUNER_MODE_MONO)
1112 s1 |= TDA8425_S1_STEREO_MONO;
1113 if (mode & V4L2_TUNER_MODE_STEREO)
1114 s1 |= TDA8425_S1_STEREO_SPATIAL;
1116 chip_write(chip,TDA8425_S1,s1);
1120 /* ---------------------------------------------------------------------- */
1121 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1123 /* the registers of 16C54, I2C sub address. */
1124 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1125 #define PIC16C54_REG_MISC 0x02
1127 /* bit definition of the RESET register, I2C data. */
1128 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1129 /* code of remote controller */
1130 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1131 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1132 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1133 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1134 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1135 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1136 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1138 /* ---------------------------------------------------------------------- */
1139 /* audio chip descriptions - defines+functions for TA8874Z */
1141 /* write 1st byte */
1142 #define TA8874Z_LED_STE 0x80
1143 #define TA8874Z_LED_BIL 0x40
1144 #define TA8874Z_LED_EXT 0x20
1145 #define TA8874Z_MONO_SET 0x10
1146 #define TA8874Z_MUTE 0x08
1147 #define TA8874Z_F_MONO 0x04
1148 #define TA8874Z_MODE_SUB 0x02
1149 #define TA8874Z_MODE_MAIN 0x01
1151 /* write 2nd byte */
1152 /*#define TA8874Z_TI 0x80 */ /* test mode */
1153 #define TA8874Z_SEPARATION 0x3f
1154 #define TA8874Z_SEPARATION_DEFAULT 0x10
1157 #define TA8874Z_B1 0x80
1158 #define TA8874Z_B0 0x40
1159 #define TA8874Z_CHAG_FLAG 0x20
1167 static int ta8874z_getmode(struct CHIPSTATE *chip)
1171 val = chip_read(chip);
1172 mode = V4L2_TUNER_MODE_MONO;
1173 if (val & TA8874Z_B1){
1174 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1175 }else if (!(val & TA8874Z_B0)){
1176 mode |= V4L2_TUNER_MODE_STEREO;
1178 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1182 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1183 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1184 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1185 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1187 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1191 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1194 case V4L2_TUNER_MODE_MONO:
1197 case V4L2_TUNER_MODE_STEREO:
1198 t = &ta8874z_stereo;
1200 case V4L2_TUNER_MODE_LANG1:
1203 case V4L2_TUNER_MODE_LANG2:
1211 chip_cmd(chip, "TA8874Z", t);
1214 static int ta8874z_checkit(struct CHIPSTATE *chip)
1217 rc = chip_read(chip);
1218 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1221 /* ---------------------------------------------------------------------- */
1222 /* audio chip descriptions - struct CHIPDESC */
1224 /* insmod options to enable/disable individual audio chips */
1225 static int tda8425 = 1;
1226 static int tda9840 = 1;
1227 static int tda9850 = 1;
1228 static int tda9855 = 1;
1229 static int tda9873 = 1;
1230 static int tda9874a = 1;
1231 static int tea6300; /* default 0 - address clash with msp34xx */
1232 static int tea6320; /* default 0 - address clash with msp34xx */
1233 static int tea6420 = 1;
1234 static int pic16c54 = 1;
1235 static int ta8874z; /* default 0 - address clash with tda9840 */
1237 module_param(tda8425, int, 0444);
1238 module_param(tda9840, int, 0444);
1239 module_param(tda9850, int, 0444);
1240 module_param(tda9855, int, 0444);
1241 module_param(tda9873, int, 0444);
1242 module_param(tda9874a, int, 0444);
1243 module_param(tea6300, int, 0444);
1244 module_param(tea6320, int, 0444);
1245 module_param(tea6420, int, 0444);
1246 module_param(pic16c54, int, 0444);
1247 module_param(ta8874z, int, 0444);
1249 static struct CHIPDESC chiplist[] = {
1252 .insmodopt = &tda9840,
1253 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1254 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1256 .flags = CHIP_NEED_CHECKMODE,
1259 .checkit = tda9840_checkit,
1260 .getmode = tda9840_getmode,
1261 .setmode = tda9840_setmode,
1263 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1264 /* ,TDA9840_SW, TDA9840_MONO */} }
1268 .insmodopt = &tda9873,
1269 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1270 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1272 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1275 .checkit = tda9873_checkit,
1276 .getmode = tda9873_getmode,
1277 .setmode = tda9873_setmode,
1279 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1280 .inputreg = TDA9873_SW,
1281 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1282 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1283 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1287 .name = "tda9874h/a",
1288 .insmodopt = &tda9874a,
1289 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1290 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1291 .flags = CHIP_NEED_CHECKMODE,
1294 .initialize = tda9874a_initialize,
1295 .checkit = tda9874a_checkit,
1296 .getmode = tda9874a_getmode,
1297 .setmode = tda9874a_setmode,
1301 .insmodopt = &tda9850,
1302 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1303 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1306 .getmode = tda985x_getmode,
1307 .setmode = tda985x_setmode,
1309 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1313 .insmodopt = &tda9855,
1314 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1315 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1317 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1319 .leftreg = TDA9855_VL,
1320 .rightreg = TDA9855_VR,
1321 .bassreg = TDA9855_BA,
1322 .treblereg = TDA9855_TR,
1325 .volfunc = tda9855_volume,
1326 .bassfunc = tda9855_bass,
1327 .treblefunc = tda9855_treble,
1328 .getmode = tda985x_getmode,
1329 .setmode = tda985x_setmode,
1331 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1332 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1333 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1334 0x07, 0x10, 0x10, 0x03 }}
1338 .insmodopt = &tea6300,
1339 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1340 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1342 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1344 .leftreg = TEA6300_VR,
1345 .rightreg = TEA6300_VL,
1346 .bassreg = TEA6300_BA,
1347 .treblereg = TEA6300_TR,
1350 .volfunc = tea6300_shift10,
1351 .bassfunc = tea6300_shift12,
1352 .treblefunc = tea6300_shift12,
1354 .inputreg = TEA6300_S,
1355 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1356 .inputmute = TEA6300_S_GMU,
1360 .insmodopt = &tea6320,
1361 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1362 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1364 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1366 .leftreg = TEA6320_V,
1367 .rightreg = TEA6320_V,
1368 .bassreg = TEA6320_BA,
1369 .treblereg = TEA6320_TR,
1372 .initialize = tea6320_initialize,
1373 .volfunc = tea6320_volume,
1374 .bassfunc = tea6320_shift11,
1375 .treblefunc = tea6320_shift11,
1377 .inputreg = TEA6320_S,
1378 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1379 .inputmute = TEA6300_S_GMU,
1383 .insmodopt = &tea6420,
1384 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1385 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1387 .flags = CHIP_HAS_INPUTSEL,
1390 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1391 .inputmute = TEA6300_S_GMU,
1395 .insmodopt = &tda8425,
1396 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1397 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1399 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1401 .leftreg = TDA8425_VL,
1402 .rightreg = TDA8425_VR,
1403 .bassreg = TDA8425_BA,
1404 .treblereg = TDA8425_TR,
1407 .initialize = tda8425_initialize,
1408 .volfunc = tda8425_shift10,
1409 .bassfunc = tda8425_shift12,
1410 .treblefunc = tda8425_shift12,
1411 .setmode = tda8425_setmode,
1413 .inputreg = TDA8425_S1,
1414 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1415 .inputmute = TDA8425_S1_OFF,
1419 .name = "pic16c54 (PV951)",
1420 .insmodopt = &pic16c54,
1421 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1422 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1424 .flags = CHIP_HAS_INPUTSEL,
1426 .inputreg = PIC16C54_REG_MISC,
1427 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1428 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1429 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1430 PIC16C54_MISC_SND_MUTE},
1431 .inputmute = PIC16C54_MISC_SND_MUTE,
1435 .checkit = ta8874z_checkit,
1436 .insmodopt = &ta8874z,
1437 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1438 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1440 .flags = CHIP_NEED_CHECKMODE,
1443 .getmode = ta8874z_getmode,
1444 .setmode = ta8874z_setmode,
1446 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1448 { .name = NULL } /* EOF */
1452 /* ---------------------------------------------------------------------- */
1453 /* i2c registration */
1455 static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1457 struct CHIPSTATE *chip;
1458 struct CHIPDESC *desc;
1461 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1462 printk(KERN_INFO "tvaudio: known chips: ");
1463 for (desc = chiplist; desc->name != NULL; desc++)
1464 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1468 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1472 i2c_set_clientdata(client, chip);
1474 /* find description for the chip */
1475 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1476 for (desc = chiplist; desc->name != NULL; desc++) {
1477 if (0 == *(desc->insmodopt))
1479 if (client->addr < desc->addr_lo ||
1480 client->addr > desc->addr_hi)
1482 if (desc->checkit && !desc->checkit(chip))
1486 if (desc->name == NULL) {
1487 v4l_dbg(1, debug, client, "no matching chip description found\n");
1491 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1493 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
1494 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1495 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1496 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1499 /* fill required data structures */
1501 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1502 chip->type = desc-chiplist;
1503 chip->shadow.count = desc->registers+1;
1504 chip->prevmode = -1;
1505 chip->audmode = V4L2_TUNER_MODE_LANG1;
1507 /* initialization */
1508 if (desc->initialize != NULL)
1509 desc->initialize(chip);
1511 chip_cmd(chip,"init",&desc->init);
1513 if (desc->flags & CHIP_HAS_VOLUME) {
1514 chip->left = desc->leftinit ? desc->leftinit : 65535;
1515 chip->right = desc->rightinit ? desc->rightinit : 65535;
1516 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1517 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1519 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1520 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1521 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1522 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1523 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1526 chip->thread = NULL;
1527 if (desc->flags & CHIP_NEED_CHECKMODE) {
1528 /* start async thread */
1529 init_timer(&chip->wt);
1530 chip->wt.function = chip_thread_wake;
1531 chip->wt.data = (unsigned long)chip;
1532 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
1533 if (IS_ERR(chip->thread)) {
1534 v4l_warn(chip->c, "%s: failed to create kthread\n",
1536 chip->thread = NULL;
1542 static int chip_remove(struct i2c_client *client)
1544 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1546 del_timer_sync(&chip->wt);
1548 /* shutdown async thread */
1549 kthread_stop(chip->thread);
1550 chip->thread = NULL;
1557 static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1558 struct v4l2_control *ctrl)
1560 struct CHIPDESC *desc = chiplist + chip->type;
1563 case V4L2_CID_AUDIO_MUTE:
1564 ctrl->value=chip->muted;
1566 case V4L2_CID_AUDIO_VOLUME:
1567 if (!(desc->flags & CHIP_HAS_VOLUME))
1569 ctrl->value = max(chip->left,chip->right);
1571 case V4L2_CID_AUDIO_BALANCE:
1574 if (!(desc->flags & CHIP_HAS_VOLUME))
1576 volume = max(chip->left,chip->right);
1578 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1583 case V4L2_CID_AUDIO_BASS:
1584 if (desc->flags & CHIP_HAS_BASSTREBLE)
1586 ctrl->value = chip->bass;
1588 case V4L2_CID_AUDIO_TREBLE:
1589 if (desc->flags & CHIP_HAS_BASSTREBLE)
1591 ctrl->value = chip->treble;
1597 static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1598 struct v4l2_control *ctrl)
1600 struct CHIPDESC *desc = chiplist + chip->type;
1603 case V4L2_CID_AUDIO_MUTE:
1604 if (ctrl->value < 0 || ctrl->value >= 2)
1606 chip->muted = ctrl->value;
1608 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1610 chip_write_masked(chip,desc->inputreg,
1611 desc->inputmap[chip->input],desc->inputmask);
1613 case V4L2_CID_AUDIO_VOLUME:
1617 if (!(desc->flags & CHIP_HAS_VOLUME))
1620 volume = max(chip->left,chip->right);
1622 balance=(32768*min(chip->left,chip->right))/volume;
1627 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1628 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1630 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1631 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1635 case V4L2_CID_AUDIO_BALANCE:
1637 int volume, balance;
1638 if (!(desc->flags & CHIP_HAS_VOLUME))
1641 volume = max(chip->left,chip->right);
1642 balance = ctrl->value;
1644 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1645 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1649 case V4L2_CID_AUDIO_BASS:
1650 if (desc->flags & CHIP_HAS_BASSTREBLE)
1652 chip->bass = ctrl->value;
1653 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1656 case V4L2_CID_AUDIO_TREBLE:
1657 if (desc->flags & CHIP_HAS_BASSTREBLE)
1660 chip->treble = ctrl->value;
1661 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1669 /* ---------------------------------------------------------------------- */
1670 /* video4linux interface */
1672 static int chip_command(struct i2c_client *client,
1673 unsigned int cmd, void *arg)
1675 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1676 struct CHIPDESC *desc = chiplist + chip->type;
1678 v4l_dbg(1, debug, chip->c, "%s: chip_command 0x%x\n", chip->c->name, cmd);
1681 case AUDC_SET_RADIO:
1683 chip->watch_stereo = 0;
1684 /* del_timer(&chip->wt); */
1686 /* --- v4l ioctls --- */
1687 /* take care: bttv does userspace copying, we'll get a
1688 kernel pointer here... */
1689 case VIDIOC_QUERYCTRL:
1691 struct v4l2_queryctrl *qc = arg;
1694 case V4L2_CID_AUDIO_MUTE:
1696 case V4L2_CID_AUDIO_VOLUME:
1697 case V4L2_CID_AUDIO_BALANCE:
1698 if (!(desc->flags & CHIP_HAS_VOLUME))
1701 case V4L2_CID_AUDIO_BASS:
1702 case V4L2_CID_AUDIO_TREBLE:
1703 if (desc->flags & CHIP_HAS_BASSTREBLE)
1709 return v4l2_ctrl_query_fill_std(qc);
1712 return tvaudio_set_ctrl(chip, arg);
1715 return tvaudio_get_ctrl(chip, arg);
1716 case VIDIOC_INT_G_AUDIO_ROUTING:
1718 struct v4l2_routing *rt = arg;
1720 rt->input = chip->input;
1724 case VIDIOC_INT_S_AUDIO_ROUTING:
1726 struct v4l2_routing *rt = arg;
1728 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1730 /* There are four inputs: tuner, radio, extern and intern. */
1731 chip->input = rt->input;
1734 chip_write_masked(chip, desc->inputreg,
1735 desc->inputmap[chip->input], desc->inputmask);
1738 case VIDIOC_S_TUNER:
1740 struct v4l2_tuner *vt = arg;
1745 switch (vt->audmode) {
1746 case V4L2_TUNER_MODE_MONO:
1747 case V4L2_TUNER_MODE_STEREO:
1748 case V4L2_TUNER_MODE_LANG1:
1749 case V4L2_TUNER_MODE_LANG2:
1752 case V4L2_TUNER_MODE_LANG1_LANG2:
1753 mode = V4L2_TUNER_MODE_STEREO;
1758 chip->audmode = vt->audmode;
1760 if (desc->setmode && mode) {
1761 chip->watch_stereo = 0;
1762 /* del_timer(&chip->wt); */
1764 desc->setmode(chip, mode);
1768 case VIDIOC_G_TUNER:
1770 struct v4l2_tuner *vt = arg;
1771 int mode = V4L2_TUNER_MODE_MONO;
1775 vt->audmode = chip->audmode;
1777 vt->capability = V4L2_TUNER_CAP_STEREO |
1778 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1781 mode = desc->getmode(chip);
1783 if (mode & V4L2_TUNER_MODE_MONO)
1784 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1785 if (mode & V4L2_TUNER_MODE_STEREO)
1786 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1787 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1788 When this module is converted fully to v4l2, then this
1789 should change for those chips that can detect SAP. */
1790 if (mode & V4L2_TUNER_MODE_LANG1)
1791 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1792 V4L2_TUNER_SUB_LANG2;
1798 case VIDIOC_S_FREQUENCY:
1799 chip->mode = 0; /* automatic */
1801 /* For chips that provide getmode, setmode and checkmode,
1802 a kthread is created to automatically to set the audio
1803 standard. In this case, start with MONO and wait 2 seconds
1804 for the decoding to stablize. Then, run kthread to change
1805 to stereo, if carrier detected.
1808 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1809 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1810 chip->prevmode = -1; /* reset previous mode */
1811 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1815 case VIDIOC_G_CHIP_IDENT:
1816 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1821 static int chip_legacy_probe(struct i2c_adapter *adap)
1823 /* don't attach on saa7146 based cards,
1824 because dedicated drivers are used */
1825 if ((adap->id == I2C_HW_SAA7146))
1827 if (adap->class & I2C_CLASS_TV_ANALOG)
1832 /* This driver supports many devices and the idea is to let the driver
1833 detect which device is present. So rather than listing all supported
1834 devices here, we pretend to support a single, fake device type. */
1835 static const struct i2c_device_id chip_id[] = {
1839 MODULE_DEVICE_TABLE(i2c, chip_id);
1841 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1843 .driverid = I2C_DRIVERID_TVAUDIO,
1844 .command = chip_command,
1845 .probe = chip_probe,
1846 .remove = chip_remove,
1847 .legacy_probe = chip_legacy_probe,
1848 .id_table = chip_id,