drivers/i2c/chips/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/time.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/workqueue.h>
  34 #include <linux/io.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/ch9.h>
  37 #include <linux/usb/gadget.h>
  38 #include <linux/usb/otg.h>
  39 #include <linux/i2c/twl4030.h>
  40 #include <mach/usb.h>
  41
  42 /* Register defines */
  43
  44 #define VENDOR_ID_LO                    0x00
  45 #define VENDOR_ID_HI                    0x01
  46 #define PRODUCT_ID_LO                   0x02
  47 #define PRODUCT_ID_HI                   0x03
  48
  49 #define FUNC_CTRL                       0x04
  50 #define FUNC_CTRL_SET                   0x05
  51 #define FUNC_CTRL_CLR                   0x06
  52 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  53 #define FUNC_CTRL_RESET                 (1 << 5)
  54 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  55 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  56 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  57 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  58 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  59 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  60 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  61 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  62 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  63 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  64
  65 #define IFC_CTRL                        0x07
  66 #define IFC_CTRL_SET                    0x08
  67 #define IFC_CTRL_CLR                    0x09
  68 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  69 #define IFC_CTRL_AUTORESUME             (1 << 4)
  70 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  71 #define IFC_CTRL_CARKITMODE             (1 << 2)
  72 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  73
  74 #define TWL4030_OTG_CTRL                0x0A
  75 #define TWL4030_OTG_CTRL_SET            0x0B
  76 #define TWL4030_OTG_CTRL_CLR            0x0C
  77 #define TWL4030_OTG_CTRL_DRVVBUS        (1 << 5)
  78 #define TWL4030_OTG_CTRL_CHRGVBUS       (1 << 4)
  79 #define TWL4030_OTG_CTRL_DISCHRGVBUS    (1 << 3)
  80 #define TWL4030_OTG_CTRL_DMPULLDOWN     (1 << 2)
  81 #define TWL4030_OTG_CTRL_DPPULLDOWN     (1 << 1)
  82 #define TWL4030_OTG_CTRL_IDPULLUP       (1 << 0)
  83
  84 #define USB_INT_EN_RISE                 0x0D
  85 #define USB_INT_EN_RISE_SET             0x0E
  86 #define USB_INT_EN_RISE_CLR             0x0F
  87 #define USB_INT_EN_FALL                 0x10
  88 #define USB_INT_EN_FALL_SET             0x11
  89 #define USB_INT_EN_FALL_CLR             0x12
  90 #define USB_INT_STS                     0x13
  91 #define USB_INT_LATCH                   0x14
  92 #define USB_INT_IDGND                   (1 << 4)
  93 #define USB_INT_SESSEND                 (1 << 3)
  94 #define USB_INT_SESSVALID               (1 << 2)
  95 #define USB_INT_VBUSVALID               (1 << 1)
  96 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  97
  98 #define CARKIT_CTRL                     0x19
  99 #define CARKIT_CTRL_SET                 0x1A
 100 #define CARKIT_CTRL_CLR                 0x1B
 101 #define CARKIT_CTRL_MICEN               (1 << 6)
 102 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
 103 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
 104 #define CARKIT_CTRL_RXDEN               (1 << 3)
 105 #define CARKIT_CTRL_TXDEN               (1 << 2)
 106 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 107 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 108 #define CARKIT_PLS_CTRL                 0x22
 109 #define CARKIT_PLS_CTRL_SET             0x23
 110 #define CARKIT_PLS_CTRL_CLR             0x24
 111 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 112 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 113 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 114 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 115
 116 #define MCPC_CTRL                       0x30
 117 #define MCPC_CTRL_SET                   0x31
 118 #define MCPC_CTRL_CLR                   0x32
 119 #define MCPC_CTRL_RTSOL                 (1 << 7)
 120 #define MCPC_CTRL_EXTSWR                (1 << 6)
 121 #define MCPC_CTRL_EXTSWC                (1 << 5)
 122 #define MCPC_CTRL_VOICESW               (1 << 4)
 123 #define MCPC_CTRL_OUT64K                (1 << 3)
 124 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 125 #define MCPC_CTRL_HS_UART               (1 << 0)
 126
 127 #define MCPC_IO_CTRL                    0x33
 128 #define MCPC_IO_CTRL_SET                0x34
 129 #define MCPC_IO_CTRL_CLR                0x35
 130 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 131 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 132 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 133 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 134 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 135 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 136
 137 #define MCPC_CTRL2                      0x36
 138 #define MCPC_CTRL2_SET                  0x37
 139 #define MCPC_CTRL2_CLR                  0x38
 140 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 141
 142 #define OTHER_FUNC_CTRL                 0x80
 143 #define OTHER_FUNC_CTRL_SET             0x81
 144 #define OTHER_FUNC_CTRL_CLR             0x82
 145 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 146 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 147
 148 #define OTHER_IFC_CTRL                  0x83
 149 #define OTHER_IFC_CTRL_SET              0x84
 150 #define OTHER_IFC_CTRL_CLR              0x85
 151 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 152 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 153 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 154 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 155 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 156 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 157
 158 #define OTHER_INT_EN_RISE               0x86
 159 #define OTHER_INT_EN_RISE_SET           0x87
 160 #define OTHER_INT_EN_RISE_CLR           0x88
 161 #define OTHER_INT_EN_FALL               0x89
 162 #define OTHER_INT_EN_FALL_SET           0x8A
 163 #define OTHER_INT_EN_FALL_CLR           0x8B
 164 #define OTHER_INT_STS                   0x8C
 165 #define OTHER_INT_LATCH                 0x8D
 166 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 167 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 168 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 169 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 170 #define OTHER_INT_MANU                  (1 << 1)
 171 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 172
 173 #define ID_STATUS                       0x96
 174 #define ID_RES_FLOAT                    (1 << 4)
 175 #define ID_RES_440K                     (1 << 3)
 176 #define ID_RES_200K                     (1 << 2)
 177 #define ID_RES_102K                     (1 << 1)
 178 #define ID_RES_GND                      (1 << 0)
 179
 180 #define POWER_CTRL                      0xAC
 181 #define POWER_CTRL_SET                  0xAD
 182 #define POWER_CTRL_CLR                  0xAE
 183 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 184
 185 #define OTHER_IFC_CTRL2                 0xAF
 186 #define OTHER_IFC_CTRL2_SET             0xB0
 187 #define OTHER_IFC_CTRL2_CLR             0xB1
 188 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 189 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 190 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 191 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 192 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 193 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 194
 195 #define REG_CTRL_EN                     0xB2
 196 #define REG_CTRL_EN_SET                 0xB3
 197 #define REG_CTRL_EN_CLR                 0xB4
 198 #define REG_CTRL_ERROR                  0xB5
 199 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 200
 201 #define OTHER_FUNC_CTRL2                0xB8
 202 #define OTHER_FUNC_CTRL2_SET            0xB9
 203 #define OTHER_FUNC_CTRL2_CLR            0xBA
 204 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 205
 206 /* following registers do not have separate _clr and _set registers */
 207 #define VBUS_DEBOUNCE                   0xC0
 208 #define ID_DEBOUNCE                     0xC1
 209 #define VBAT_TIMER                      0xD3
 210 #define PHY_PWR_CTRL                    0xFD
 211 #define PHY_PWR_PHYPWD                  (1 << 0)
 212 #define PHY_CLK_CTRL                    0xFE
 213 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 214 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 215 #define REQ_PHY_DPLL_CLK                (1 << 0)
 216 #define PHY_CLK_CTRL_STS                0xFF
 217 #define PHY_DPLL_CLK                    (1 << 0)
 218
 219 /* In module TWL4030_MODULE_PM_MASTER */
 220 #define PROTECT_KEY                     0x0E
 221
 222 /* In module TWL4030_MODULE_PM_RECEIVER */
 223 #define VUSB_DEDICATED1                 0x7D
 224 #define VUSB_DEDICATED2                 0x7E
 225 #define VUSB1V5_DEV_GRP                 0x71
 226 #define VUSB1V5_TYPE                    0x72
 227 #define VUSB1V5_REMAP                   0x73
 228 #define VUSB1V8_DEV_GRP                 0x74
 229 #define VUSB1V8_TYPE                    0x75
 230 #define VUSB1V8_REMAP                   0x76
 231 #define VUSB3V1_DEV_GRP                 0x77
 232 #define VUSB3V1_TYPE                    0x78
 233 #define VUSB3V1_REMAP                   0x79
 234
 235 /* In module TWL4030_MODULE_INTBR */
 236 #define PMBR1                           0x0D
 237 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 238
 239 /* In module TWL4030_MODULE_INT */
 240 #define REG_PWR_ISR1                    0x00
 241 #define REG_PWR_IMR1                    0x01
 242 #define USB_PRES                        (1 << 2)
 243 #define REG_PWR_EDR1                    0x05
 244 #define USB_PRES_FALLING                (1 << 4)
 245 #define USB_PRES_RISING                 (1 << 5)
 246 #define REG_PWR_SIH_CTRL                0x07
 247 #define COR                             (1 << 2)
 248
 249 /* bits in OTG_CTRL */
 250 #define OTG_XCEIV_OUTPUTS \
 251         (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
 252 #define OTG_XCEIV_INPUTS \
 253         (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
 254 #define OTG_CTRL_BITS \
 255         (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
 256         /* and OTG_PULLUP is sometimes written */
 257
 258 #define OTG_CTRL_MASK   (OTG_DRIVER_SEL| \
 259         OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
 260         OTG_CTRL_BITS)
 261
 262
 263 struct twl4030_usb {
 264         struct work_struct      irq_work;
 265         struct otg_transceiver  otg;
 266         struct device           *dev;
 267
 268         /* for vbus reporting with irqs disabled */
 269         spinlock_t              lock;
 270
 271         /* pin configuration */
 272         enum twl4030_usb_mode   usb_mode;
 273
 274         unsigned                vbus:1;
 275         int                     irq;
 276         u8                      asleep;
 277 };
 278
 279 /* internal define on top of container_of */
 280 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 281
 282 /*-------------------------------------------------------------------------*/
 283
 284 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 285                 u8 module, u8 data, u8 address)
 286 {
 287         u8 check;
 288
 289         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 290             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 291                                                 (check == data))
 292                 return 0;
 293         /* Failed once: Try again */
 294         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 295             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 296                                                 (check == data))
 297                 return 0;
 298         /* Failed again: Return error */
 299
 300         return -EBUSY;
 301 }
 302
 303 #define twl4030_usb_write_verify(twl, address, data)    \
 304         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 305
 306 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 307                 u8 address, u8 data)
 308 {
 309         int ret = 0;
 310
 311         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 312         if (ret >= 0) {
 313 #if 0   /* debug */
 314                 u8 data1;
 315                 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
 316                                         address) < 0)
 317                         dev_err(twl->dev, "re-read failed\n");
 318                 else
 319                         dev_dbg(twl->dev,
 320                                "Write %s wrote %x read %x from reg %x\n",
 321                                (data1 == data) ? "succeed" : "mismatch",
 322                                data, data1, address);
 323 #endif
 324         } else {
 325                 dev_warn(twl->dev,
 326                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 327         }
 328
 329         return ret;
 330 }
 331
 332 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 333 {
 334         u8 data;
 335         int ret = 0;
 336
 337         ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
 338         if (ret >= 0)
 339                 ret = data;
 340         else
 341                 dev_warn(twl->dev,
 342                         "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
 343
 344         return ret;
 345 }
 346
 347 /*-------------------------------------------------------------------------*/
 348
 349 static inline int
 350 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 351 {
 352         return twl4030_usb_write(twl, reg + 1, bits);
 353 }
 354
 355 static inline int
 356 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 357 {
 358         return twl4030_usb_write(twl, reg + 2, bits);
 359 }
 360
 361 /*-------------------------------------------------------------------------*/
 362
 363 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 364 {
 365         twl->usb_mode = mode;
 366
 367         switch (mode) {
 368         case T2_USB_MODE_ULPI:
 369                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 370                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 371                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 372                                         FUNC_CTRL_XCVRSELECT_MASK |
 373                                         FUNC_CTRL_OPMODE_MASK);
 374                 break;
 375 /*
 376         case T2_USB_MODE_CEA2011_3PIN:
 377                 twl4030_cea2011_3_pin_FS_setup(twl);
 378                 break;
 379 */
 380         default:
 381                 /* FIXME: power on defaults */
 382                 break;
 383         };
 384 }
 385
 386 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 387 {
 388         unsigned long timeout;
 389         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 390
 391         if (val >= 0) {
 392                 if (on) {
 393                         /* enable DPLL to access PHY registers over I2C */
 394                         val |= REQ_PHY_DPLL_CLK;
 395                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 396                                                 (u8)val) < 0);
 397
 398                         timeout = jiffies + HZ;
 399                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 400                                                         PHY_DPLL_CLK)
 401                                 && time_before(jiffies, timeout))
 402                                         udelay(10);
 403                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 404                                                         PHY_DPLL_CLK))
 405                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 406                                                 "PHY DPLL clock\n");
 407                 } else {
 408                         /* let ULPI control the DPLL clock */
 409                         val &= ~REQ_PHY_DPLL_CLK;
 410                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 411                                                 (u8)val) < 0);
 412                 }
 413         }
 414 }
 415
 416 static void usb_irq_enable(struct twl4030_usb *twl, int rising, int falling)
 417 {
 418         u8 val;
 419
 420         /* edge setup */
 421         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 422                                 &val, REG_PWR_EDR1) < 0);
 423
 424         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 425         if (rising)
 426                 val = val | USB_PRES_RISING;
 427         if (falling)
 428                 val = val | USB_PRES_FALLING;
 429         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 430                                 val, REG_PWR_EDR1) < 0);
 431
 432         /* un-mask interrupt */
 433         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 434                                 &val, REG_PWR_IMR1) < 0);
 435
 436         val &= ~USB_PRES;
 437
 438         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 439                                 val, REG_PWR_IMR1) < 0);
 440 }
 441
 442 static void usb_irq_disable(struct twl4030_usb *twl)
 443 {
 444         u8 val;
 445
 446         /* undo edge setup */
 447         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 448                                 &val, REG_PWR_EDR1) < 0);
 449         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 450         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 451                                 val, REG_PWR_EDR1) < 0);
 452
 453         /* mask interrupt */
 454         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 455                                 &val, REG_PWR_IMR1) < 0);
 456         val |= USB_PRES;
 457
 458         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 459                                 val, REG_PWR_IMR1) < 0);
 460 }
 461
 462 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 463 {
 464         u8 pwr;
 465
 466         pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 467         if (on) {
 468                 pwr &= ~PHY_PWR_PHYPWD;
 469                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 470                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 471                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 472                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 473                                                 PHY_CLK_CTRL_CLK32K_EN));
 474         } else  {
 475                 pwr |= PHY_PWR_PHYPWD;
 476                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 477         }
 478 }
 479
 480 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 481 {
 482         if (controller_off)
 483                 usb_irq_disable(twl);
 484
 485         if (twl->asleep)
 486                 return;
 487
 488         if (!controller_off)
 489                 /* enable rising edge interrupt to detect cable attach */
 490                 usb_irq_enable(twl, 1, 0);
 491
 492         twl4030_phy_power(twl, 0);
 493         twl->asleep = 1;
 494 }
 495
 496 static void twl4030_phy_resume(struct twl4030_usb *twl)
 497 {
 498         if (!twl->asleep)
 499                 return;
 500
 501         /* enable falling edge interrupt to detect cable detach */
 502         usb_irq_enable(twl, 0, 1);
 503
 504         twl4030_phy_power(twl, 1);
 505         twl4030_i2c_access(twl, 1);
 506         twl4030_usb_set_mode(twl, twl->usb_mode);
 507         if (twl->usb_mode == T2_USB_MODE_ULPI)
 508                 twl4030_i2c_access(twl, 0);
 509         twl->asleep = 0;
 510 }
 511
 512 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
 513 {
 514         /* Enable writing to power configuration registers */
 515         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 516         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 517
 518         /* put VUSB3V1 LDO in active state */
 519         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 520
 521         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 522         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 523
 524         /* turn on 3.1V regulator */
 525         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
 526         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 527
 528         /* turn on 1.5V regulator */
 529         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
 530         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 531
 532         /* turn on 1.8V regulator */
 533         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
 534         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 535
 536         /* disable access to power configuration registers */
 537         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
 538 }
 539
 540 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 541                 struct device_attribute *attr, char *buf)
 542 {
 543         struct twl4030_usb *twl = dev_get_drvdata(dev);
 544         unsigned long flags;
 545         int ret = -EINVAL;
 546
 547         spin_lock_irqsave(&twl->lock, flags);
 548         ret = sprintf(buf, "%s\n", twl->vbus ? "on" : "off");
 549         spin_unlock_irqrestore(&twl->lock, flags);
 550
 551         return ret;
 552 }
 553 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 554
 555 static void twl4030_usb_irq_work(struct work_struct *work)
 556 {
 557         struct twl4030_usb *twl = container_of(work,
 558                         struct twl4030_usb, irq_work);
 559
 560         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 561 }
 562
 563 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 564 {
 565         struct twl4030_usb *twl = _twl;
 566         u8 val;
 567
 568         /* action based on cable attach or detach */
 569         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 570                                 &val, REG_PWR_EDR1) < 0);
 571
 572         if (val & USB_PRES_RISING) {
 573                 twl4030_phy_resume(twl);
 574                 twl4030charger_usb_en(1);
 575                 twl->vbus = 1;
 576         } else {
 577                 twl4030charger_usb_en(0);
 578                 twl->vbus = 0;
 579                 twl4030_phy_suspend(twl, 0);
 580         }
 581         schedule_work(&twl->irq_work);
 582
 583         return IRQ_HANDLED;
 584 }
 585
 586 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 587 {
 588         struct twl4030_usb *twl = xceiv_to_twl(x);
 589
 590         if (suspend)
 591                 twl4030_phy_suspend(twl, 1);
 592         else
 593                 twl4030_phy_resume(twl);
 594
 595         return 0;
 596 }
 597
 598 static int twl4030_set_peripheral(struct otg_transceiver *x,
 599                 struct usb_gadget *gadget)
 600 {
 601         struct twl4030_usb *twl;
 602         u32 l;
 603
 604         if (!x)
 605                 return -ENODEV;
 606
 607         twl = xceiv_to_twl(x);
 608
 609         if (!gadget) {
 610                 omap_writew(0, OTG_IRQ_EN);
 611                 twl4030_phy_suspend(twl, 1);
 612                 twl->otg.gadget = NULL;
 613
 614                 return -ENODEV;
 615         }
 616
 617         twl->otg.gadget = gadget;
 618         twl4030_phy_resume(twl);
 619
 620         l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
 621         l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
 622         l |= OTG_ID;
 623         omap_writel(l, OTG_CTRL);
 624
 625         twl->otg.state = OTG_STATE_B_IDLE;
 626
 627         twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
 628                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 629         twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
 630                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 631
 632         return 0;
 633 }
 634
 635 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 636 {
 637         struct twl4030_usb *twl;
 638
 639         if (!x)
 640                 return -ENODEV;
 641
 642         twl = xceiv_to_twl(x);
 643
 644         if (!host) {
 645                 omap_writew(0, OTG_IRQ_EN);
 646                 twl4030_phy_suspend(twl, 1);
 647                 twl->otg.host = NULL;
 648
 649                 return -ENODEV;
 650         }
 651
 652         twl->otg.host = host;
 653         twl4030_phy_resume(twl);
 654
 655         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL,
 656                         TWL4030_OTG_CTRL_DMPULLDOWN
 657                                 | TWL4030_OTG_CTRL_DPPULLDOWN);
 658         twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
 659         twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
 660         twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
 661         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS);
 662
 663         return 0;
 664 }
 665
 666 static int __init twl4030_usb_probe(struct platform_device *pdev)
 667 {
 668         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 669         struct twl4030_usb      *twl;
 670         int status;
 671         u8                      vbus;
 672
 673         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 674         if (!twl)
 675                 return -ENOMEM;
 676
 677         if (!pdata) {
 678                 dev_info(&pdev->dev, "platform_data not available\n");
 679                 return -EINVAL;
 680         }
 681
 682         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 683                                 &vbus, REG_PWR_EDR1) < 0);
 684         vbus &= USB_PRES_RISING;
 685
 686         twl->dev                = &pdev->dev;
 687         twl->irq                = platform_get_irq(pdev, 0);
 688         twl->otg.set_host       = twl4030_set_host;
 689         twl->otg.set_peripheral = twl4030_set_peripheral;
 690         twl->otg.set_suspend    = twl4030_set_suspend;
 691         twl->usb_mode           = pdata->usb_mode;
 692         twl->vbus               = vbus ? 1 : 0;
 693
 694         /* init spinlock for workqueue */
 695         spin_lock_init(&twl->lock);
 696
 697         /* init irq workqueue before request_irq */
 698         INIT_WORK(&twl->irq_work, twl4030_usb_irq_work);
 699
 700         usb_irq_disable(twl);
 701         status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
 702         if (status < 0) {
 703                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 704                         twl->irq, status);
 705                 kfree(twl);
 706                 return status;
 707         }
 708
 709         twl4030_usb_ldo_init(twl);
 710         twl4030_phy_power(twl, 1);
 711         twl4030_i2c_access(twl, 1);
 712         twl4030_usb_set_mode(twl, twl->usb_mode);
 713
 714         twl->asleep = 0;
 715
 716         if (twl->usb_mode == T2_USB_MODE_ULPI) {
 717                 twl4030_i2c_access(twl, 0);
 718                 twl4030_phy_suspend(twl, 0);
 719         }
 720
 721         otg_set_transceiver(&twl->otg);
 722         platform_set_drvdata(pdev, twl);
 723         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 724
 725         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 726                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 727
 728         return 0;
 729 }
 730
 731 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 732 {
 733         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 734         int val;
 735
 736         usb_irq_disable(twl);
 737         free_irq(twl->irq, twl);
 738         device_remove_file(twl->dev, &dev_attr_vbus);
 739
 740         /* set transceiver mode to power on defaults */
 741         twl4030_usb_set_mode(twl, -1);
 742
 743         /* autogate 60MHz ULPI clock,
 744          * clear dpll clock request for i2c access,
 745          * disable 32KHz
 746          */
 747         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 748         if (val >= 0) {
 749                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 750                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 751                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 752         }
 753
 754         /* disable complete OTG block */
 755         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 756
 757         twl4030_phy_power(twl, 0);
 758
 759         kfree(twl);
 760
 761         return 0;
 762 }
 763
 764 static struct platform_driver twl4030_driver = {
 765         .probe          = twl4030_usb_probe,
 766         .remove         = __exit_p(twl4030_remove),
 767         .driver         = {
 768                 .name   = "twl4030_usb",
 769                 .owner  = THIS_MODULE,
 770         },
 771 };
 772
 773 static int __init twl4030_usb_init(void)
 774 {
 775         return platform_driver_register(&twl4030_driver);
 776 }
 777 subsys_initcall(twl4030_usb_init);
 778
 779 static void __exit twl4030_usb_exit(void)
 780 {
 781         platform_driver_unregister(&twl4030_driver);
 782 }
 783 module_exit(twl4030_usb_exit);
 784
 785 MODULE_ALIAS("platform:twl4030_usb");
 786 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 787 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 788 MODULE_LICENSE("GPL");