drivers/i2c/chips/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/time.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/irq.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/workqueue.h>
  35 #include <linux/io.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/ch9.h>
  38 #include <linux/usb/gadget.h>
  39 #include <linux/usb/otg.h>
  40 #include <linux/i2c/twl4030.h>
  41 #include <mach/usb.h>
  42
  43 /* Register defines */
  44
  45 #define VENDOR_ID_LO                    0x00
  46 #define VENDOR_ID_HI                    0x01
  47 #define PRODUCT_ID_LO                   0x02
  48 #define PRODUCT_ID_HI                   0x03
  49
  50 #define FUNC_CTRL                       0x04
  51 #define FUNC_CTRL_SET                   0x05
  52 #define FUNC_CTRL_CLR                   0x06
  53 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  54 #define FUNC_CTRL_RESET                 (1 << 5)
  55 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  56 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  57 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  58 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  59 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  60 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  61 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  62 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  63 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  64 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  65
  66 #define IFC_CTRL                        0x07
  67 #define IFC_CTRL_SET                    0x08
  68 #define IFC_CTRL_CLR                    0x09
  69 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  70 #define IFC_CTRL_AUTORESUME             (1 << 4)
  71 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  72 #define IFC_CTRL_CARKITMODE             (1 << 2)
  73 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  74
  75 #define TWL4030_OTG_CTRL                0x0A
  76 #define TWL4030_OTG_CTRL_SET            0x0B
  77 #define TWL4030_OTG_CTRL_CLR            0x0C
  78 #define TWL4030_OTG_CTRL_DRVVBUS        (1 << 5)
  79 #define TWL4030_OTG_CTRL_CHRGVBUS       (1 << 4)
  80 #define TWL4030_OTG_CTRL_DISCHRGVBUS    (1 << 3)
  81 #define TWL4030_OTG_CTRL_DMPULLDOWN     (1 << 2)
  82 #define TWL4030_OTG_CTRL_DPPULLDOWN     (1 << 1)
  83 #define TWL4030_OTG_CTRL_IDPULLUP       (1 << 0)
  84
  85 #define USB_INT_EN_RISE                 0x0D
  86 #define USB_INT_EN_RISE_SET             0x0E
  87 #define USB_INT_EN_RISE_CLR             0x0F
  88 #define USB_INT_EN_FALL                 0x10
  89 #define USB_INT_EN_FALL_SET             0x11
  90 #define USB_INT_EN_FALL_CLR             0x12
  91 #define USB_INT_STS                     0x13
  92 #define USB_INT_LATCH                   0x14
  93 #define USB_INT_IDGND                   (1 << 4)
  94 #define USB_INT_SESSEND                 (1 << 3)
  95 #define USB_INT_SESSVALID               (1 << 2)
  96 #define USB_INT_VBUSVALID               (1 << 1)
  97 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  98
  99 #define CARKIT_CTRL                     0x19
 100 #define CARKIT_CTRL_SET                 0x1A
 101 #define CARKIT_CTRL_CLR                 0x1B
 102 #define CARKIT_CTRL_MICEN               (1 << 6)
 103 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
 104 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
 105 #define CARKIT_CTRL_RXDEN               (1 << 3)
 106 #define CARKIT_CTRL_TXDEN               (1 << 2)
 107 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 108 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 109 #define CARKIT_PLS_CTRL                 0x22
 110 #define CARKIT_PLS_CTRL_SET             0x23
 111 #define CARKIT_PLS_CTRL_CLR             0x24
 112 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 113 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 114 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 115 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 116
 117 #define MCPC_CTRL                       0x30
 118 #define MCPC_CTRL_SET                   0x31
 119 #define MCPC_CTRL_CLR                   0x32
 120 #define MCPC_CTRL_RTSOL                 (1 << 7)
 121 #define MCPC_CTRL_EXTSWR                (1 << 6)
 122 #define MCPC_CTRL_EXTSWC                (1 << 5)
 123 #define MCPC_CTRL_VOICESW               (1 << 4)
 124 #define MCPC_CTRL_OUT64K                (1 << 3)
 125 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 126 #define MCPC_CTRL_HS_UART               (1 << 0)
 127
 128 #define MCPC_IO_CTRL                    0x33
 129 #define MCPC_IO_CTRL_SET                0x34
 130 #define MCPC_IO_CTRL_CLR                0x35
 131 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 132 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 133 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 134 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 135 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 136 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 137
 138 #define MCPC_CTRL2                      0x36
 139 #define MCPC_CTRL2_SET                  0x37
 140 #define MCPC_CTRL2_CLR                  0x38
 141 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 142
 143 #define OTHER_FUNC_CTRL                 0x80
 144 #define OTHER_FUNC_CTRL_SET             0x81
 145 #define OTHER_FUNC_CTRL_CLR             0x82
 146 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 147 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 148
 149 #define OTHER_IFC_CTRL                  0x83
 150 #define OTHER_IFC_CTRL_SET              0x84
 151 #define OTHER_IFC_CTRL_CLR              0x85
 152 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 153 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 154 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 155 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 156 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 157 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 158
 159 #define OTHER_INT_EN_RISE               0x86
 160 #define OTHER_INT_EN_RISE_SET           0x87
 161 #define OTHER_INT_EN_RISE_CLR           0x88
 162 #define OTHER_INT_EN_FALL               0x89
 163 #define OTHER_INT_EN_FALL_SET           0x8A
 164 #define OTHER_INT_EN_FALL_CLR           0x8B
 165 #define OTHER_INT_STS                   0x8C
 166 #define OTHER_INT_LATCH                 0x8D
 167 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 168 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 169 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 170 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 171 #define OTHER_INT_MANU                  (1 << 1)
 172 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 173
 174 #define ID_STATUS                       0x96
 175 #define ID_RES_FLOAT                    (1 << 4)
 176 #define ID_RES_440K                     (1 << 3)
 177 #define ID_RES_200K                     (1 << 2)
 178 #define ID_RES_102K                     (1 << 1)
 179 #define ID_RES_GND                      (1 << 0)
 180
 181 #define POWER_CTRL                      0xAC
 182 #define POWER_CTRL_SET                  0xAD
 183 #define POWER_CTRL_CLR                  0xAE
 184 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 185
 186 #define OTHER_IFC_CTRL2                 0xAF
 187 #define OTHER_IFC_CTRL2_SET             0xB0
 188 #define OTHER_IFC_CTRL2_CLR             0xB1
 189 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 190 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 191 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 192 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 193 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 194 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 195
 196 #define REG_CTRL_EN                     0xB2
 197 #define REG_CTRL_EN_SET                 0xB3
 198 #define REG_CTRL_EN_CLR                 0xB4
 199 #define REG_CTRL_ERROR                  0xB5
 200 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 201
 202 #define OTHER_FUNC_CTRL2                0xB8
 203 #define OTHER_FUNC_CTRL2_SET            0xB9
 204 #define OTHER_FUNC_CTRL2_CLR            0xBA
 205 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 206
 207 /* following registers do not have separate _clr and _set registers */
 208 #define VBUS_DEBOUNCE                   0xC0
 209 #define ID_DEBOUNCE                     0xC1
 210 #define VBAT_TIMER                      0xD3
 211 #define PHY_PWR_CTRL                    0xFD
 212 #define PHY_PWR_PHYPWD                  (1 << 0)
 213 #define PHY_CLK_CTRL                    0xFE
 214 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 215 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 216 #define REQ_PHY_DPLL_CLK                (1 << 0)
 217 #define PHY_CLK_CTRL_STS                0xFF
 218 #define PHY_DPLL_CLK                    (1 << 0)
 219
 220 /* In module TWL4030_MODULE_PM_MASTER */
 221 #define PROTECT_KEY                     0x0E
 222
 223 /* In module TWL4030_MODULE_PM_RECEIVER */
 224 #define VUSB_DEDICATED1                 0x7D
 225 #define VUSB_DEDICATED2                 0x7E
 226 #define VUSB1V5_DEV_GRP                 0x71
 227 #define VUSB1V5_TYPE                    0x72
 228 #define VUSB1V5_REMAP                   0x73
 229 #define VUSB1V8_DEV_GRP                 0x74
 230 #define VUSB1V8_TYPE                    0x75
 231 #define VUSB1V8_REMAP                   0x76
 232 #define VUSB3V1_DEV_GRP                 0x77
 233 #define VUSB3V1_TYPE                    0x78
 234 #define VUSB3V1_REMAP                   0x79
 235
 236 /* In module TWL4030_MODULE_INTBR */
 237 #define PMBR1                           0x0D
 238 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 239
 240 /* In module TWL4030_MODULE_INT */
 241 #define REG_PWR_EDR1                    0x05
 242 #define USB_PRES_FALLING                (1 << 4)
 243 #define USB_PRES_RISING                 (1 << 5)
 244
 245 /* bits in OTG_CTRL */
 246 #define OTG_XCEIV_OUTPUTS \
 247         (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
 248 #define OTG_XCEIV_INPUTS \
 249         (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
 250 #define OTG_CTRL_BITS \
 251         (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
 252         /* and OTG_PULLUP is sometimes written */
 253
 254 #define OTG_CTRL_MASK   (OTG_DRIVER_SEL| \
 255         OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
 256         OTG_CTRL_BITS)
 257
 258
 259 struct twl4030_usb {
 260         struct work_struct      irq_work;
 261         struct otg_transceiver  otg;
 262         struct device           *dev;
 263
 264         /* for vbus reporting with irqs disabled */
 265         spinlock_t              lock;
 266
 267         /* pin configuration */
 268         enum twl4030_usb_mode   usb_mode;
 269
 270         unsigned                vbus:1;
 271         int                     irq;
 272         u8                      asleep;
 273         bool                    irq_enabled;
 274 };
 275
 276 /* internal define on top of container_of */
 277 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 278
 279 /*-------------------------------------------------------------------------*/
 280
 281 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 282                 u8 module, u8 data, u8 address)
 283 {
 284         u8 check;
 285
 286         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 287             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 288                                                 (check == data))
 289                 return 0;
 290         /* Failed once: Try again */
 291         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 292             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 293                                                 (check == data))
 294                 return 0;
 295         /* Failed again: Return error */
 296
 297         return -EBUSY;
 298 }
 299
 300 #define twl4030_usb_write_verify(twl, address, data)    \
 301         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 302
 303 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 304                 u8 address, u8 data)
 305 {
 306         int ret = 0;
 307
 308         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 309         if (ret >= 0) {
 310 #if 0   /* debug */
 311                 u8 data1;
 312                 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
 313                                         address) < 0)
 314                         dev_err(twl->dev, "re-read failed\n");
 315                 else
 316                         dev_dbg(twl->dev,
 317                                "Write %s wrote %x read %x from reg %x\n",
 318                                (data1 == data) ? "succeed" : "mismatch",
 319                                data, data1, address);
 320 #endif
 321         } else {
 322                 dev_warn(twl->dev,
 323                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 324         }
 325
 326         return ret;
 327 }
 328
 329 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 330 {
 331         u8 data;
 332         int ret = 0;
 333
 334         ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
 335         if (ret >= 0)
 336                 ret = data;
 337         else
 338                 dev_warn(twl->dev,
 339                         "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
 340
 341         return ret;
 342 }
 343
 344 /*-------------------------------------------------------------------------*/
 345
 346 static inline int
 347 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 348 {
 349         return twl4030_usb_write(twl, reg + 1, bits);
 350 }
 351
 352 static inline int
 353 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 354 {
 355         return twl4030_usb_write(twl, reg + 2, bits);
 356 }
 357
 358 /*-------------------------------------------------------------------------*/
 359
 360 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 361 {
 362         twl->usb_mode = mode;
 363
 364         switch (mode) {
 365         case T2_USB_MODE_ULPI:
 366                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 367                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 368                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 369                                         FUNC_CTRL_XCVRSELECT_MASK |
 370                                         FUNC_CTRL_OPMODE_MASK);
 371                 break;
 372 /*
 373         case T2_USB_MODE_CEA2011_3PIN:
 374                 twl4030_cea2011_3_pin_FS_setup(twl);
 375                 break;
 376 */
 377         default:
 378                 /* FIXME: power on defaults */
 379                 break;
 380         };
 381 }
 382
 383 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 384 {
 385         unsigned long timeout;
 386         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 387
 388         if (val >= 0) {
 389                 if (on) {
 390                         /* enable DPLL to access PHY registers over I2C */
 391                         val |= REQ_PHY_DPLL_CLK;
 392                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 393                                                 (u8)val) < 0);
 394
 395                         timeout = jiffies + HZ;
 396                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 397                                                         PHY_DPLL_CLK)
 398                                 && time_before(jiffies, timeout))
 399                                         udelay(10);
 400                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 401                                                         PHY_DPLL_CLK))
 402                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 403                                                 "PHY DPLL clock\n");
 404                 } else {
 405                         /* let ULPI control the DPLL clock */
 406                         val &= ~REQ_PHY_DPLL_CLK;
 407                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 408                                                 (u8)val) < 0);
 409                 }
 410         }
 411 }
 412
 413 static void usb_irq_enable(struct twl4030_usb *twl, int trigger)
 414 {
 415         set_irq_type(twl->irq, trigger);
 416
 417         if (!twl->irq_enabled) {
 418                 enable_irq(twl->irq);
 419                 twl->irq_enabled = true;
 420         }
 421 }
 422
 423 static void usb_irq_disable(struct twl4030_usb *twl)
 424 {
 425         if (twl->irq_enabled) {
 426                 disable_irq(twl->irq);
 427                 twl->irq_enabled = false;
 428         }
 429 }
 430
 431 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 432 {
 433         u8 pwr;
 434
 435         pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 436         if (on) {
 437                 pwr &= ~PHY_PWR_PHYPWD;
 438                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 439                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 440                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 441                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 442                                                 PHY_CLK_CTRL_CLK32K_EN));
 443         } else  {
 444                 pwr |= PHY_PWR_PHYPWD;
 445                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 446         }
 447 }
 448
 449 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 450 {
 451         if (controller_off)
 452                 usb_irq_disable(twl);
 453
 454         if (twl->asleep)
 455                 return;
 456
 457         if (!controller_off)
 458                 /* enable rising edge interrupt to detect cable attach */
 459                 usb_irq_enable(twl, IRQ_TYPE_EDGE_RISING);
 460
 461         twl4030_phy_power(twl, 0);
 462         twl->asleep = 1;
 463 }
 464
 465 static void twl4030_phy_resume(struct twl4030_usb *twl)
 466 {
 467         if (!twl->asleep)
 468                 return;
 469
 470         /* enable falling edge interrupt to detect cable detach */
 471         usb_irq_enable(twl, IRQ_TYPE_EDGE_FALLING);
 472
 473         twl4030_phy_power(twl, 1);
 474         twl4030_i2c_access(twl, 1);
 475         twl4030_usb_set_mode(twl, twl->usb_mode);
 476         if (twl->usb_mode == T2_USB_MODE_ULPI)
 477                 twl4030_i2c_access(twl, 0);
 478         twl->asleep = 0;
 479 }
 480
 481 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
 482 {
 483         /* Enable writing to power configuration registers */
 484         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 485         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 486
 487         /* put VUSB3V1 LDO in active state */
 488         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 489
 490         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 491         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 492
 493         /* turn on 3.1V regulator */
 494         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
 495         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 496
 497         /* turn on 1.5V regulator */
 498         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
 499         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 500
 501         /* turn on 1.8V regulator */
 502         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
 503         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 504
 505         /* disable access to power configuration registers */
 506         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
 507 }
 508
 509 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 510                 struct device_attribute *attr, char *buf)
 511 {
 512         struct twl4030_usb *twl = dev_get_drvdata(dev);
 513         unsigned long flags;
 514         int ret = -EINVAL;
 515
 516         spin_lock_irqsave(&twl->lock, flags);
 517         ret = sprintf(buf, "%s\n", twl->vbus ? "on" : "off");
 518         spin_unlock_irqrestore(&twl->lock, flags);
 519
 520         return ret;
 521 }
 522 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 523
 524 static void twl4030_usb_irq_work(struct work_struct *work)
 525 {
 526         struct twl4030_usb *twl = container_of(work,
 527                         struct twl4030_usb, irq_work);
 528
 529         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 530 }
 531
 532 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 533 {
 534         struct twl4030_usb *twl = _twl;
 535         u8 val;
 536
 537 #ifdef CONFIG_LOCKDEP
 538         /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
 539          * we don't want and can't tolerate.  Although it might be
 540          * friendlier not to borrow this thread context...
 541          */
 542         local_irq_enable();
 543 #endif
 544
 545         /* FIXME stop accessing PWR_EDR1 ... if nothing else, we
 546          * know which edges we told the IRQ to trigger on.  And
 547          * there seem to be OTG_specific registers and irqs that
 548          * provide the right info without guessing like this:
 549          * USB_INT_STS, ID_STATUS, STS_HW_CONDITIONS, etc.
 550          */
 551
 552         /* action based on cable attach or detach */
 553         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 554                                 &val, REG_PWR_EDR1) < 0);
 555
 556         if (val & USB_PRES_RISING) {
 557                 twl4030_phy_resume(twl);
 558                 twl4030charger_usb_en(1);
 559                 twl->vbus = 1;
 560         } else {
 561                 twl4030charger_usb_en(0);
 562                 twl->vbus = 0;
 563                 twl4030_phy_suspend(twl, 0);
 564         }
 565         schedule_work(&twl->irq_work);
 566
 567         return IRQ_HANDLED;
 568 }
 569
 570 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 571 {
 572         struct twl4030_usb *twl = xceiv_to_twl(x);
 573
 574         if (suspend)
 575                 twl4030_phy_suspend(twl, 1);
 576         else
 577                 twl4030_phy_resume(twl);
 578
 579         return 0;
 580 }
 581
 582 static int twl4030_set_peripheral(struct otg_transceiver *x,
 583                 struct usb_gadget *gadget)
 584 {
 585         struct twl4030_usb *twl;
 586         u32 l;
 587
 588         if (!x)
 589                 return -ENODEV;
 590
 591         twl = xceiv_to_twl(x);
 592
 593         if (!gadget) {
 594                 omap_writew(0, OTG_IRQ_EN);
 595                 twl4030_phy_suspend(twl, 1);
 596                 twl->otg.gadget = NULL;
 597
 598                 return -ENODEV;
 599         }
 600
 601         twl->otg.gadget = gadget;
 602         twl4030_phy_resume(twl);
 603
 604         l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
 605         l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
 606         l |= OTG_ID;
 607         omap_writel(l, OTG_CTRL);
 608
 609         twl->otg.state = OTG_STATE_B_IDLE;
 610
 611         twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
 612                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 613         twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
 614                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 615
 616         return 0;
 617 }
 618
 619 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 620 {
 621         struct twl4030_usb *twl;
 622
 623         if (!x)
 624                 return -ENODEV;
 625
 626         twl = xceiv_to_twl(x);
 627
 628         if (!host) {
 629                 omap_writew(0, OTG_IRQ_EN);
 630                 twl4030_phy_suspend(twl, 1);
 631                 twl->otg.host = NULL;
 632
 633                 return -ENODEV;
 634         }
 635
 636         twl->otg.host = host;
 637         twl4030_phy_resume(twl);
 638
 639         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL,
 640                         TWL4030_OTG_CTRL_DMPULLDOWN
 641                                 | TWL4030_OTG_CTRL_DPPULLDOWN);
 642         twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
 643         twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
 644         twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
 645         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS);
 646
 647         return 0;
 648 }
 649
 650 static int __init twl4030_usb_probe(struct platform_device *pdev)
 651 {
 652         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 653         struct twl4030_usb      *twl;
 654         int status;
 655         u8                      vbus;
 656
 657         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 658         if (!twl)
 659                 return -ENOMEM;
 660
 661         if (!pdata) {
 662                 dev_info(&pdev->dev, "platform_data not available\n");
 663                 return -EINVAL;
 664         }
 665
 666         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 667                                 &vbus, REG_PWR_EDR1) < 0);
 668         vbus &= USB_PRES_RISING;
 669
 670         twl->dev                = &pdev->dev;
 671         twl->irq                = platform_get_irq(pdev, 0);
 672         twl->otg.set_host       = twl4030_set_host;
 673         twl->otg.set_peripheral = twl4030_set_peripheral;
 674         twl->otg.set_suspend    = twl4030_set_suspend;
 675         twl->usb_mode           = pdata->usb_mode;
 676         twl->vbus               = vbus ? 1 : 0;
 677
 678         /* init spinlock for workqueue */
 679         spin_lock_init(&twl->lock);
 680
 681         /* init irq workqueue before request_irq */
 682         INIT_WORK(&twl->irq_work, twl4030_usb_irq_work);
 683
 684         twl->irq_enabled = true;
 685         status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
 686         if (status < 0) {
 687                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 688                         twl->irq, status);
 689                 kfree(twl);
 690                 return status;
 691         }
 692
 693         twl4030_usb_ldo_init(twl);
 694         twl4030_phy_power(twl, 1);
 695         twl4030_i2c_access(twl, 1);
 696         twl4030_usb_set_mode(twl, twl->usb_mode);
 697
 698         twl->asleep = 0;
 699
 700         if (twl->usb_mode == T2_USB_MODE_ULPI) {
 701                 twl4030_i2c_access(twl, 0);
 702                 twl4030_phy_suspend(twl, 0);
 703         }
 704
 705         otg_set_transceiver(&twl->otg);
 706         platform_set_drvdata(pdev, twl);
 707         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 708
 709         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 710                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 711
 712         return 0;
 713 }
 714
 715 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 716 {
 717         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 718         int val;
 719
 720         usb_irq_disable(twl);
 721         free_irq(twl->irq, twl);
 722         device_remove_file(twl->dev, &dev_attr_vbus);
 723
 724         /* set transceiver mode to power on defaults */
 725         twl4030_usb_set_mode(twl, -1);
 726
 727         /* autogate 60MHz ULPI clock,
 728          * clear dpll clock request for i2c access,
 729          * disable 32KHz
 730          */
 731         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 732         if (val >= 0) {
 733                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 734                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 735                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 736         }
 737
 738         /* disable complete OTG block */
 739         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 740
 741         twl4030_phy_power(twl, 0);
 742
 743         kfree(twl);
 744
 745         return 0;
 746 }
 747
 748 static struct platform_driver twl4030_driver = {
 749         .probe          = twl4030_usb_probe,
 750         .remove         = __exit_p(twl4030_remove),
 751         .driver         = {
 752                 .name   = "twl4030_usb",
 753                 .owner  = THIS_MODULE,
 754         },
 755 };
 756
 757 static int __init twl4030_usb_init(void)
 758 {
 759         return platform_driver_register(&twl4030_driver);
 760 }
 761 subsys_initcall(twl4030_usb_init);
 762
 763 static void __exit twl4030_usb_exit(void)
 764 {
 765         platform_driver_unregister(&twl4030_driver);
 766 }
 767 module_exit(twl4030_usb_exit);
 768
 769 MODULE_ALIAS("platform:twl4030_usb");
 770 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 771 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 772 MODULE_LICENSE("GPL");