arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26
  27 #include <mach/dma.h>
  28 #include <mach/mcbsp.h>
  29
  30 struct omap_mcbsp **mcbsp_ptr;
  31 int omap_mcbsp_count;
  32
  33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
  34 {
  35         if (cpu_class_is_omap1() || cpu_is_omap2420())
  36                 __raw_writew((u16)val, io_base + reg);
  37         else
  38                 __raw_writel(val, io_base + reg);
  39 }
  40
  41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
  42 {
  43         if (cpu_class_is_omap1() || cpu_is_omap2420())
  44                 return __raw_readw(io_base + reg);
  45         else
  46                 return __raw_readl(io_base + reg);
  47 }
  48
  49 #define OMAP_MCBSP_READ(base, reg) \
  50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
  51 #define OMAP_MCBSP_WRITE(base, reg, val) \
  52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
  53
  54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
  55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
  56
  57 static void omap_mcbsp_dump_reg(u8 id)
  58 {
  59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  60
  61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
  64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
  66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
  68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
  70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
  71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
  72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
  73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
  74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
  75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
  76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
  77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
  78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
  79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
  80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
  81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
  82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
  83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
  84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
  85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
  86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
  87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
  88         dev_dbg(mcbsp->dev, "***********************\n");
  89 }
  90
  91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
  92 {
  93         struct omap_mcbsp *mcbsp_tx = dev_id;
  94
  95         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
  96                 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
  97
  98         complete(&mcbsp_tx->tx_irq_completion);
  99
 100         return IRQ_HANDLED;
 101 }
 102
 103 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 104 {
 105         struct omap_mcbsp *mcbsp_rx = dev_id;
 106
 107         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
 108                 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
 109
 110         complete(&mcbsp_rx->rx_irq_completion);
 111
 112         return IRQ_HANDLED;
 113 }
 114
 115 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 116 {
 117         struct omap_mcbsp *mcbsp_dma_tx = data;
 118
 119         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
 120                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 121
 122         /* We can free the channels */
 123         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 124         mcbsp_dma_tx->dma_tx_lch = -1;
 125
 126         complete(&mcbsp_dma_tx->tx_dma_completion);
 127 }
 128
 129 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 130 {
 131         struct omap_mcbsp *mcbsp_dma_rx = data;
 132
 133         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 134                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 135
 136         /* We can free the channels */
 137         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 138         mcbsp_dma_rx->dma_rx_lch = -1;
 139
 140         complete(&mcbsp_dma_rx->rx_dma_completion);
 141 }
 142
 143 /*
 144  * omap_mcbsp_config simply write a config to the
 145  * appropriate McBSP.
 146  * You either call this function or set the McBSP registers
 147  * by yourself before calling omap_mcbsp_start().
 148  */
 149 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 150 {
 151         struct omap_mcbsp *mcbsp;
 152         void __iomem *io_base;
 153
 154         if (!omap_mcbsp_check_valid_id(id)) {
 155                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 156                 return;
 157         }
 158         mcbsp = id_to_mcbsp_ptr(id);
 159
 160         io_base = mcbsp->io_base;
 161         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 162                         mcbsp->id, mcbsp->phys_base);
 163
 164         /* We write the given config */
 165         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
 166         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
 167         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
 168         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
 169         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
 170         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
 171         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
 172         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
 173         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
 174         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
 175         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
 176 }
 177 EXPORT_SYMBOL(omap_mcbsp_config);
 178
 179 /*
 180  * We can choose between IRQ based or polled IO.
 181  * This needs to be called before omap_mcbsp_request().
 182  */
 183 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 184 {
 185         struct omap_mcbsp *mcbsp;
 186
 187         if (!omap_mcbsp_check_valid_id(id)) {
 188                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 189                 return -ENODEV;
 190         }
 191         mcbsp = id_to_mcbsp_ptr(id);
 192
 193         spin_lock(&mcbsp->lock);
 194
 195         if (!mcbsp->free) {
 196                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 197                         mcbsp->id);
 198                 spin_unlock(&mcbsp->lock);
 199                 return -EINVAL;
 200         }
 201
 202         mcbsp->io_type = io_type;
 203
 204         spin_unlock(&mcbsp->lock);
 205
 206         return 0;
 207 }
 208 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 209
 210 int omap_mcbsp_request(unsigned int id)
 211 {
 212         struct omap_mcbsp *mcbsp;
 213         int err;
 214
 215         if (!omap_mcbsp_check_valid_id(id)) {
 216                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 217                 return -ENODEV;
 218         }
 219         mcbsp = id_to_mcbsp_ptr(id);
 220
 221         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 222                 mcbsp->pdata->ops->request(id);
 223
 224         clk_enable(mcbsp->clk);
 225
 226         spin_lock(&mcbsp->lock);
 227         if (!mcbsp->free) {
 228                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 229                         mcbsp->id);
 230                 spin_unlock(&mcbsp->lock);
 231                 return -1;
 232         }
 233
 234         mcbsp->free = 0;
 235         spin_unlock(&mcbsp->lock);
 236
 237         /*
 238          * Make sure that transmitter, receiver and sample-rate generator are
 239          * not running before activating IRQs.
 240          */
 241         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
 242         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
 243
 244         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 245                 /* We need to get IRQs here */
 246                 init_completion(&mcbsp->tx_irq_completion);
 247                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 248                                         0, "McBSP", (void *)mcbsp);
 249                 if (err != 0) {
 250                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 251                                         "for McBSP%d\n", mcbsp->tx_irq,
 252                                         mcbsp->id);
 253                         return err;
 254                 }
 255
 256                 init_completion(&mcbsp->rx_irq_completion);
 257                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
 258                                         0, "McBSP", (void *)mcbsp);
 259                 if (err != 0) {
 260                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 261                                         "for McBSP%d\n", mcbsp->rx_irq,
 262                                         mcbsp->id);
 263                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 264                         return err;
 265                 }
 266         }
 267
 268         return 0;
 269 }
 270 EXPORT_SYMBOL(omap_mcbsp_request);
 271
 272 void omap_mcbsp_free(unsigned int id)
 273 {
 274         struct omap_mcbsp *mcbsp;
 275
 276         if (!omap_mcbsp_check_valid_id(id)) {
 277                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 278                 return;
 279         }
 280         mcbsp = id_to_mcbsp_ptr(id);
 281
 282         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 283                 mcbsp->pdata->ops->free(id);
 284
 285         clk_disable(mcbsp->clk);
 286
 287         spin_lock(&mcbsp->lock);
 288         if (mcbsp->free) {
 289                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
 290                         mcbsp->id);
 291                 spin_unlock(&mcbsp->lock);
 292                 return;
 293         }
 294
 295         mcbsp->free = 1;
 296         spin_unlock(&mcbsp->lock);
 297
 298         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 299                 /* Free IRQs */
 300                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 301                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
 302         }
 303 }
 304 EXPORT_SYMBOL(omap_mcbsp_free);
 305
 306 /*
 307  * Here we start the McBSP, by enabling the sample
 308  * generator, both transmitter and receivers,
 309  * and the frame sync.
 310  */
 311 void omap_mcbsp_start(unsigned int id)
 312 {
 313         struct omap_mcbsp *mcbsp;
 314         void __iomem *io_base;
 315         u16 w;
 316
 317         if (!omap_mcbsp_check_valid_id(id)) {
 318                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 319                 return;
 320         }
 321         mcbsp = id_to_mcbsp_ptr(id);
 322         io_base = mcbsp->io_base;
 323
 324         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
 325         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 326
 327         /* Start the sample generator */
 328         w = OMAP_MCBSP_READ(io_base, SPCR2);
 329         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
 330
 331         /* Enable transmitter and receiver */
 332         w = OMAP_MCBSP_READ(io_base, SPCR2);
 333         OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
 334
 335         w = OMAP_MCBSP_READ(io_base, SPCR1);
 336         OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
 337
 338         udelay(100);
 339
 340         /* Start frame sync */
 341         w = OMAP_MCBSP_READ(io_base, SPCR2);
 342         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
 343
 344         /* Dump McBSP Regs */
 345         omap_mcbsp_dump_reg(id);
 346 }
 347 EXPORT_SYMBOL(omap_mcbsp_start);
 348
 349 void omap_mcbsp_stop(unsigned int id)
 350 {
 351         struct omap_mcbsp *mcbsp;
 352         void __iomem *io_base;
 353         u16 w;
 354
 355         if (!omap_mcbsp_check_valid_id(id)) {
 356                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 357                 return;
 358         }
 359
 360         mcbsp = id_to_mcbsp_ptr(id);
 361         io_base = mcbsp->io_base;
 362
 363         /* Reset transmitter */
 364         w = OMAP_MCBSP_READ(io_base, SPCR2);
 365         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
 366
 367         /* Reset receiver */
 368         w = OMAP_MCBSP_READ(io_base, SPCR1);
 369         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
 370
 371         /* Reset the sample rate generator */
 372         w = OMAP_MCBSP_READ(io_base, SPCR2);
 373         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
 374 }
 375 EXPORT_SYMBOL(omap_mcbsp_stop);
 376
 377 /* polled mcbsp i/o operations */
 378 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
 379 {
 380         struct omap_mcbsp *mcbsp;
 381         void __iomem *base;
 382
 383         if (!omap_mcbsp_check_valid_id(id)) {
 384                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 385                 return -ENODEV;
 386         }
 387
 388         mcbsp = id_to_mcbsp_ptr(id);
 389         base = mcbsp->io_base;
 390
 391         writew(buf, base + OMAP_MCBSP_REG_DXR1);
 392         /* if frame sync error - clear the error */
 393         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
 394                 /* clear error */
 395                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
 396                        base + OMAP_MCBSP_REG_SPCR2);
 397                 /* resend */
 398                 return -1;
 399         } else {
 400                 /* wait for transmit confirmation */
 401                 int attemps = 0;
 402                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
 403                         if (attemps++ > 1000) {
 404                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
 405                                        (~XRST),
 406                                        base + OMAP_MCBSP_REG_SPCR2);
 407                                 udelay(10);
 408                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
 409                                        (XRST),
 410                                        base + OMAP_MCBSP_REG_SPCR2);
 411                                 udelay(10);
 412                                 dev_err(mcbsp->dev, "Could not write to"
 413                                         " McBSP%d Register\n", mcbsp->id);
 414                                 return -2;
 415                         }
 416                 }
 417         }
 418
 419         return 0;
 420 }
 421 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
 422
 423 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
 424 {
 425         struct omap_mcbsp *mcbsp;
 426         void __iomem *base;
 427
 428         if (!omap_mcbsp_check_valid_id(id)) {
 429                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 430                 return -ENODEV;
 431         }
 432         mcbsp = id_to_mcbsp_ptr(id);
 433
 434         base = mcbsp->io_base;
 435         /* if frame sync error - clear the error */
 436         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
 437                 /* clear error */
 438                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
 439                        base + OMAP_MCBSP_REG_SPCR1);
 440                 /* resend */
 441                 return -1;
 442         } else {
 443                 /* wait for recieve confirmation */
 444                 int attemps = 0;
 445                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
 446                         if (attemps++ > 1000) {
 447                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
 448                                        (~RRST),
 449                                        base + OMAP_MCBSP_REG_SPCR1);
 450                                 udelay(10);
 451                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
 452                                        (RRST),
 453                                        base + OMAP_MCBSP_REG_SPCR1);
 454                                 udelay(10);
 455                                 dev_err(mcbsp->dev, "Could not read from"
 456                                         " McBSP%d Register\n", mcbsp->id);
 457                                 return -2;
 458                         }
 459                 }
 460         }
 461         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
 462
 463         return 0;
 464 }
 465 EXPORT_SYMBOL(omap_mcbsp_pollread);
 466
 467 /*
 468  * IRQ based word transmission.
 469  */
 470 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
 471 {
 472         struct omap_mcbsp *mcbsp;
 473         void __iomem *io_base;
 474         omap_mcbsp_word_length word_length;
 475
 476         if (!omap_mcbsp_check_valid_id(id)) {
 477                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 478                 return;
 479         }
 480
 481         mcbsp = id_to_mcbsp_ptr(id);
 482         io_base = mcbsp->io_base;
 483         word_length = mcbsp->tx_word_length;
 484
 485         wait_for_completion(&mcbsp->tx_irq_completion);
 486
 487         if (word_length > OMAP_MCBSP_WORD_16)
 488                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 489         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 490 }
 491 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 492
 493 u32 omap_mcbsp_recv_word(unsigned int id)
 494 {
 495         struct omap_mcbsp *mcbsp;
 496         void __iomem *io_base;
 497         u16 word_lsb, word_msb = 0;
 498         omap_mcbsp_word_length word_length;
 499
 500         if (!omap_mcbsp_check_valid_id(id)) {
 501                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 502                 return -ENODEV;
 503         }
 504         mcbsp = id_to_mcbsp_ptr(id);
 505
 506         word_length = mcbsp->rx_word_length;
 507         io_base = mcbsp->io_base;
 508
 509         wait_for_completion(&mcbsp->rx_irq_completion);
 510
 511         if (word_length > OMAP_MCBSP_WORD_16)
 512                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 513         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 514
 515         return (word_lsb | (word_msb << 16));
 516 }
 517 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 518
 519 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
 520 {
 521         struct omap_mcbsp *mcbsp;
 522         void __iomem *io_base;
 523         omap_mcbsp_word_length tx_word_length;
 524         omap_mcbsp_word_length rx_word_length;
 525         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 526
 527         if (!omap_mcbsp_check_valid_id(id)) {
 528                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 529                 return -ENODEV;
 530         }
 531         mcbsp = id_to_mcbsp_ptr(id);
 532         io_base = mcbsp->io_base;
 533         tx_word_length = mcbsp->tx_word_length;
 534         rx_word_length = mcbsp->rx_word_length;
 535
 536         if (tx_word_length != rx_word_length)
 537                 return -EINVAL;
 538
 539         /* First we wait for the transmitter to be ready */
 540         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 541         while (!(spcr2 & XRDY)) {
 542                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 543                 if (attempts++ > 1000) {
 544                         /* We must reset the transmitter */
 545                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 546                         udelay(10);
 547                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 548                         udelay(10);
 549                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 550                                 "ready\n", mcbsp->id);
 551                         return -EAGAIN;
 552                 }
 553         }
 554
 555         /* Now we can push the data */
 556         if (tx_word_length > OMAP_MCBSP_WORD_16)
 557                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 558         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 559
 560         /* We wait for the receiver to be ready */
 561         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 562         while (!(spcr1 & RRDY)) {
 563                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 564                 if (attempts++ > 1000) {
 565                         /* We must reset the receiver */
 566                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 567                         udelay(10);
 568                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 569                         udelay(10);
 570                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 571                                 "ready\n", mcbsp->id);
 572                         return -EAGAIN;
 573                 }
 574         }
 575
 576         /* Receiver is ready, let's read the dummy data */
 577         if (rx_word_length > OMAP_MCBSP_WORD_16)
 578                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 579         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 580
 581         return 0;
 582 }
 583 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
 584
 585 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
 586 {
 587         struct omap_mcbsp *mcbsp;
 588         u32 clock_word = 0;
 589         void __iomem *io_base;
 590         omap_mcbsp_word_length tx_word_length;
 591         omap_mcbsp_word_length rx_word_length;
 592         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 593
 594         if (!omap_mcbsp_check_valid_id(id)) {
 595                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 596                 return -ENODEV;
 597         }
 598
 599         mcbsp = id_to_mcbsp_ptr(id);
 600         io_base = mcbsp->io_base;
 601
 602         tx_word_length = mcbsp->tx_word_length;
 603         rx_word_length = mcbsp->rx_word_length;
 604
 605         if (tx_word_length != rx_word_length)
 606                 return -EINVAL;
 607
 608         /* First we wait for the transmitter to be ready */
 609         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 610         while (!(spcr2 & XRDY)) {
 611                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 612                 if (attempts++ > 1000) {
 613                         /* We must reset the transmitter */
 614                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 615                         udelay(10);
 616                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 617                         udelay(10);
 618                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 619                                 "ready\n", mcbsp->id);
 620                         return -EAGAIN;
 621                 }
 622         }
 623
 624         /* We first need to enable the bus clock */
 625         if (tx_word_length > OMAP_MCBSP_WORD_16)
 626                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
 627         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
 628
 629         /* We wait for the receiver to be ready */
 630         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 631         while (!(spcr1 & RRDY)) {
 632                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 633                 if (attempts++ > 1000) {
 634                         /* We must reset the receiver */
 635                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 636                         udelay(10);
 637                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 638                         udelay(10);
 639                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 640                                 "ready\n", mcbsp->id);
 641                         return -EAGAIN;
 642                 }
 643         }
 644
 645         /* Receiver is ready, there is something for us */
 646         if (rx_word_length > OMAP_MCBSP_WORD_16)
 647                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 648         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 649
 650         word[0] = (word_lsb | (word_msb << 16));
 651
 652         return 0;
 653 }
 654 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 655
 656 /*
 657  * Simple DMA based buffer rx/tx routines.
 658  * Nothing fancy, just a single buffer tx/rx through DMA.
 659  * The DMA resources are released once the transfer is done.
 660  * For anything fancier, you should use your own customized DMA
 661  * routines and callbacks.
 662  */
 663 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
 664                                 unsigned int length)
 665 {
 666         struct omap_mcbsp *mcbsp;
 667         int dma_tx_ch;
 668         int src_port = 0;
 669         int dest_port = 0;
 670         int sync_dev = 0;
 671
 672         if (!omap_mcbsp_check_valid_id(id)) {
 673                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 674                 return -ENODEV;
 675         }
 676         mcbsp = id_to_mcbsp_ptr(id);
 677
 678         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
 679                                 omap_mcbsp_tx_dma_callback,
 680                                 mcbsp,
 681                                 &dma_tx_ch)) {
 682                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
 683                                 "McBSP%d TX. Trying IRQ based TX\n",
 684                                 mcbsp->id);
 685                 return -EAGAIN;
 686         }
 687         mcbsp->dma_tx_lch = dma_tx_ch;
 688
 689         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
 690                 dma_tx_ch);
 691
 692         init_completion(&mcbsp->tx_dma_completion);
 693
 694         if (cpu_class_is_omap1()) {
 695                 src_port = OMAP_DMA_PORT_TIPB;
 696                 dest_port = OMAP_DMA_PORT_EMIFF;
 697         }
 698         if (cpu_class_is_omap2())
 699                 sync_dev = mcbsp->dma_tx_sync;
 700
 701         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
 702                                      OMAP_DMA_DATA_TYPE_S16,
 703                                      length >> 1, 1,
 704                                      OMAP_DMA_SYNC_ELEMENT,
 705          sync_dev, 0);
 706
 707         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
 708                                  src_port,
 709                                  OMAP_DMA_AMODE_CONSTANT,
 710                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
 711                                  0, 0);
 712
 713         omap_set_dma_src_params(mcbsp->dma_tx_lch,
 714                                 dest_port,
 715                                 OMAP_DMA_AMODE_POST_INC,
 716                                 buffer,
 717                                 0, 0);
 718
 719         omap_start_dma(mcbsp->dma_tx_lch);
 720         wait_for_completion(&mcbsp->tx_dma_completion);
 721
 722         return 0;
 723 }
 724 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 725
 726 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
 727                                 unsigned int length)
 728 {
 729         struct omap_mcbsp *mcbsp;
 730         int dma_rx_ch;
 731         int src_port = 0;
 732         int dest_port = 0;
 733         int sync_dev = 0;
 734
 735         if (!omap_mcbsp_check_valid_id(id)) {
 736                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 737                 return -ENODEV;
 738         }
 739         mcbsp = id_to_mcbsp_ptr(id);
 740
 741         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
 742                                 omap_mcbsp_rx_dma_callback,
 743                                 mcbsp,
 744                                 &dma_rx_ch)) {
 745                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
 746                                 "McBSP%d RX. Trying IRQ based RX\n",
 747                                 mcbsp->id);
 748                 return -EAGAIN;
 749         }
 750         mcbsp->dma_rx_lch = dma_rx_ch;
 751
 752         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
 753                 dma_rx_ch);
 754
 755         init_completion(&mcbsp->rx_dma_completion);
 756
 757         if (cpu_class_is_omap1()) {
 758                 src_port = OMAP_DMA_PORT_TIPB;
 759                 dest_port = OMAP_DMA_PORT_EMIFF;
 760         }
 761         if (cpu_class_is_omap2())
 762                 sync_dev = mcbsp->dma_rx_sync;
 763
 764         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
 765                                         OMAP_DMA_DATA_TYPE_S16,
 766                                         length >> 1, 1,
 767                                         OMAP_DMA_SYNC_ELEMENT,
 768                                         sync_dev, 0);
 769
 770         omap_set_dma_src_params(mcbsp->dma_rx_lch,
 771                                 src_port,
 772                                 OMAP_DMA_AMODE_CONSTANT,
 773                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
 774                                 0, 0);
 775
 776         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
 777                                         dest_port,
 778                                         OMAP_DMA_AMODE_POST_INC,
 779                                         buffer,
 780                                         0, 0);
 781
 782         omap_start_dma(mcbsp->dma_rx_lch);
 783         wait_for_completion(&mcbsp->rx_dma_completion);
 784
 785         return 0;
 786 }
 787 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
 788
 789 /*
 790  * SPI wrapper.
 791  * Since SPI setup is much simpler than the generic McBSP one,
 792  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
 793  * Once this is done, you can call omap_mcbsp_start().
 794  */
 795 void omap_mcbsp_set_spi_mode(unsigned int id,
 796                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
 797 {
 798         struct omap_mcbsp *mcbsp;
 799         struct omap_mcbsp_reg_cfg mcbsp_cfg;
 800
 801         if (!omap_mcbsp_check_valid_id(id)) {
 802                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 803                 return;
 804         }
 805         mcbsp = id_to_mcbsp_ptr(id);
 806
 807         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
 808
 809         /* SPI has only one frame */
 810         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
 811         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
 812
 813         /* Clock stop mode */
 814         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
 815                 mcbsp_cfg.spcr1 |= (1 << 12);
 816         else
 817                 mcbsp_cfg.spcr1 |= (3 << 11);
 818
 819         /* Set clock parities */
 820         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 821                 mcbsp_cfg.pcr0 |= CLKRP;
 822         else
 823                 mcbsp_cfg.pcr0 &= ~CLKRP;
 824
 825         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 826                 mcbsp_cfg.pcr0 &= ~CLKXP;
 827         else
 828                 mcbsp_cfg.pcr0 |= CLKXP;
 829
 830         /* Set SCLKME to 0 and CLKSM to 1 */
 831         mcbsp_cfg.pcr0 &= ~SCLKME;
 832         mcbsp_cfg.srgr2 |= CLKSM;
 833
 834         /* Set FSXP */
 835         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
 836                 mcbsp_cfg.pcr0 &= ~FSXP;
 837         else
 838                 mcbsp_cfg.pcr0 |= FSXP;
 839
 840         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
 841                 mcbsp_cfg.pcr0 |= CLKXM;
 842                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
 843                 mcbsp_cfg.pcr0 |= FSXM;
 844                 mcbsp_cfg.srgr2 &= ~FSGM;
 845                 mcbsp_cfg.xcr2 |= XDATDLY(1);
 846                 mcbsp_cfg.rcr2 |= RDATDLY(1);
 847         } else {
 848                 mcbsp_cfg.pcr0 &= ~CLKXM;
 849                 mcbsp_cfg.srgr1 |= CLKGDV(1);
 850                 mcbsp_cfg.pcr0 &= ~FSXM;
 851                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
 852                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
 853         }
 854
 855         mcbsp_cfg.xcr2 &= ~XPHASE;
 856         mcbsp_cfg.rcr2 &= ~RPHASE;
 857
 858         omap_mcbsp_config(id, &mcbsp_cfg);
 859 }
 860 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
 861
 862 /*
 863  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
 864  * 730 has only 2 McBSP, and both of them are MPU peripherals.
 865  */
 866 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 867 {
 868         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
 869         struct omap_mcbsp *mcbsp;
 870         int id = pdev->id - 1;
 871         int ret = 0;
 872
 873         if (!pdata) {
 874                 dev_err(&pdev->dev, "McBSP device initialized without"
 875                                 "platform data\n");
 876                 ret = -EINVAL;
 877                 goto exit;
 878         }
 879
 880         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
 881
 882         if (id >= omap_mcbsp_count) {
 883                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
 884                 ret = -EINVAL;
 885                 goto exit;
 886         }
 887
 888         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
 889         if (!mcbsp) {
 890                 ret = -ENOMEM;
 891                 goto exit;
 892         }
 893         mcbsp_ptr[id] = mcbsp;
 894
 895         spin_lock_init(&mcbsp->lock);
 896         mcbsp->id = id + 1;
 897         mcbsp->free = 1;
 898         mcbsp->dma_tx_lch = -1;
 899         mcbsp->dma_rx_lch = -1;
 900
 901         mcbsp->phys_base = pdata->phys_base;
 902         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
 903         if (!mcbsp->io_base) {
 904                 ret = -ENOMEM;
 905                 goto err_ioremap;
 906         }
 907
 908         /* Default I/O is IRQ based */
 909         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
 910         mcbsp->tx_irq = pdata->tx_irq;
 911         mcbsp->rx_irq = pdata->rx_irq;
 912         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
 913         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 914
 915         if (pdata->clk_name)
 916                 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
 917         if (IS_ERR(mcbsp->clk)) {
 918                 dev_err(&pdev->dev,
 919                         "Invalid clock configuration for McBSP%d.\n",
 920                         mcbsp->id);
 921                 ret = PTR_ERR(mcbsp->clk);
 922                 goto err_clk;
 923         }
 924
 925         mcbsp->pdata = pdata;
 926         mcbsp->dev = &pdev->dev;
 927         platform_set_drvdata(pdev, mcbsp);
 928         return 0;
 929
 930 err_clk:
 931         iounmap(mcbsp->io_base);
 932 err_ioremap:
 933         mcbsp->free = 0;
 934 exit:
 935         return ret;
 936 }
 937
 938 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
 939 {
 940         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
 941
 942         platform_set_drvdata(pdev, NULL);
 943         if (mcbsp) {
 944
 945                 if (mcbsp->pdata && mcbsp->pdata->ops &&
 946                                 mcbsp->pdata->ops->free)
 947                         mcbsp->pdata->ops->free(mcbsp->id);
 948
 949                 clk_disable(mcbsp->clk);
 950                 clk_put(mcbsp->clk);
 951
 952                 iounmap(mcbsp->io_base);
 953
 954                 mcbsp->clk = NULL;
 955                 mcbsp->free = 0;
 956                 mcbsp->dev = NULL;
 957         }
 958
 959         return 0;
 960 }
 961
 962 static struct platform_driver omap_mcbsp_driver = {
 963         .probe          = omap_mcbsp_probe,
 964         .remove         = __devexit_p(omap_mcbsp_remove),
 965         .driver         = {
 966                 .name   = "omap-mcbsp",
 967         },
 968 };
 969
 970 int __init omap_mcbsp_init(void)
 971 {
 972         /* Register the McBSP driver */
 973         return platform_driver_register(&omap_mcbsp_driver);
 974 }
 975