1 #ifndef __ASM_ARCH_OMAP_STI_H
2 #define __ASM_ARCH_OMAP_STI_H
9 #define STI_REVISION 0x00
10 #define STI_SYSCONFIG 0x10
11 #define STI_SYSSTATUS 0x14
12 #define STI_IRQSTATUS 0x18
13 #define STI_IRQSETEN 0x1c
15 #if defined(CONFIG_ARCH_OMAP1)
16 #define STI_IRQCLREN 0x20
19 #define STI_RX_DR 0x2c
20 #define STI_RX_STATUS 0x30
21 #define STI_CLK_CTRL 0x34
22 #define STI_IOBOTT0 0x4c
23 #define STI_IOTOP0 0x50
24 #define STI_IOBOTT1 0x54
25 #define STI_IOTOP1 0x58
26 #define STI_SERIAL_CFG 0x60
28 #define STI_OCPT2_MATCH_INT 0
29 #define STI_OCPT1_MATCH_INT 1
30 #define STI_EMIFS_MATCH_INT 2
31 #define STI_EMIFF_MATCH_INT 3
32 #define STI_IO_MATCH_INT 4
34 #define STI_DUMP_REQUEST_INT 6
35 #define STI_DUMP_UNDERRUN_INT 7
36 #define STI_WAKEUP_INT 9
38 #define STI_NR_IRQS 10
40 #define STI_IRQSTATUS_MASK 0x2ff
42 #define STI_RXFIFO_EMPTY (1 << 0)
45 * We use the following enums to retain consistency with the STI "functional"
51 UnlockStatMatch = (1 << 2), /* Unlock status match event regs */
52 IOMPUStr1En1 = (1 << 3), /* MPU IO match, strobe 1, window 1 */
53 IOMPUStr0En1 = (1 << 4), /* MPU IO match, strobe 0, window 1 */
54 IOMPUStr1En0 = (1 << 5), /* MPU IO match, strobe 1, window 0 */
55 IOMPUStr0En0 = (1 << 6), /* MPU IO match, strobe 0, window 0 */
56 IODSPStr1En1 = (1 << 7), /* DSP IO match, strobe 1, window 1 */
57 IODSPStr0En1 = (1 << 8), /* DSP IO match, strobe 0, window 1 */
58 IODSPStr1En0 = (1 << 9), /* DSP IO match, strobe 1, window 0 */
59 IODSPStr0En0 = (1 << 10), /* DSP IO match, strobe 0, window 0 */
60 MemMatchEn = (1 << 11), /* Memory matched event */
61 DSPCmdEn = (1 << 12), /* DSP command write */
62 MPUCmdEn = (1 << 13), /* MPU command write */
63 MemDumpEn = (1 << 14), /* System memory dump */
64 STIEn = (1 << 15), /* Global trace enable */
67 #define STI_PERCHANNEL_SIZE 4
69 #define to_channel_address(channel) \
70 (sti_channel_base + STI_PERCHANNEL_SIZE * (channel))
72 #elif defined(CONFIG_ARCH_OMAP2)
74 /* XTI interrupt bits */
77 STI_ETB_THRESHOLD_INT,
85 CmdTimeStampEn = (1 << 0), /* Command write timestamps */
86 WinTimeStampEn = (1 << 1), /* Window match timestamps */
87 WinMatchEn = (1 << 2), /* Window match trace */
88 DSPCmdEn = (1 << 3), /* DSP command write */
89 MPUCmdEn = (1 << 4), /* MPU command write */
90 MemDumpEn0 = (1 << 5), /* System memory dump */
91 MemDumpEn1 = (1 << 6),
92 MemDumpEn2 = (1 << 7),
93 ExtTriggerEn = (1 << 8), /* External trace trigger */
94 STIEn = (1 << 9), /* System trace enable */
97 #define STI_IRQSTATUS_MASK 0x0f
98 #define STI_PERCHANNEL_SIZE 64
101 #define XTI_SYSSTATUS 0x14
102 #define XTI_TRACESELECT 0x24
103 #define XTI_RXDATA 0x28
104 #define XTI_SCLKCRTL 0x2c
105 #define XTI_SCONFIG 0x30
107 /* STI Compatability */
108 #define STI_RX_STATUS XTI_SYSSTATUS
109 #define STI_IRQCLREN STI_IRQSETEN
110 #define STI_ER XTI_TRACESELECT
111 #define STI_DR XTI_TRACESELECT
112 #define STI_RX_DR XTI_RXDATA
113 #define STI_CLK_CTRL XTI_SCLKCRTL
114 #define STI_SERIAL_CFG XTI_SCONFIG
116 #define STI_RXFIFO_EMPTY (1 << 8)
118 #define to_channel_address(channel) \
119 (sti_channel_base + STI_PERCHANNEL_SIZE * (channel))
121 #elif defined(CONFIG_ARCH_OMAP3)
123 #define STI_PERCHANNEL_SIZE 0x1000
124 #define to_channel_address(channel) \
125 (sti_channel_base + STI_PERCHANNEL_SIZE * (channel) + 0x800)
129 /* arch/arm/plat-omap/sti/sti.c */
130 extern void __iomem *sti_base, *sti_channel_base;
132 int sti_request_irq(unsigned int irq, void *handler, unsigned long arg);
133 void sti_free_irq(unsigned int irq);
134 void sti_enable_irq(unsigned int irq);
135 void sti_disable_irq(unsigned int irq);
136 void sti_ack_irq(unsigned int irq);
138 int sti_trace_enable(int event);
139 void sti_trace_disable(int event);
141 void sti_channel_write_trace(int len, int id, void *data, unsigned int channel);
143 /* arch/arm/plat-omap/sti/sti-fifo.c */
144 int sti_read_packet(unsigned char *buf, int maxsize);
146 static inline unsigned long sti_readl(unsigned long reg)
148 return __raw_readl(sti_base + reg);
151 static inline void sti_writel(unsigned long data, unsigned long reg)
153 __raw_writel(data, sti_base + reg);
156 static inline void sti_channel_writeb(unsigned char data, unsigned int channel)
158 __raw_writeb(data, to_channel_address(channel));
161 static inline void sti_channel_writel(unsigned long data, unsigned int channel)
163 __raw_writel(data, to_channel_address(channel));
166 #define STI_TRACE_CONTROL_CHANNEL 253
168 static inline void sti_channel_flush(unsigned int channel)
170 sti_channel_writeb(channel, STI_TRACE_CONTROL_CHANNEL);
172 #endif /* __ASM_ARCH_OMAP_STI_H */