2 * arch/arm/plat-omap/include/mach/clock.h
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
14 #define __ARCH_ARM_OMAP_CLOCK_H
20 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
30 const struct clksel_rate *rates;
39 unsigned long last_rounded_rate;
40 unsigned int rate_tolerance;
45 struct clk *bypass_clk;
48 # if defined(CONFIG_ARCH_OMAP3)
64 * struct clk_child - used to track the children of a clock
65 * @clk: child struct clk *
67 * @flags: is this entry allocated in bootmem or slab? is it deleted?
69 * One struct clk_child is allocated for each child clock @clk of a
70 * parent clock. @flags values are listed below and start with CLK_CHILD_*.
74 struct list_head node;
79 struct list_head node;
85 unsigned long temp_rate;
86 struct list_head children;
92 void (*recalc)(struct clk *, unsigned long, u8);
93 int (*set_rate)(struct clk *, unsigned long);
94 long (*round_rate)(struct clk *, unsigned long);
95 void (*init)(struct clk *);
96 int (*enable)(struct clk *);
97 void (*disable)(struct clk *);
98 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
102 const struct clksel *clksel;
103 struct dpll_data *dpll_data;
106 struct clockdomain *ptr;
113 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
114 struct dentry *dent; /* For visible tree hierarchy */
118 struct cpufreq_frequency_table;
120 struct clk_functions {
121 int (*clk_enable)(struct clk *clk);
122 void (*clk_disable)(struct clk *clk);
123 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
124 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
125 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
126 struct clk * (*clk_get_parent)(struct clk *clk);
127 void (*clk_allow_idle)(struct clk *clk);
128 void (*clk_deny_idle)(struct clk *clk);
129 void (*clk_disable_unused)(struct clk *clk);
130 #ifdef CONFIG_CPU_FREQ
131 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
135 extern unsigned int mpurate;
137 extern int clk_init(struct clk_functions *custom_clocks);
138 extern int clk_register(struct clk *clk);
139 extern void clk_unregister(struct clk *clk);
140 extern void propagate_rate(struct clk *clk, u8 rate_storage);
141 extern void recalculate_root_clocks(void);
142 extern void followparent_recalc(struct clk *clk, unsigned long parent_rate,
144 extern void clk_allow_idle(struct clk *clk);
145 extern void clk_deny_idle(struct clk *clk);
146 extern int clk_get_usecount(struct clk *clk);
147 extern void clk_enable_init_clocks(void);
148 #ifdef CONFIG_CPU_FREQ
149 extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
151 void omap_clk_add_child(struct clk *clk, struct clk *clk2);
152 void omap_clk_del_child(struct clk *clk, struct clk *clk2);
155 #define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */
156 /* bits 1-3 are currently free */
157 #define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */
158 #define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
159 /* bit 6 is currently free */
160 #define CLOCK_IDLE_CONTROL (1 << 7)
161 #define CLOCK_NO_IDLE_PARENT (1 << 8)
162 #define DELAYED_APP (1 << 9) /* Delay application of clock */
163 #define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
164 #define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
165 #define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
166 #define WAIT_READY (1 << 13) /* wait for dev to leave idle */
167 #define RECALC_ON_ENABLE (1 << 14) /* recalc/prop on ena/disa */
168 /* bits 15-20 are currently free */
169 #define CLOCK_IN_OMAP310 (1 << 21)
170 #define CLOCK_IN_OMAP730 (1 << 22)
171 #define CLOCK_IN_OMAP1510 (1 << 23)
172 #define CLOCK_IN_OMAP16XX (1 << 24)
173 #define CLOCK_IN_OMAP242X (1 << 25)
174 #define CLOCK_IN_OMAP243X (1 << 26)
175 #define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */
176 #define PARENT_CONTROLS_CLOCK (1 << 28)
177 #define CLOCK_IN_OMAP3430ES1 (1 << 29) /* 3430ES1 clocks only */
178 #define CLOCK_IN_OMAP3430ES2 (1 << 30) /* 3430ES2+ clocks only */
180 /* Clksel_rate flags */
181 #define DEFAULT_RATE (1 << 0)
182 #define RATE_IN_242X (1 << 1)
183 #define RATE_IN_243X (1 << 2)
184 #define RATE_IN_343X (1 << 3) /* rates common to all 343X */
185 #define RATE_IN_3430ES2 (1 << 4) /* 3430ES2+ rates only */
187 #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
189 /* rate_storage parameter flags */
190 #define CURRENT_RATE 0
193 /* clk_child flags */
194 #define CLK_CHILD_SLAB_ALLOC (1 << 0) /* if !set, bootmem was used */
195 #define CLK_CHILD_DELETED (1 << 1) /* can be reused */
198 * clk.prcm_mod flags (possible since only the top byte in clk.prcm_mod
201 #define PRCM_MOD_ADDR_MASK 0xff00
202 #define CLK_REG_IN_PRM (1 << 0)
203 #define CLK_REG_IN_SCM (1 << 1)