2 * arch/arm/plat-omap/include/mach/clock.h
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
14 #define __ARCH_ARM_OMAP_CLOCK_H
21 int (*enable)(struct clk *);
22 void (*disable)(struct clk *);
25 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
35 const struct clksel_rate *rates;
39 void __iomem *mult_div1_reg;
42 unsigned int rate_tolerance;
43 unsigned long last_rounded_rate;
49 # if defined(CONFIG_ARCH_OMAP3)
51 void __iomem *control_reg;
52 void __iomem *autoidle_reg;
53 void __iomem *idlest_reg;
67 struct list_head node;
68 const struct clkops *ops;
74 void __iomem *enable_reg;
75 void (*recalc)(struct clk *);
76 int (*set_rate)(struct clk *, unsigned long);
77 long (*round_rate)(struct clk *, unsigned long);
78 void (*init)(struct clk *);
81 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
83 void __iomem *clksel_reg;
85 const struct clksel *clksel;
86 struct dpll_data *dpll_data;
87 const char *clkdm_name;
88 struct clockdomain *clkdm;
93 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
94 struct dentry *dent; /* For visible tree hierarchy */
98 struct cpufreq_frequency_table;
100 struct clk_functions {
101 int (*clk_enable)(struct clk *clk);
102 void (*clk_disable)(struct clk *clk);
103 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
104 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
105 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
106 void (*clk_allow_idle)(struct clk *clk);
107 void (*clk_deny_idle)(struct clk *clk);
108 void (*clk_disable_unused)(struct clk *clk);
109 #ifdef CONFIG_CPU_FREQ
110 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
114 extern unsigned int mpurate;
116 extern int clk_init(struct clk_functions *custom_clocks);
117 extern int clk_register(struct clk *clk);
118 extern void clk_unregister(struct clk *clk);
119 extern void propagate_rate(struct clk *clk);
120 extern void recalculate_root_clocks(void);
121 extern void followparent_recalc(struct clk *clk);
122 extern int clk_get_usecount(struct clk *clk);
123 extern void clk_enable_init_clocks(void);
125 extern const struct clkops clkops_null;
129 #define RATE_FIXED (1 << 1) /* Fixed clock rate */
130 #define RATE_PROPAGATES (1 << 2) /* Program children too */
131 /* bits 3-4 are free */
132 #define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
133 #define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
134 #define CLOCK_IDLE_CONTROL (1 << 7)
135 #define CLOCK_NO_IDLE_PARENT (1 << 8)
136 #define DELAYED_APP (1 << 9) /* Delay application of clock */
137 #define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
138 #define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
139 #define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
140 /* bits 13-31 are currently free */
142 /* Clksel_rate flags */
143 #define DEFAULT_RATE (1 << 0)
144 #define RATE_IN_242X (1 << 1)
145 #define RATE_IN_243X (1 << 2)
146 #define RATE_IN_343X (1 << 3) /* rates common to all 343X */
147 #define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */
149 #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
152 /* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */
153 #define CORE_CLK_SRC_32K 0
154 #define CORE_CLK_SRC_DPLL 1
155 #define CORE_CLK_SRC_DPLL_X2 2