]> www.pilppa.org Git - linux-2.6-omap-h63xx.git/blob - arch/arm/plat-omap/devices.c
079b67deac0f20fef726ce550739fa4345f5220c
[linux-2.6-omap-h63xx.git] / arch / arm / plat-omap / devices.c
1 /*
2  * linux/arch/arm/plat-omap/devices.c
3  *
4  * Common platform device setup/initialization for OMAP1 and OMAP2
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11
12 #include <linux/config.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17
18 #include <asm/hardware.h>
19 #include <asm/io.h>
20 #include <asm/mach-types.h>
21 #include <asm/mach/map.h>
22
23 #include <asm/arch/tc.h>
24 #include <asm/arch/board.h>
25 #include <asm/arch/mux.h>
26 #include <asm/arch/gpio.h>
27 #include <asm/arch/menelaus.h>
28
29
30 void omap_nop_release(struct device *dev)
31 {
32         /* Nothing */
33 }
34
35 /*-------------------------------------------------------------------------*/
36
37 #if     defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
38
39 #define OMAP1_I2C_BASE          0xfffb3800
40 #define OMAP2_I2C_BASE1         0x48070000
41 #define OMAP_I2C_SIZE           0x3f
42 #define OMAP1_I2C_INT           INT_I2C
43 #define OMAP2_I2C_INT1          56
44
45 static struct resource i2c_resources1[] = {
46         {
47                 .start          = 0,
48                 .end            = 0,
49                 .flags          = IORESOURCE_MEM,
50         },
51         {
52                 .start          = 0,
53                 .flags          = IORESOURCE_IRQ,
54         },
55 };
56
57 /* DMA not used; works around erratum writing to non-empty i2c fifo */
58
59 static struct platform_device omap_i2c_device1 = {
60         .name           = "i2c_omap",
61         .id             = 1,
62         .dev = {
63                 .release        = omap_nop_release,
64         },
65         .num_resources  = ARRAY_SIZE(i2c_resources1),
66         .resource       = i2c_resources1,
67 };
68
69 /* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
70 static void omap_init_i2c(void)
71 {
72         if (cpu_is_omap24xx()) {
73                 i2c_resources1[0].start = OMAP2_I2C_BASE1;
74                 i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
75                 i2c_resources1[1].start = OMAP2_I2C_INT1;
76         } else {
77                 i2c_resources1[0].start = OMAP1_I2C_BASE;
78                 i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
79                 i2c_resources1[1].start = OMAP1_I2C_INT;
80         }
81
82         /* FIXME define and use a boot tag, in case of boards that
83          * either don't wire up I2C, or chips that mux it differently...
84          * it can include clocking and address info, maybe more.
85          */
86         if (cpu_is_omap24xx()) {
87                 omap_cfg_reg(M19_24XX_I2C1_SCL);
88                 omap_cfg_reg(L15_24XX_I2C1_SDA);
89         } else {
90                 omap_cfg_reg(I2C_SCL);
91                 omap_cfg_reg(I2C_SDA);
92         }
93
94         (void) platform_device_register(&omap_i2c_device1);
95 }
96
97 #else
98 static inline void omap_init_i2c(void) {}
99 #endif
100
101 /*-------------------------------------------------------------------------*/
102 #if     defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
103
104 static void omap_init_kp(void)
105 {
106         if (machine_is_omap_h2() || machine_is_omap_h3()) {
107                 omap_cfg_reg(F18_1610_KBC0);
108                 omap_cfg_reg(D20_1610_KBC1);
109                 omap_cfg_reg(D19_1610_KBC2);
110                 omap_cfg_reg(E18_1610_KBC3);
111                 omap_cfg_reg(C21_1610_KBC4);
112
113                 omap_cfg_reg(G18_1610_KBR0);
114                 omap_cfg_reg(F19_1610_KBR1);
115                 omap_cfg_reg(H14_1610_KBR2);
116                 omap_cfg_reg(E20_1610_KBR3);
117                 omap_cfg_reg(E19_1610_KBR4);
118                 omap_cfg_reg(N19_1610_KBR5);
119         } else if (machine_is_omap_perseus2()) {
120                 omap_cfg_reg(E2_730_KBR0);
121                 omap_cfg_reg(J7_730_KBR1);
122                 omap_cfg_reg(E1_730_KBR2);
123                 omap_cfg_reg(F3_730_KBR3);
124                 omap_cfg_reg(D2_730_KBR4);
125
126                 omap_cfg_reg(C2_730_KBC0);
127                 omap_cfg_reg(D3_730_KBC1);
128                 omap_cfg_reg(E4_730_KBC2);
129                 omap_cfg_reg(F4_730_KBC3);
130                 omap_cfg_reg(E3_730_KBC4);
131         } else if (machine_is_omap_h4()) {
132                 omap_cfg_reg(T19_24XX_KBR0);
133                 omap_cfg_reg(R19_24XX_KBR1);
134                 omap_cfg_reg(V18_24XX_KBR2);
135                 omap_cfg_reg(M21_24XX_KBR3);
136                 omap_cfg_reg(E5__24XX_KBR4);
137                 if (omap_has_menelaus()) {
138                         omap_cfg_reg(B3__24XX_KBR5);
139                         omap_cfg_reg(AA4_24XX_KBC2);
140                         omap_cfg_reg(B13_24XX_KBC6);
141                 } else {
142                         omap_cfg_reg(M18_24XX_KBR5);
143                         omap_cfg_reg(H19_24XX_KBC2);
144                         omap_cfg_reg(N19_24XX_KBC6);
145                 }
146                 omap_cfg_reg(R20_24XX_KBC0);
147                 omap_cfg_reg(M14_24XX_KBC1);
148                 omap_cfg_reg(V17_24XX_KBC3);
149                 omap_cfg_reg(P21_24XX_KBC4);
150                 omap_cfg_reg(L14_24XX_KBC5);
151         }
152 }
153 #else
154 static inline void omap_init_kp(void) {}
155 #endif
156
157 /*-------------------------------------------------------------------------*/
158
159 #if     defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
160
161 #ifdef CONFIG_ARCH_OMAP24XX
162 #define OMAP_MMC1_BASE          0x4809c000
163 #define OMAP_MMC1_INT           83
164 #else
165 #define OMAP_MMC1_BASE          0xfffb7800
166 #define OMAP_MMC1_INT           INT_MMC
167 #endif
168 #define OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
169
170 static struct omap_mmc_conf mmc1_conf;
171
172 static u64 mmc1_dmamask = 0xffffffff;
173
174 static struct resource mmc1_resources[] = {
175         {
176                 .start          = IO_ADDRESS(OMAP_MMC1_BASE),
177                 .end            = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
178                 .flags          = IORESOURCE_MEM,
179         },
180         {
181                 .start          = OMAP_MMC1_INT,
182                 .flags          = IORESOURCE_IRQ,
183         },
184 };
185
186 static struct platform_device mmc_omap_device1 = {
187         .name           = "mmci-omap",
188         .id             = 1,
189         .dev = {
190                 .release        = omap_nop_release,
191                 .dma_mask       = &mmc1_dmamask,
192                 .platform_data  = &mmc1_conf,
193         },
194         .num_resources  = ARRAY_SIZE(mmc1_resources),
195         .resource       = mmc1_resources,
196 };
197
198 #ifdef  CONFIG_ARCH_OMAP16XX
199
200 static struct omap_mmc_conf mmc2_conf;
201
202 static u64 mmc2_dmamask = 0xffffffff;
203
204 static struct resource mmc2_resources[] = {
205         {
206                 .start          = IO_ADDRESS(OMAP_MMC2_BASE),
207                 .end            = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
208                 .flags          = IORESOURCE_MEM,
209         },
210         {
211                 .start          = INT_1610_MMC2,
212                 .flags          = IORESOURCE_IRQ,
213         },
214 };
215
216 static struct platform_device mmc_omap_device2 = {
217         .name           = "mmci-omap",
218         .id             = 2,
219         .dev = {
220                 .release        = omap_nop_release,
221                 .dma_mask       = &mmc2_dmamask,
222                 .platform_data  = &mmc2_conf,
223         },
224         .num_resources  = ARRAY_SIZE(mmc2_resources),
225         .resource       = mmc2_resources,
226 };
227 #endif
228
229 static void __init omap_init_mmc(void)
230 {
231         const struct omap_mmc_config    *mmc_conf;
232         const struct omap_mmc_conf      *mmc;
233
234         /* NOTE:  assumes MMC was never (wrongly) enabled */
235         mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
236         if (!mmc_conf)
237                 return;
238
239         /* block 1 is always available and has just one pinout option */
240         mmc = &mmc_conf->mmc[0];
241         if (mmc->enabled) {
242                 if (!cpu_is_omap24xx()) {
243                         omap_cfg_reg(MMC_CMD);
244                         omap_cfg_reg(MMC_CLK);
245                         omap_cfg_reg(MMC_DAT0);
246                         if (cpu_is_omap1710()) {
247                                 omap_cfg_reg(M15_1710_MMC_CLKI);
248                                 omap_cfg_reg(P19_1710_MMC_CMDDIR);
249                                 omap_cfg_reg(P20_1710_MMC_DATDIR0);
250                         }
251                 }
252                 if (mmc->wire4) {
253                         if (!cpu_is_omap24xx()) {
254                                 omap_cfg_reg(MMC_DAT1);
255                                 /* NOTE:  DAT2 can be on W10 (here) or M15 */
256                                 if (!mmc->nomux)
257                                         omap_cfg_reg(MMC_DAT2);
258                                 omap_cfg_reg(MMC_DAT3);
259                         }
260                 }
261                 mmc1_conf = *mmc;
262                 (void) platform_device_register(&mmc_omap_device1);
263         }
264
265 #ifdef  CONFIG_ARCH_OMAP16XX
266         /* block 2 is on newer chips, and has many pinout options */
267         mmc = &mmc_conf->mmc[1];
268         if (mmc->enabled) {
269                 if (!mmc->nomux) {
270                         omap_cfg_reg(Y8_1610_MMC2_CMD);
271                         omap_cfg_reg(Y10_1610_MMC2_CLK);
272                         omap_cfg_reg(R18_1610_MMC2_CLKIN);
273                         omap_cfg_reg(W8_1610_MMC2_DAT0);
274                         if (mmc->wire4) {
275                                 omap_cfg_reg(V8_1610_MMC2_DAT1);
276                                 omap_cfg_reg(W15_1610_MMC2_DAT2);
277                                 omap_cfg_reg(R10_1610_MMC2_DAT3);
278                         }
279
280                         /* These are needed for the level shifter */
281                         omap_cfg_reg(V9_1610_MMC2_CMDDIR);
282                         omap_cfg_reg(V5_1610_MMC2_DATDIR0);
283                         omap_cfg_reg(W19_1610_MMC2_DATDIR1);
284                 }
285
286                 /* Feedback clock must be set on OMAP-1710 MMC2 */
287                 if (cpu_is_omap1710())
288                         omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
289                                      MOD_CONF_CTRL_1);
290                 mmc2_conf = *mmc;
291                 (void) platform_device_register(&mmc_omap_device2);
292         }
293 #endif
294         return;
295 }
296 #else
297 static inline void omap_init_mmc(void) {}
298 #endif
299
300 /*-------------------------------------------------------------------------*/
301
302 /* Numbering for the SPI-capable controllers when used for SPI:
303  * spi          = 1
304  * uwire        = 2
305  * mmc1..2      = 3..4
306  * mcbsp1..3    = 5..7
307  */
308
309 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
310
311 #define OMAP_UWIRE_BASE         0xfffb3000
312
313 static struct resource uwire_resources[] = {
314         {
315                 .start          = OMAP_UWIRE_BASE,
316                 .end            = OMAP_UWIRE_BASE + 0x20,
317                 .flags          = IORESOURCE_MEM,
318         },
319 };
320
321 static struct platform_device omap_uwire_device = {
322         .name      = "omap_uwire",
323         .id          = -1,
324         .dev = {
325                 .release        = omap_nop_release,
326         },
327         .num_resources  = ARRAY_SIZE(uwire_resources),
328         .resource       = uwire_resources,
329 };
330
331 static void omap_init_uwire(void)
332 {
333         /* FIXME define and use a boot tag; not all boards will be hooking
334          * up devices to the microwire controller, and multi-board configs
335          * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
336          */
337
338         /* board-specific code must configure chipselects (only a few
339          * are normally used) and SCLK/SDI/SDO (each has two choices).
340          */
341         (void) platform_device_register(&omap_uwire_device);
342 }
343 #else
344 static inline void omap_init_uwire(void) {}
345 #endif
346
347 /*-------------------------------------------------------------------------*/
348
349 #if     defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
350
351 #ifdef CONFIG_ARCH_OMAP24XX
352 #define OMAP_WDT_BASE           0x48022000
353 #else
354 #define OMAP_WDT_BASE           0xfffeb000
355 #endif
356
357 static struct resource wdt_resources[] = {
358         {
359                 .start          = OMAP_WDT_BASE,
360                 .end            = OMAP_WDT_BASE + 0x4f,
361                 .flags          = IORESOURCE_MEM,
362         },
363 };
364
365 static struct platform_device omap_wdt_device = {
366         .name      = "omap_wdt",
367         .id          = -1,
368         .dev = {
369                 .release        = omap_nop_release,
370         },
371         .num_resources  = ARRAY_SIZE(wdt_resources),
372         .resource       = wdt_resources,
373 };
374
375 static void omap_init_wdt(void)
376 {
377         (void) platform_device_register(&omap_wdt_device);
378 }
379 #else
380 static inline void omap_init_wdt(void) {}
381 #endif
382
383 /*-------------------------------------------------------------------------*/
384
385 #if     defined(CONFIG_OMAP_RNG) || defined(CONFIG_OMAP_RNG_MODULE)
386
387 #ifdef CONFIG_ARCH_OMAP24XX
388 #define OMAP_RNG_BASE           0x480A0000
389 #else
390 #define OMAP_RNG_BASE           0xfffe5000
391 #endif
392
393 static struct resource rng_resources[] = {
394         {
395                 .start          = OMAP_RNG_BASE,
396                 .end            = OMAP_RNG_BASE + 0x4f,
397                 .flags          = IORESOURCE_MEM,
398         },
399 };
400
401 static struct platform_device omap_rng_device = {
402         .name      = "omap_rng",
403         .id          = -1,
404         .dev = {
405                 .release        = omap_nop_release,
406         },
407         .num_resources  = ARRAY_SIZE(rng_resources),
408         .resource       = rng_resources,
409 };
410
411 static void omap_init_rng(void)
412 {
413         (void) platform_device_register(&omap_rng_device);
414 }
415 #else
416 static inline void omap_init_rng(void) {}
417 #endif
418
419 /*
420  * This gets called after board-specific INIT_MACHINE, and initializes most
421  * on-chip peripherals accessible on this board (except for few like USB):
422  *
423  *  (a) Does any "standard config" pin muxing needed.  Board-specific
424  *      code will have muxed GPIO pins and done "nonstandard" setup;
425  *      that code could live in the boot loader.
426  *  (b) Populating board-specific platform_data with the data drivers
427  *      rely on to handle wiring variations.
428  *  (c) Creating platform devices as meaningful on this board and
429  *      with this kernel configuration.
430  *
431  * Claiming GPIOs, and setting their direction and initial values, is the
432  * responsibility of the device drivers.  So is responding to probe().
433  *
434  * Board-specific knowlege like creating devices or pin setup is to be
435  * kept out of drivers as much as possible.  In particular, pin setup
436  * may be handled by the boot loader, and drivers should expect it will
437  * normally have been done by the time they're probed.
438  */
439 static int __init omap_init_devices(void)
440 {
441         /* please keep these calls, and their implementations above,
442          * in alphabetical order so they're easier to sort through.
443          */
444         omap_init_i2c();
445         omap_init_kp();
446         omap_init_mmc();
447         omap_init_uwire();
448         omap_init_wdt();
449         omap_init_rng();
450
451         return 0;
452 }
453 arch_initcall(omap_init_devices);
454