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Merge branch 'omap-fixes'
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1 /*
2  * linux/arch/arm/mach-omap2/usb-ehci.c
3  *
4  * This file will contain the board specific details for the
5  * Synopsys EHCI host controller on OMAP3430
6  *
7  * Copyright (C) 2007 Texas Instruments
8  * Author: Vikram Pandita <vikram.pandita@ti.com>
9  *
10  * Generalization by:
11  * Felipe Balbi <felipe.balbi@nokia.com>
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  */
17
18 #include <linux/types.h>
19 #include <linux/errno.h>
20 #include <linux/delay.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23 #include <asm/io.h>
24 #include <mach/mux.h>
25
26 #include <mach/hardware.h>
27 #include <mach/irqs.h>
28 #include <mach/pm.h>
29 #include <mach/usb.h>
30
31 static struct resource ehci_resources[] = {
32         [0] = {
33                 .start   = OMAP34XX_HSUSB_HOST_BASE + 0x800,
34                 .end     = OMAP34XX_HSUSB_HOST_BASE + 0x800 + SZ_1K - 1,
35                 .flags   = IORESOURCE_MEM,
36         },
37         [1] = {         /* general IRQ */
38                 .start   = INT_34XX_EHCI_IRQ,
39                 .flags   = IORESOURCE_IRQ,
40         }
41 };
42
43 static u64 ehci_dmamask = ~(u32)0;
44 static struct platform_device ehci_device = {
45         .name           = "ehci-omap",
46         .id             = 0,
47         .dev = {
48                 .dma_mask               = &ehci_dmamask,
49                 .coherent_dma_mask      = 0xffffffff,
50                 .platform_data          = NULL,
51         },
52         .num_resources  = ARRAY_SIZE(ehci_resources),
53         .resource       = ehci_resources,
54 };
55
56 /* MUX settings for EHCI pins */
57 /*
58  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
59  */
60 static void setup_ehci_io_mux(void)
61 {
62 #ifdef CONFIG_OMAP_EHCI_PHY_MODE
63         /* PHY mode of operation for board: 750-2083-001
64          * ISP1504 connected to Port1 and Port2
65          * Do Func Mux setting for 12-pin ULPI PHY mode
66          */
67
68         /* Port1 */
69         omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
70         omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
71         omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
72         omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
73         omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
74         omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
75         omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
76         omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
77         omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
78         omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
79         omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
80         omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
81
82         /* Port2 */
83         omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
84         omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
85         omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
86         omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
87         omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
88         omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
89         omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
90         omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
91         omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
92         omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
93         omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
94         omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
95
96 #else
97         /* Set Func mux for :
98          * TLL mode of operation
99          * 12-pin ULPI SDR TLL mode for Port1/2/3
100          */
101
102         /* Port1 */
103         omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
104         omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
105         omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
106         omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
107         omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
108         omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
109         omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
110         omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
111         omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
112         omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
113         omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
114         omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
115
116         /* Port2 */
117         omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
118         omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
119         omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
120         omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
121         omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
122         omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
123         omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
124         omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
125         omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
126         omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
127         omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
128         omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
129
130         /* Port3 */
131         omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
132         omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
133         omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
134         omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
135         omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
136         omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
137         omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
138         omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
139         omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
140         omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
141         omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
142         omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
143 #endif /* CONFIG_OMAP_EHCI_PHY_MODE */
144
145         return;
146 }
147
148 void __init usb_ehci_init(void)
149 {
150         /* Setup Pin IO MUX for EHCI */
151         if (cpu_is_omap34xx())
152                 setup_ehci_io_mux();
153
154         if (platform_device_register(&ehci_device) < 0) {
155                 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
156                 return;
157         }
158 }
159
160