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Add MCSPI1 and gpio_85 Mux configuration
[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / mux.c
1 /*
2  * linux/arch/arm/mach-omap2/mux.c
3  *
4  * OMAP2 and OMAP3 pin multiplexing configurations
5  *
6  * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7  * Copyright (C) 2003 - 2008 Nokia Corporation
8  *
9  * Written by Tony Lindgren
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24  *
25  */
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <asm/system.h>
29 #include <linux/io.h>
30 #include <linux/spinlock.h>
31
32 #include <mach/control.h>
33 #include <mach/mux.h>
34
35 #ifdef CONFIG_OMAP_MUX
36
37 static struct omap_mux_cfg arch_mux_cfg;
38
39 /* NOTE: See mux.h for the enumeration */
40
41 #ifdef CONFIG_ARCH_OMAP24XX
42 static struct pin_config __initdata_or_module omap24xx_pins[] = {
43 /*
44  *      description                     mux     mux     pull    pull    debug
45  *                                      offset  mode    ena     type
46  */
47
48 /* 24xx I2C */
49 MUX_CFG_24XX("M19_24XX_I2C1_SCL",       0x111,  0,      0,      0,      1)
50 MUX_CFG_24XX("L15_24XX_I2C1_SDA",       0x112,  0,      0,      0,      1)
51 MUX_CFG_24XX("J15_24XX_I2C2_SCL",       0x113,  0,      0,      1,      1)
52 MUX_CFG_24XX("H19_24XX_I2C2_SDA",       0x114,  0,      0,      0,      1)
53
54 /* Menelaus interrupt */
55 MUX_CFG_24XX("W19_24XX_SYS_NIRQ",       0x12c,  0,      1,      1,      1)
56
57 /* 24xx clocks */
58 MUX_CFG_24XX("W14_24XX_SYS_CLKOUT",     0x137,  0,      1,      1,      1)
59
60 /* 24xx GPMC chipselects, wait pin monitoring */
61 MUX_CFG_24XX("E2_GPMC_NCS2",            0x08e,  0,      1,      1,      1)
62 MUX_CFG_24XX("L2_GPMC_NCS7",            0x093,  0,      1,      1,      1)
63 MUX_CFG_24XX("L3_GPMC_WAIT0",           0x09a,  0,      1,      1,      1)
64 MUX_CFG_24XX("N7_GPMC_WAIT1",           0x09b,  0,      1,      1,      1)
65 MUX_CFG_24XX("M1_GPMC_WAIT2",           0x09c,  0,      1,      1,      1)
66 MUX_CFG_24XX("P1_GPMC_WAIT3",           0x09d,  0,      1,      1,      1)
67
68 /* 24xx McBSP */
69 MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX",    0x124,  1,      1,      0,      1)
70 MUX_CFG_24XX("R14_24XX_MCBSP2_FSX",     0x125,  1,      1,      0,      1)
71 MUX_CFG_24XX("W15_24XX_MCBSP2_DR",      0x126,  1,      1,      0,      1)
72 MUX_CFG_24XX("V15_24XX_MCBSP2_DX",      0x127,  1,      1,      0,      1)
73
74 /* 24xx GPIO */
75 MUX_CFG_24XX("M21_242X_GPIO11",         0x0c9,  3,      1,      1,      1)
76 MUX_CFG_24XX("P21_242X_GPIO12",         0x0ca,  3,      0,      0,      1)
77 MUX_CFG_24XX("AA10_242X_GPIO13",        0x0e5,  3,      0,      0,      1)
78 MUX_CFG_24XX("AA6_242X_GPIO14",         0x0e6,  3,      0,      0,      1)
79 MUX_CFG_24XX("AA4_242X_GPIO15",         0x0e7,  3,      0,      0,      1)
80 MUX_CFG_24XX("Y11_242X_GPIO16",         0x0e8,  3,      0,      0,      1)
81 MUX_CFG_24XX("AA12_242X_GPIO17",        0x0e9,  3,      0,      0,      1)
82 MUX_CFG_24XX("AA8_242X_GPIO58",         0x0ea,  3,      0,      0,      1)
83 MUX_CFG_24XX("Y20_24XX_GPIO60",         0x12c,  3,      0,      0,      1)
84 MUX_CFG_24XX("W4__24XX_GPIO74",         0x0f2,  3,      0,      0,      1)
85 MUX_CFG_24XX("N15_24XX_GPIO85",         0x103,  3,      0,      0,      1)
86 MUX_CFG_24XX("M15_24XX_GPIO92",         0x10a,  3,      0,      0,      1)
87 MUX_CFG_24XX("P20_24XX_GPIO93",         0x10b,  3,      0,      0,      1)
88 MUX_CFG_24XX("P18_24XX_GPIO95",         0x10d,  3,      0,      0,      1)
89 MUX_CFG_24XX("M18_24XX_GPIO96",         0x10e,  3,      0,      0,      1)
90 MUX_CFG_24XX("L14_24XX_GPIO97",         0x10f,  3,      0,      0,      1)
91 MUX_CFG_24XX("J15_24XX_GPIO99",         0x113,  3,      1,      1,      1)
92 MUX_CFG_24XX("V14_24XX_GPIO117",        0x128,  3,      1,      0,      1)
93 MUX_CFG_24XX("P14_24XX_GPIO125",        0x140,  3,      1,      1,      1)
94
95 /* 242x DBG GPIO */
96 MUX_CFG_24XX("V4_242X_GPIO49",          0xd3,   3,      0,      0,      1)
97 MUX_CFG_24XX("W2_242X_GPIO50",          0xd4,   3,      0,      0,      1)
98 MUX_CFG_24XX("U4_242X_GPIO51",          0xd5,   3,      0,      0,      1)
99 MUX_CFG_24XX("V3_242X_GPIO52",          0xd6,   3,      0,      0,      1)
100 MUX_CFG_24XX("V2_242X_GPIO53",          0xd7,   3,      0,      0,      1)
101 MUX_CFG_24XX("V6_242X_GPIO53",          0xcf,   3,      0,      0,      1)
102 MUX_CFG_24XX("T4_242X_GPIO54",          0xd8,   3,      0,      0,      1)
103 MUX_CFG_24XX("Y4_242X_GPIO54",          0xd0,   3,      0,      0,      1)
104 MUX_CFG_24XX("T3_242X_GPIO55",          0xd9,   3,      0,      0,      1)
105 MUX_CFG_24XX("U2_242X_GPIO56",          0xda,   3,      0,      0,      1)
106
107 /* 24xx external DMA requests */
108 MUX_CFG_24XX("AA10_242X_DMAREQ0",       0x0e5,  2,      0,      0,      1)
109 MUX_CFG_24XX("AA6_242X_DMAREQ1",        0x0e6,  2,      0,      0,      1)
110 MUX_CFG_24XX("E4_242X_DMAREQ2",         0x074,  2,      0,      0,      1)
111 MUX_CFG_24XX("G4_242X_DMAREQ3",         0x073,  2,      0,      0,      1)
112 MUX_CFG_24XX("D3_242X_DMAREQ4",         0x072,  2,      0,      0,      1)
113 MUX_CFG_24XX("E3_242X_DMAREQ5",         0x071,  2,      0,      0,      1)
114
115 /* UART3 */
116 MUX_CFG_24XX("K15_24XX_UART3_TX",       0x118,  0,      0,      0,      1)
117 MUX_CFG_24XX("K14_24XX_UART3_RX",       0x119,  0,      0,      0,      1)
118
119 /* MMC/SDIO */
120 MUX_CFG_24XX("G19_24XX_MMC_CLKO",       0x0f3,  0,      0,      0,      1)
121 MUX_CFG_24XX("H18_24XX_MMC_CMD",        0x0f4,  0,      0,      0,      1)
122 MUX_CFG_24XX("F20_24XX_MMC_DAT0",       0x0f5,  0,      0,      0,      1)
123 MUX_CFG_24XX("H14_24XX_MMC_DAT1",       0x0f6,  0,      0,      0,      1)
124 MUX_CFG_24XX("E19_24XX_MMC_DAT2",       0x0f7,  0,      0,      0,      1)
125 MUX_CFG_24XX("D19_24XX_MMC_DAT3",       0x0f8,  0,      0,      0,      1)
126 MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0",   0x0f9,  0,      0,      0,      1)
127 MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1",   0x0fa,  0,      0,      0,      1)
128 MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2",   0x0fb,  0,      0,      0,      1)
129 MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3",   0x0fc,  0,      0,      0,      1)
130 MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR",    0x0fd,  0,      0,      0,      1)
131 MUX_CFG_24XX("H15_24XX_MMC_CLKI",       0x0fe,  0,      0,      0,      1)
132
133 /* Full speed USB */
134 MUX_CFG_24XX("J20_24XX_USB0_PUEN",      0x11d,  0,      0,      0,      1)
135 MUX_CFG_24XX("J19_24XX_USB0_VP",        0x11e,  0,      0,      0,      1)
136 MUX_CFG_24XX("K20_24XX_USB0_VM",        0x11f,  0,      0,      0,      1)
137 MUX_CFG_24XX("J18_24XX_USB0_RCV",       0x120,  0,      0,      0,      1)
138 MUX_CFG_24XX("K19_24XX_USB0_TXEN",      0x121,  0,      0,      0,      1)
139 MUX_CFG_24XX("J14_24XX_USB0_SE0",       0x122,  0,      0,      0,      1)
140 MUX_CFG_24XX("K18_24XX_USB0_DAT",       0x123,  0,      0,      0,      1)
141
142 MUX_CFG_24XX("N14_24XX_USB1_SE0",       0x0ed,  2,      0,      0,      1)
143 MUX_CFG_24XX("W12_24XX_USB1_SE0",       0x0dd,  3,      0,      0,      1)
144 MUX_CFG_24XX("P15_24XX_USB1_DAT",       0x0ee,  2,      0,      0,      1)
145 MUX_CFG_24XX("R13_24XX_USB1_DAT",       0x0e0,  3,      0,      0,      1)
146 MUX_CFG_24XX("W20_24XX_USB1_TXEN",      0x0ec,  2,      0,      0,      1)
147 MUX_CFG_24XX("P13_24XX_USB1_TXEN",      0x0df,  3,      0,      0,      1)
148 MUX_CFG_24XX("V19_24XX_USB1_RCV",       0x0eb,  2,      0,      0,      1)
149 MUX_CFG_24XX("V12_24XX_USB1_RCV",       0x0de,  3,      0,      0,      1)
150
151 MUX_CFG_24XX("AA10_24XX_USB2_SE0",      0x0e5,  2,      0,      0,      1)
152 MUX_CFG_24XX("Y11_24XX_USB2_DAT",       0x0e8,  2,      0,      0,      1)
153 MUX_CFG_24XX("AA12_24XX_USB2_TXEN",     0x0e9,  2,      0,      0,      1)
154 MUX_CFG_24XX("AA6_24XX_USB2_RCV",       0x0e6,  2,      0,      0,      1)
155 MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0",    0x0e7,  2,      0,      0,      1)
156
157 /* Keypad GPIO*/
158 MUX_CFG_24XX("T19_24XX_KBR0",           0x106,  3,      1,      1,      1)
159 MUX_CFG_24XX("R19_24XX_KBR1",           0x107,  3,      1,      1,      1)
160 MUX_CFG_24XX("V18_24XX_KBR2",           0x139,  3,      1,      1,      1)
161 MUX_CFG_24XX("M21_24XX_KBR3",           0xc9,   3,      1,      1,      1)
162 MUX_CFG_24XX("E5__24XX_KBR4",           0x138,  3,      1,      1,      1)
163 MUX_CFG_24XX("M18_24XX_KBR5",           0x10e,  3,      1,      1,      1)
164 MUX_CFG_24XX("R20_24XX_KBC0",           0x108,  3,      0,      0,      1)
165 MUX_CFG_24XX("M14_24XX_KBC1",           0x109,  3,      0,      0,      1)
166 MUX_CFG_24XX("H19_24XX_KBC2",           0x114,  3,      0,      0,      1)
167 MUX_CFG_24XX("V17_24XX_KBC3",           0x135,  3,      0,      0,      1)
168 MUX_CFG_24XX("P21_24XX_KBC4",           0xca,   3,      0,      0,      1)
169 MUX_CFG_24XX("L14_24XX_KBC5",           0x10f,  3,      0,      0,      1)
170 MUX_CFG_24XX("N19_24XX_KBC6",           0x110,  3,      0,      0,      1)
171
172 /* 24xx Menelaus Keypad GPIO */
173 MUX_CFG_24XX("B3__24XX_KBR5",           0x30,   3,      1,      1,      1)
174 MUX_CFG_24XX("AA4_24XX_KBC2",           0xe7,   3,      0,      0,      1)
175 MUX_CFG_24XX("B13_24XX_KBC6",           0x110,  3,      0,      0,      1)
176
177 /* 2430 USB */
178 MUX_CFG_24XX("AD9_2430_USB0_PUEN",      0x133,  4,      0,      0,      1)
179 MUX_CFG_24XX("Y11_2430_USB0_VP",        0x134,  4,      0,      0,      1)
180 MUX_CFG_24XX("AD7_2430_USB0_VM",        0x135,  4,      0,      0,      1)
181 MUX_CFG_24XX("AE7_2430_USB0_RCV",       0x136,  4,      0,      0,      1)
182 MUX_CFG_24XX("AD4_2430_USB0_TXEN",      0x137,  4,      0,      0,      1)
183 MUX_CFG_24XX("AF9_2430_USB0_SE0",       0x138,  4,      0,      0,      1)
184 MUX_CFG_24XX("AE6_2430_USB0_DAT",       0x139,  4,      0,      0,      1)
185 MUX_CFG_24XX("AD24_2430_USB1_SE0",      0x107,  2,      0,      0,      1)
186 MUX_CFG_24XX("AB24_2430_USB1_RCV",      0x108,  2,      0,      0,      1)
187 MUX_CFG_24XX("Y25_2430_USB1_TXEN",      0x109,  2,      0,      0,      1)
188 MUX_CFG_24XX("AA26_2430_USB1_DAT",      0x10A,  2,      0,      0,      1)
189
190 /* 2430 HS-USB */
191 MUX_CFG_24XX("AD9_2430_USB0HS_DATA3",   0x133,  0,      0,      0,      1)
192 MUX_CFG_24XX("Y11_2430_USB0HS_DATA4",   0x134,  0,      0,      0,      1)
193 MUX_CFG_24XX("AD7_2430_USB0HS_DATA5",   0x135,  0,      0,      0,      1)
194 MUX_CFG_24XX("AE7_2430_USB0HS_DATA6",   0x136,  0,      0,      0,      1)
195 MUX_CFG_24XX("AD4_2430_USB0HS_DATA2",   0x137,  0,      0,      0,      1)
196 MUX_CFG_24XX("AF9_2430_USB0HS_DATA0",   0x138,  0,      0,      0,      1)
197 MUX_CFG_24XX("AE6_2430_USB0HS_DATA1",   0x139,  0,      0,      0,      1)
198 MUX_CFG_24XX("AE8_2430_USB0HS_CLK",     0x13A,  0,      0,      0,      1)
199 MUX_CFG_24XX("AD8_2430_USB0HS_DIR",     0x13B,  0,      0,      0,      1)
200 MUX_CFG_24XX("AE5_2430_USB0HS_STP",     0x13c,  0,      1,      1,      1)
201 MUX_CFG_24XX("AE9_2430_USB0HS_NXT",     0x13D,  0,      0,      0,      1)
202 MUX_CFG_24XX("AC7_2430_USB0HS_DATA7",   0x13E,  0,      0,      0,      1)
203
204 /* 2430 McBSP */
205 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX",    0x012E, 1,      0,      0,      1)
206 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX",    0x012F, 1,      0,      0,      1)
207 MUX_CFG_24XX("AE13_2430_MCBSP2_DX",     0x0130, 1,      0,      0,      1)
208 MUX_CFG_24XX("AD13_2430_MCBSP2_DR",     0x0131, 1,      0,      0,      1)
209 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0,      0,      0,      1)
210 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0,      0,      0,      1)
211 MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0,      0,      0,      1)
212 MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0,      0,      0,      1)
213
214 /* 2430 MCSPI1 */
215 MUX_CFG_24XX("Y18_2430_MCSPI1_CLK",     0x010F, 0,      0,      0,      1)
216 MUX_CFG_24XX("AD15_2430_MCSPI1_SIMO",   0x0110, 0,      0,      0,      1)
217 MUX_CFG_24XX("AE17_2430_MCSPI1_SOMI",   0x0111, 0,      0,      0,      1)
218 MUX_CFG_24XX("U1_2430_MCSPI1_CS0",      0x0112, 0,      0,      0,      1)
219
220 /* Touchscreen GPIO */
221 MUX_CFG_24XX("AF19_2430_GPIO_85",       0x0113, 3,      0,      0,      1)
222
223 };
224
225 #define OMAP24XX_PINS_SZ        ARRAY_SIZE(omap24xx_pins)
226
227 #else
228 #define omap24xx_pins           NULL
229 #define OMAP24XX_PINS_SZ        0
230 #endif  /* CONFIG_ARCH_OMAP24XX */
231
232 #ifdef CONFIG_ARCH_OMAP34XX
233 static struct pin_config __initdata_or_module omap34xx_pins[] = {
234 /*
235  *              Name, reg-offset,
236  *              mux-mode | [active-mode | off-mode]
237  */
238
239 /* 34xx I2C */
240 MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba,
241                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
242 MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc,
243                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
244 MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be,
245                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
246 MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0,
247                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
248 MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2,
249                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
250 MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4,
251                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
252 MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
253                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
254 MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
255                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
256
257 /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
258 MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
259                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
260 MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8,
261                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
262 MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec,
263                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
264 MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee,
265                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
266 MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc,
267                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
268 MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de,
269                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
270 MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0,
271                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
272 MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea,
273                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
274 MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4,
275                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
276 MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6,
277                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
278 MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8,
279                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
280 MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
281                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
282
283 /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
284 MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
285                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
286 MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
287                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
288 MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,
289                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
290 MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6,
291                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
292 MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8,
293                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
294 MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa,
295                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
296 MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4,
297                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
298 MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de,
299                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
300 MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8,
301                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
302 MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da,
303                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
304 MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc,
305                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
306 MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6,
307                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
308
309 /* TLL - HSUSB: 12-pin TLL Port 1*/
310 MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da,
311                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
312 MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8,
313                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
314 MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec,
315                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
316 MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee,
317                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
318 MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc,
319                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
320 MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de,
321                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
322 MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0,
323                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
324 MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea,
325                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
326 MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4,
327                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
328 MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6,
329                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
330 MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8,
331                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
332 MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2,
333                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
334
335 /* TLL - HSUSB: 12-pin TLL Port 2*/
336 MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0,
337                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
338 MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2,
339                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
340 MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4,
341                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
342 MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6,
343                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
344 MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8,
345                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
346 MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa,
347                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
348 MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4,
349                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
350 MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de,
351                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
352 MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8,
353                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
354 MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da,
355                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
356 MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc,
357                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
358 MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6,
359                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
360
361 /* TLL - HSUSB: 12-pin TLL Port 3*/
362 MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180,
363                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
364 MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166,
365                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP)
366 MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168,
367                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
368 MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a,
369                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
370 MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186,
371                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
372 MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184,
373                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
374 MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188,
375                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
376 MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a,
377                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
378 MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c,
379                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
380 MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e,
381                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
382 MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170,
383                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
384 MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172,
385                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
386
387 /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
388 MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8,
389                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
390 MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee,
391                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
392 MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc,
393                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
394 MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de,
395                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
396 MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0,
397                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
398 MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea,
399                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
400
401 /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
402 MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2,
403                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
404 MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6,
405                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
406 MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8,
407                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
408 MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa,
409                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
410 MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4,
411                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
412 MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de,
413                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
414
415 /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
416 MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166,
417                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
418 MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a,
419                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
420 MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186,
421                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
422 MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184,
423                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
424 MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
425                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
426 MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
427                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
428
429
430 /* 34XX GPIO - bidirectional, unless the name has an "_OUT" suffix.
431  * No internal pullup/pulldown without "_UP" or "_DOWN" suffix.
432  */
433 MUX_CFG_34XX("AH8_34XX_GPIO29", 0x5fa,
434                 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
435 MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
436                 OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
437 };
438
439 #define OMAP34XX_PINS_SZ        ARRAY_SIZE(omap34xx_pins)
440
441 #else
442 #define omap34xx_pins           NULL
443 #define OMAP34XX_PINS_SZ        0
444 #endif  /* CONFIG_ARCH_OMAP34XX */
445
446 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
447 static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
448 {
449         u16 orig;
450         u8 warn = 0, debug = 0;
451
452         if (cpu_is_omap24xx())
453                 orig = omap_ctrl_readb(cfg->mux_reg);
454         else
455                 orig = omap_ctrl_readw(cfg->mux_reg);
456
457 #ifdef  CONFIG_OMAP_MUX_DEBUG
458         debug = cfg->debug;
459 #endif
460         warn = (orig != reg);
461         if (debug || warn)
462                 printk(KERN_WARNING
463                         "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n",
464                         cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
465                         orig, reg);
466 }
467 #else
468 #define omap2_cfg_debug(x, y)   do {} while (0)
469 #endif
470
471 #ifdef CONFIG_ARCH_OMAP24XX
472 static int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
473 {
474         static DEFINE_SPINLOCK(mux_spin_lock);
475         unsigned long flags;
476         u8 reg = 0;
477
478         spin_lock_irqsave(&mux_spin_lock, flags);
479         reg |= cfg->mask & 0x7;
480         if (cfg->pull_val)
481                 reg |= OMAP2_PULL_ENA;
482         if (cfg->pu_pd_val)
483                 reg |= OMAP2_PULL_UP;
484         omap2_cfg_debug(cfg, reg);
485         omap_ctrl_writeb(reg, cfg->mux_reg);
486         spin_unlock_irqrestore(&mux_spin_lock, flags);
487
488         return 0;
489 }
490 #else
491 #define omap24xx_cfg_reg        NULL
492 #endif
493
494 #ifdef CONFIG_ARCH_OMAP34XX
495 static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
496 {
497         static DEFINE_SPINLOCK(mux_spin_lock);
498         unsigned long flags;
499         u16 reg = 0;
500
501         spin_lock_irqsave(&mux_spin_lock, flags);
502         reg |= cfg->mux_val;
503         omap2_cfg_debug(cfg, reg);
504         omap_ctrl_writew(reg, cfg->mux_reg);
505         spin_unlock_irqrestore(&mux_spin_lock, flags);
506
507         return 0;
508 }
509 #else
510 #define omap34xx_cfg_reg        NULL
511 #endif
512
513 int __init omap2_mux_init(void)
514 {
515         if (cpu_is_omap24xx()) {
516                 arch_mux_cfg.pins       = omap24xx_pins;
517                 arch_mux_cfg.size       = OMAP24XX_PINS_SZ;
518                 arch_mux_cfg.cfg_reg    = omap24xx_cfg_reg;
519         } else if (cpu_is_omap34xx()) {
520                 arch_mux_cfg.pins       = omap34xx_pins;
521                 arch_mux_cfg.size       = OMAP34XX_PINS_SZ;
522                 arch_mux_cfg.cfg_reg    = omap34xx_cfg_reg;
523         }
524
525         return omap_mux_register(&arch_mux_cfg);
526 }
527
528 #endif