arch/arm/mach-omap2/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19
  20 #include <mach/dma.h>
  21 #include <mach/mux.h>
  22 #include <mach/cpu.h>
  23 #include <mach/mcbsp.h>
  24
  25 const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
  26
  27 static void omap2_mcbsp2_mux_setup(void)
  28 {
  29         omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
  30         omap_cfg_reg(R14_24XX_MCBSP2_FSX);
  31         omap_cfg_reg(W15_24XX_MCBSP2_DR);
  32         omap_cfg_reg(V15_24XX_MCBSP2_DX);
  33         omap_cfg_reg(V14_24XX_GPIO117);
  34         /*
  35          * TODO: Need to add MUX settings for OMAP 2430 SDP
  36          */
  37 }
  38
  39 static void omap2_mcbsp_request(unsigned int id)
  40 {
  41         if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
  42                 omap2_mcbsp2_mux_setup();
  43 }
  44
  45 static struct omap_mcbsp_ops omap2_mcbsp_ops = {
  46         .request        = omap2_mcbsp_request,
  47 };
  48
  49 #ifdef CONFIG_ARCH_OMAP2420
  50 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
  51         {
  52                 .phys_base      = OMAP24XX_MCBSP1_BASE,
  53                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
  54                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
  55                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
  56                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
  57                 .ops            = &omap2_mcbsp_ops,
  58                 .clk_names      = clk_names,
  59                 .num_clks       = 2,
  60         },
  61         {
  62                 .phys_base      = OMAP24XX_MCBSP2_BASE,
  63                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
  64                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
  65                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
  66                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
  67                 .ops            = &omap2_mcbsp_ops,
  68                 .clk_names      = clk_names,
  69                 .num_clks       = 2,
  70         },
  71 };
  72 #define OMAP2420_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2420_mcbsp_pdata)
  73 #else
  74 #define omap2420_mcbsp_pdata            NULL
  75 #define OMAP2420_MCBSP_PDATA_SZ         0
  76 #endif
  77
  78 #ifdef CONFIG_ARCH_OMAP2430
  79 static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
  80         {
  81                 .phys_base      = OMAP24XX_MCBSP1_BASE,
  82                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
  83                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
  84                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
  85                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
  86                 .ops            = &omap2_mcbsp_ops,
  87                 .clk_names      = clk_names,
  88                 .num_clks       = 2,
  89         },
  90         {
  91                 .phys_base      = OMAP24XX_MCBSP2_BASE,
  92                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
  93                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
  94                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
  95                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
  96                 .ops            = &omap2_mcbsp_ops,
  97                 .clk_names      = clk_names,
  98                 .num_clks       = 2,
  99         },
 100         {
 101                 .phys_base      = OMAP2430_MCBSP3_BASE,
 102                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
 103                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
 104                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
 105                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
 106                 .ops            = &omap2_mcbsp_ops,
 107                 .clk_names      = clk_names,
 108                 .num_clks       = 2,
 109         },
 110         {
 111                 .phys_base      = OMAP2430_MCBSP4_BASE,
 112                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
 113                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
 114                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
 115                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
 116                 .ops            = &omap2_mcbsp_ops,
 117                 .clk_names      = clk_names,
 118                 .num_clks       = 2,
 119         },
 120         {
 121                 .phys_base      = OMAP2430_MCBSP5_BASE,
 122                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
 123                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 124                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
 125                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
 126                 .ops            = &omap2_mcbsp_ops,
 127                 .clk_names      = clk_names,
 128                 .num_clks       = 2,
 129         },
 130 };
 131 #define OMAP2430_MCBSP_PDATA_SZ         ARRAY_SIZE(omap2430_mcbsp_pdata)
 132 #else
 133 #define omap2430_mcbsp_pdata            NULL
 134 #define OMAP2430_MCBSP_PDATA_SZ         0
 135 #endif
 136
 137 #ifdef CONFIG_ARCH_OMAP34XX
 138 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 139         {
 140                 .phys_base      = OMAP34XX_MCBSP1_BASE,
 141                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP1_RX,
 142                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
 143                 .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
 144                 .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
 145                 .ops            = &omap2_mcbsp_ops,
 146                 .clk_names      = clk_names,
 147                 .num_clks       = 2,
 148         },
 149         {
 150                 .phys_base      = OMAP34XX_MCBSP2_BASE,
 151                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP2_RX,
 152                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
 153                 .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
 154                 .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
 155                 .ops            = &omap2_mcbsp_ops,
 156                 .clk_names      = clk_names,
 157                 .num_clks       = 2,
 158         },
 159         {
 160                 .phys_base      = OMAP34XX_MCBSP3_BASE,
 161                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP3_RX,
 162                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
 163                 .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
 164                 .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
 165                 .ops            = &omap2_mcbsp_ops,
 166                 .clk_names      = clk_names,
 167                 .num_clks       = 2,
 168         },
 169         {
 170                 .phys_base      = OMAP34XX_MCBSP4_BASE,
 171                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP4_RX,
 172                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
 173                 .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
 174                 .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
 175                 .ops            = &omap2_mcbsp_ops,
 176                 .clk_names      = clk_names,
 177                 .num_clks       = 2,
 178         },
 179         {
 180                 .phys_base      = OMAP34XX_MCBSP5_BASE,
 181                 .dma_rx_sync    = OMAP24XX_DMA_MCBSP5_RX,
 182                 .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
 183                 .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
 184                 .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
 185                 .ops            = &omap2_mcbsp_ops,
 186                 .clk_names      = clk_names,
 187                 .num_clks       = 2,
 188         },
 189 };
 190 #define OMAP34XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap34xx_mcbsp_pdata)
 191 #else
 192 #define omap34xx_mcbsp_pdata            NULL
 193 #define OMAP34XX_MCBSP_PDATA_SZ         0
 194 #endif
 195
 196 static int __init omap2_mcbsp_init(void)
 197 {
 198         if (cpu_is_omap2420())
 199                 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
 200         if (cpu_is_omap2430())
 201                 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ;
 202         if (cpu_is_omap34xx())
 203                 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ;
 204
 205         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
 206                                                                 GFP_KERNEL);
 207         if (!mcbsp_ptr)
 208                 return -ENOMEM;
 209
 210         if (cpu_is_omap2420())
 211                 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata,
 212                                                 OMAP2420_MCBSP_PDATA_SZ);
 213         if (cpu_is_omap2430())
 214                 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata,
 215                                                 OMAP2430_MCBSP_PDATA_SZ);
 216         if (cpu_is_omap34xx())
 217                 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata,
 218                                                 OMAP34XX_MCBSP_PDATA_SZ);
 219
 220         return omap_mcbsp_init();
 221 }
 222 arch_initcall(omap2_mcbsp_init);