2 * linux/arch/arm/mach-omap2/id.c
4 * OMAP2 CPU identification code
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
19 #include <asm/cputype.h>
21 #include <mach/common.h>
22 #include <mach/control.h>
25 static struct omap_chip_id omap_chip;
26 static unsigned int omap_revision;
29 unsigned int omap_rev(void)
33 EXPORT_SYMBOL(omap_rev);
36 * omap_chip_is - test whether currently running OMAP matches a chip type
37 * @oc: omap_chip_t to test against
39 * Test whether the currently-running OMAP chip matches the supplied
40 * chip type 'oc'. Returns 1 upon a match; 0 upon failure.
42 int omap_chip_is(struct omap_chip_id oci)
44 return (oci.oc & omap_chip.oc) ? 1 : 0;
46 EXPORT_SYMBOL(omap_chip_is);
52 if (cpu_is_omap24xx()) {
53 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
54 } else if (cpu_is_omap34xx()) {
55 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
57 pr_err("Cannot detect omap type!\n");
61 val &= OMAP2_DEVICETYPE_MASK;
67 EXPORT_SYMBOL(omap_type);
70 /*----------------------------------------------------------------------------*/
72 #define OMAP_TAP_IDCODE 0x0204
73 #define OMAP_TAP_DIE_ID_0 0x0218
74 #define OMAP_TAP_DIE_ID_1 0x021C
75 #define OMAP_TAP_DIE_ID_2 0x0220
76 #define OMAP_TAP_DIE_ID_3 0x0224
78 #define read_tap_reg(reg) __raw_readl(tap_base + (reg))
81 u16 hawkeye; /* Silicon type (Hawkeye id) */
82 u8 dev; /* Device type from production_id reg */
83 u32 type; /* Combined type id copied to omap_revision */
86 /* Register values to detect the OMAP version */
87 static struct omap_id omap_ids[] __initdata = {
88 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
89 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
90 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
91 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
92 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
93 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
96 static void __iomem *tap_base;
97 static u16 tap_prod_id;
99 void __init omap24xx_check_revision(void)
106 idcode = read_tap_reg(OMAP_TAP_IDCODE);
107 prod_id = read_tap_reg(tap_prod_id);
108 hawkeye = (idcode >> 12) & 0xffff;
109 rev = (idcode >> 28) & 0x0f;
110 dev_type = (prod_id >> 16) & 0x0f;
112 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
113 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
114 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
115 read_tap_reg(OMAP_TAP_DIE_ID_0));
116 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
117 read_tap_reg(OMAP_TAP_DIE_ID_1),
118 (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
119 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
120 read_tap_reg(OMAP_TAP_DIE_ID_2));
121 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
122 read_tap_reg(OMAP_TAP_DIE_ID_3));
123 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
126 /* Check hawkeye ids */
127 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
128 if (hawkeye == omap_ids[i].hawkeye)
132 if (i == ARRAY_SIZE(omap_ids)) {
133 printk(KERN_ERR "Unknown OMAP CPU id\n");
137 for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
138 if (dev_type == omap_ids[j].dev)
142 if (j == ARRAY_SIZE(omap_ids)) {
143 printk(KERN_ERR "Unknown OMAP device type. "
144 "Handling it as OMAP%04x\n",
145 omap_ids[i].type >> 16);
149 pr_info("OMAP%04x", omap_rev() >> 16);
150 if ((omap_rev() >> 8) & 0x0f)
151 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
155 void __init omap34xx_check_revision(void)
160 char *rev_name = "ES1.0";
163 * We cannot access revision registers on ES1.0.
164 * If the processor type is Cortex-A8 and the revision is 0x0
165 * it means its Cortex r0p0 which is 3430 ES1.0.
167 cpuid = read_cpuid(CPUID_ID);
168 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
169 omap_revision = OMAP3430_REV_ES1_0;
174 * Detection for 34xx ES2.0 and above can be done with just
175 * hawkeye and rev. See TRM 1.5.2 Device Identification.
176 * Note that rev does not map directly to our defined processor
177 * revision numbers as ES1.0 uses value 0.
179 idcode = read_tap_reg(OMAP_TAP_IDCODE);
180 hawkeye = (idcode >> 12) & 0xffff;
181 rev = (idcode >> 28) & 0xff;
183 if (hawkeye == 0xb7ae) {
186 omap_revision = OMAP3430_REV_ES2_0;
190 omap_revision = OMAP3430_REV_ES2_1;
194 omap_revision = OMAP3430_REV_ES3_0;
198 omap_revision = OMAP3430_REV_ES3_1;
202 /* Use the latest known revision as default */
203 omap_revision = OMAP3430_REV_ES3_1;
204 rev_name = "Unknown revision\n";
209 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
213 * Try to detect the exact revision of the omap we're running on
215 void __init omap2_check_revision(void)
218 * At this point we have an idea about the processor revision set
219 * earlier with omap2_set_globals_tap().
221 if (cpu_is_omap24xx())
222 omap24xx_check_revision();
223 else if (cpu_is_omap34xx())
224 omap34xx_check_revision();
226 pr_err("OMAP revision unknown, please fix!\n");
229 * OK, now we know the exact revision. Initialize omap_chip bits
230 * for powerdowmain and clockdomain code.
232 if (cpu_is_omap243x()) {
233 /* Currently only supports 2430ES2.1 and 2430-all */
234 omap_chip.oc |= CHIP_IS_OMAP2430;
235 } else if (cpu_is_omap242x()) {
236 /* Currently only supports 2420ES2.1.1 and 2420-all */
237 omap_chip.oc |= CHIP_IS_OMAP2420;
238 } else if (cpu_is_omap343x()) {
239 omap_chip.oc = CHIP_IS_OMAP3430;
240 if (omap_rev() == OMAP3430_REV_ES1_0)
241 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
242 else if (omap_rev() > OMAP3430_REV_ES1_0)
243 omap_chip.oc |= CHIP_IS_OMAP3430ES2;
245 pr_err("Uninitialized omap_chip, please fix!\n");
250 * Set up things for map_io and processor detection later on. Gets called
251 * pretty much first thing from board init. For multi-omap, this gets
252 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
253 * detect the exact revision later on in omap2_detect_revision() once map_io
256 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
258 omap_revision = omap2_globals->class;
259 tap_base = omap2_globals->tap;
261 if (cpu_is_omap34xx())
262 tap_prod_id = 0x0210;
264 tap_prod_id = 0x0208;