arch/arm/mach-omap2/devices.c

   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/io.h>
  17 #include <linux/clk.h>
  18
  19 #include <mach/hardware.h>
  20 #include <asm/mach-types.h>
  21 #include <asm/mach/map.h>
  22
  23 #include <mach/control.h>
  24 #include <mach/tc.h>
  25 #include <mach/board.h>
  26 #include <mach/mux.h>
  27 #include <mach/gpio.h>
  28 #include <mach/eac.h>
  29 #include <mach/mmc.h>
  30
  31 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  32
  33 static struct resource cam_resources[] = {
  34         {
  35                 .start          = OMAP24XX_CAMERA_BASE,
  36                 .end            = OMAP24XX_CAMERA_BASE + 0xfff,
  37                 .flags          = IORESOURCE_MEM,
  38         },
  39         {
  40                 .start          = INT_24XX_CAM_IRQ,
  41                 .flags          = IORESOURCE_IRQ,
  42         }
  43 };
  44
  45 static struct platform_device omap_cam_device = {
  46         .name           = "omap24xxcam",
  47         .id             = -1,
  48         .num_resources  = ARRAY_SIZE(cam_resources),
  49         .resource       = cam_resources,
  50 };
  51
  52 static inline void omap_init_camera(void)
  53 {
  54         platform_device_register(&omap_cam_device);
  55 }
  56
  57 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  58
  59 static struct resource omap3isp_resources[] = {
  60         {
  61                 .start          = OMAP3430_ISP_BASE,
  62                 .end            = OMAP3430_ISP_END,
  63                 .flags          = IORESOURCE_MEM,
  64         },
  65         {
  66                 .start          = OMAP3430_ISP_CBUFF_BASE,
  67                 .end            = OMAP3430_ISP_CBUFF_END,
  68                 .flags          = IORESOURCE_MEM,
  69         },
  70         {
  71                 .start          = OMAP3430_ISP_CCP2_BASE,
  72                 .end            = OMAP3430_ISP_CCP2_END,
  73                 .flags          = IORESOURCE_MEM,
  74         },
  75         {
  76                 .start          = OMAP3430_ISP_CCDC_BASE,
  77                 .end            = OMAP3430_ISP_CCDC_END,
  78                 .flags          = IORESOURCE_MEM,
  79         },
  80         {
  81                 .start          = OMAP3430_ISP_HIST_BASE,
  82                 .end            = OMAP3430_ISP_HIST_END,
  83                 .flags          = IORESOURCE_MEM,
  84         },
  85         {
  86                 .start          = OMAP3430_ISP_H3A_BASE,
  87                 .end            = OMAP3430_ISP_H3A_END,
  88                 .flags          = IORESOURCE_MEM,
  89         },
  90         {
  91                 .start          = OMAP3430_ISP_PREV_BASE,
  92                 .end            = OMAP3430_ISP_PREV_END,
  93                 .flags          = IORESOURCE_MEM,
  94         },
  95         {
  96                 .start          = OMAP3430_ISP_RESZ_BASE,
  97                 .end            = OMAP3430_ISP_RESZ_END,
  98                 .flags          = IORESOURCE_MEM,
  99         },
 100         {
 101                 .start          = OMAP3430_ISP_SBL_BASE,
 102                 .end            = OMAP3430_ISP_SBL_END,
 103                 .flags          = IORESOURCE_MEM,
 104         },
 105         {
 106                 .start          = OMAP3430_ISP_CSI2A_BASE,
 107                 .end            = OMAP3430_ISP_CSI2A_END,
 108                 .flags          = IORESOURCE_MEM,
 109         },
 110         {
 111                 .start          = OMAP3430_ISP_CSI2PHY_BASE,
 112                 .end            = OMAP3430_ISP_CSI2PHY_END,
 113                 .flags          = IORESOURCE_MEM,
 114         },
 115         {
 116                 .start          = INT_34XX_CAM_IRQ,
 117                 .flags          = IORESOURCE_IRQ,
 118         }
 119 };
 120
 121 static struct platform_device omap3isp_device = {
 122         .name           = "omap3isp",
 123         .id             = -1,
 124         .num_resources  = ARRAY_SIZE(omap3isp_resources),
 125         .resource       = omap3isp_resources,
 126 };
 127
 128 static inline void omap_init_camera(void)
 129 {
 130         platform_device_register(&omap3isp_device);
 131 }
 132 #else
 133 static inline void omap_init_camera(void)
 134 {
 135 }
 136 #endif
 137
 138 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
 139
 140 #define MBOX_REG_SIZE   0x120
 141
 142 static struct resource omap2_mbox_resources[] = {
 143         {
 144                 .start          = OMAP24XX_MAILBOX_BASE,
 145                 .end            = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 146                 .flags          = IORESOURCE_MEM,
 147         },
 148         {
 149                 .start          = INT_24XX_MAIL_U0_MPU,
 150                 .flags          = IORESOURCE_IRQ,
 151         },
 152         {
 153                 .start          = INT_24XX_MAIL_U3_MPU,
 154                 .flags          = IORESOURCE_IRQ,
 155         },
 156 };
 157
 158 static struct resource omap3_mbox_resources[] = {
 159         {
 160                 .start          = OMAP34XX_MAILBOX_BASE,
 161                 .end            = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 162                 .flags          = IORESOURCE_MEM,
 163         },
 164         {
 165                 .start          = INT_24XX_MAIL_U0_MPU,
 166                 .flags          = IORESOURCE_IRQ,
 167         },
 168 };
 169
 170 static struct platform_device mbox_device = {
 171         .name           = "omap2-mailbox",
 172         .id             = -1,
 173 };
 174
 175 static inline void omap_init_mbox(void)
 176 {
 177         if (cpu_is_omap2420()) {
 178                 mbox_device.num_resources = ARRAY_SIZE(omap2_mbox_resources);
 179                 mbox_device.resource = omap2_mbox_resources;
 180         } else if (cpu_is_omap3430()) {
 181                 mbox_device.num_resources = ARRAY_SIZE(omap3_mbox_resources);
 182                 mbox_device.resource = omap3_mbox_resources;
 183         } else {
 184                 pr_err("%s: platform not supported\n", __func__);
 185                 return;
 186         }
 187         platform_device_register(&mbox_device);
 188 }
 189 #else
 190 static inline void omap_init_mbox(void) { }
 191 #endif /* CONFIG_OMAP_MBOX_FWK */
 192
 193 #if defined(CONFIG_OMAP_STI)
 194
 195 #if defined(CONFIG_ARCH_OMAP2)
 196
 197 #define OMAP2_STI_BASE          0x48068000
 198 #define OMAP2_STI_CHANNEL_BASE  0x54000000
 199 #define OMAP2_STI_IRQ           4
 200
 201 static struct resource sti_resources[] = {
 202         {
 203                 .start          = OMAP2_STI_BASE,
 204                 .end            = OMAP2_STI_BASE + 0x7ff,
 205                 .flags          = IORESOURCE_MEM,
 206         },
 207         {
 208                 .start          = OMAP2_STI_CHANNEL_BASE,
 209                 .end            = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
 210                 .flags          = IORESOURCE_MEM,
 211         },
 212         {
 213                 .start          = OMAP2_STI_IRQ,
 214                 .flags          = IORESOURCE_IRQ,
 215         }
 216 };
 217 #elif defined(CONFIG_ARCH_OMAP3)
 218
 219 #define OMAP3_SDTI_BASE         0x54500000
 220 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
 221
 222 static struct resource sti_resources[] = {
 223         {
 224                 .start          = OMAP3_SDTI_BASE,
 225                 .end            = OMAP3_SDTI_BASE + 0xFFF,
 226                 .flags          = IORESOURCE_MEM,
 227         },
 228         {
 229                 .start          = OMAP3_SDTI_CHANNEL_BASE,
 230                 .end            = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
 231                 .flags          = IORESOURCE_MEM,
 232         }
 233 };
 234
 235 #endif
 236
 237 static struct platform_device sti_device = {
 238         .name           = "sti",
 239         .id             = -1,
 240         .num_resources  = ARRAY_SIZE(sti_resources),
 241         .resource       = sti_resources,
 242 };
 243
 244 static inline void omap_init_sti(void)
 245 {
 246         platform_device_register(&sti_device);
 247 }
 248 #else
 249 static inline void omap_init_sti(void) {}
 250 #endif
 251
 252 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 253
 254 #include <mach/mcspi.h>
 255
 256 #define OMAP2_MCSPI1_BASE               0x48098000
 257 #define OMAP2_MCSPI2_BASE               0x4809a000
 258 #define OMAP2_MCSPI3_BASE               0x480b8000
 259 #define OMAP2_MCSPI4_BASE               0x480ba000
 260
 261 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 262         .num_cs         = 4,
 263 };
 264
 265 static struct resource omap2_mcspi1_resources[] = {
 266         {
 267                 .start          = OMAP2_MCSPI1_BASE,
 268                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 269                 .flags          = IORESOURCE_MEM,
 270         },
 271 };
 272
 273 static struct platform_device omap2_mcspi1 = {
 274         .name           = "omap2_mcspi",
 275         .id             = 1,
 276         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 277         .resource       = omap2_mcspi1_resources,
 278         .dev            = {
 279                 .platform_data = &omap2_mcspi1_config,
 280         },
 281 };
 282
 283 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 284         .num_cs         = 2,
 285 };
 286
 287 static struct resource omap2_mcspi2_resources[] = {
 288         {
 289                 .start          = OMAP2_MCSPI2_BASE,
 290                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 291                 .flags          = IORESOURCE_MEM,
 292         },
 293 };
 294
 295 static struct platform_device omap2_mcspi2 = {
 296         .name           = "omap2_mcspi",
 297         .id             = 2,
 298         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 299         .resource       = omap2_mcspi2_resources,
 300         .dev            = {
 301                 .platform_data = &omap2_mcspi2_config,
 302         },
 303 };
 304
 305 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
 306 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 307         .num_cs         = 2,
 308 };
 309
 310 static struct resource omap2_mcspi3_resources[] = {
 311         {
 312         .start          = OMAP2_MCSPI3_BASE,
 313         .end            = OMAP2_MCSPI3_BASE + 0xff,
 314         .flags          = IORESOURCE_MEM,
 315         },
 316 };
 317
 318 static struct platform_device omap2_mcspi3 = {
 319         .name           = "omap2_mcspi",
 320         .id             = 3,
 321         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 322         .resource       = omap2_mcspi3_resources,
 323         .dev            = {
 324                 .platform_data = &omap2_mcspi3_config,
 325         },
 326 };
 327 #endif
 328
 329 #ifdef CONFIG_ARCH_OMAP3
 330 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 331         .num_cs         = 1,
 332 };
 333
 334 static struct resource omap2_mcspi4_resources[] = {
 335         {
 336                 .start          = OMAP2_MCSPI4_BASE,
 337                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 338                 .flags          = IORESOURCE_MEM,
 339         },
 340 };
 341
 342 static struct platform_device omap2_mcspi4 = {
 343         .name           = "omap2_mcspi",
 344         .id             = 4,
 345         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 346         .resource       = omap2_mcspi4_resources,
 347         .dev            = {
 348                 .platform_data = &omap2_mcspi4_config,
 349         },
 350 };
 351 #endif
 352
 353 static void omap_init_mcspi(void)
 354 {
 355         platform_device_register(&omap2_mcspi1);
 356         platform_device_register(&omap2_mcspi2);
 357 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
 358         if (cpu_is_omap2430() || cpu_is_omap343x())
 359                 platform_device_register(&omap2_mcspi3);
 360 #endif
 361 #ifdef CONFIG_ARCH_OMAP3
 362         if (cpu_is_omap343x())
 363                 platform_device_register(&omap2_mcspi4);
 364 #endif
 365 }
 366
 367 #else
 368 static inline void omap_init_mcspi(void) {}
 369 #endif
 370
 371 #ifdef CONFIG_SND_OMAP24XX_EAC
 372
 373 #define OMAP2_EAC_BASE                  0x48090000
 374
 375 static struct resource omap2_eac_resources[] = {
 376         {
 377                 .start          = OMAP2_EAC_BASE,
 378                 .end            = OMAP2_EAC_BASE + 0x109,
 379                 .flags          = IORESOURCE_MEM,
 380         },
 381 };
 382
 383 static struct platform_device omap2_eac_device = {
 384         .name           = "omap24xx-eac",
 385         .id             = -1,
 386         .num_resources  = ARRAY_SIZE(omap2_eac_resources),
 387         .resource       = omap2_eac_resources,
 388         .dev = {
 389                 .platform_data = NULL,
 390         },
 391 };
 392
 393 void omap_init_eac(struct eac_platform_data *pdata)
 394 {
 395         omap2_eac_device.dev.platform_data = pdata;
 396         platform_device_register(&omap2_eac_device);
 397 }
 398
 399 #else
 400 void omap_init_eac(struct eac_platform_data *pdata) {}
 401 #endif
 402
 403 #ifdef CONFIG_OMAP_SHA1_MD5
 404 static struct resource sha1_md5_resources[] = {
 405         {
 406                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 407                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 408                 .flags  = IORESOURCE_MEM,
 409         },
 410         {
 411                 .start  = INT_24XX_SHA1MD5,
 412                 .flags  = IORESOURCE_IRQ,
 413         }
 414 };
 415
 416 static struct platform_device sha1_md5_device = {
 417         .name           = "OMAP SHA1/MD5",
 418         .id             = -1,
 419         .num_resources  = ARRAY_SIZE(sha1_md5_resources),
 420         .resource       = sha1_md5_resources,
 421 };
 422
 423 static void omap_init_sha1_md5(void)
 424 {
 425         platform_device_register(&sha1_md5_device);
 426 }
 427 #else
 428 static inline void omap_init_sha1_md5(void) { }
 429 #endif
 430
 431 /*-------------------------------------------------------------------------*/
 432
 433 #ifdef CONFIG_ARCH_OMAP3
 434
 435 #define MMCHS_SYSCONFIG                 0x0010
 436 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 437 #define MMCHS_SYSSTATUS                 0x0014
 438 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 439
 440 static struct platform_device dummy_pdev = {
 441         .dev = {
 442                 .bus = &platform_bus_type,
 443         },
 444 };
 445
 446 /**
 447  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 448  *
 449  * Ensure that each MMC controller is fully reset.  Controllers
 450  * left in an unknown state (by bootloader) may prevent retention
 451  * or OFF-mode.  This is especially important in cases where the
 452  * MMC driver is not enabled, _or_ built as a module.
 453  *
 454  * In order for reset to work, interface, functional and debounce
 455  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 456  * and is not under SW control, so we only enable i- and f-clocks.
 457  **/
 458 static void __init omap_hsmmc_reset(void)
 459 {
 460         u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
 461                 OMAP24XX_NR_MMC;
 462
 463         for (i = 0; i < nr_controllers; i++) {
 464                 u32 v, base = 0;
 465                 struct clk *iclk, *fclk;
 466                 struct device *dev = &dummy_pdev.dev;
 467
 468                 switch (i) {
 469                 case 0:
 470                         base = OMAP2_MMC1_BASE;
 471                         break;
 472                 case 1:
 473                         base = OMAP2_MMC2_BASE;
 474                         break;
 475                 case 2:
 476                         base = OMAP3_MMC3_BASE;
 477                         break;
 478                 }
 479
 480                 dummy_pdev.id = i;
 481                 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
 482                 iclk = clk_get(dev, "ick");
 483                 if (iclk && clk_enable(iclk))
 484                         iclk = NULL;
 485
 486                 fclk = clk_get(dev, "fck");
 487                 if (fclk && clk_enable(fclk))
 488                         fclk = NULL;
 489
 490                 if (!iclk || !fclk) {
 491                         printk(KERN_WARNING
 492                                "%s: Unable to enable clocks for MMC%d, "
 493                                "cannot reset.\n",  __func__, i);
 494                         break;
 495                 }
 496
 497                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 498                 v = omap_readl(base + MMCHS_SYSSTATUS);
 499                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 500                          MMCHS_SYSSTATUS_RESETDONE))
 501                         cpu_relax();
 502
 503                 if (fclk) {
 504                         clk_disable(fclk);
 505                         clk_put(fclk);
 506                 }
 507                 if (iclk) {
 508                         clk_disable(iclk);
 509                         clk_put(iclk);
 510                 }
 511         }
 512 }
 513 #else
 514 static inline void omap_hsmmc_reset(void) {}
 515 #endif
 516
 517 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 518         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 519
 520 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 521                         int controller_nr)
 522 {
 523         if (cpu_is_omap2420() && controller_nr == 0) {
 524                 omap_cfg_reg(H18_24XX_MMC_CMD);
 525                 omap_cfg_reg(H15_24XX_MMC_CLKI);
 526                 omap_cfg_reg(G19_24XX_MMC_CLKO);
 527                 omap_cfg_reg(F20_24XX_MMC_DAT0);
 528                 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
 529                 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
 530                 if (mmc_controller->slots[0].wires == 4) {
 531                         omap_cfg_reg(H14_24XX_MMC_DAT1);
 532                         omap_cfg_reg(E19_24XX_MMC_DAT2);
 533                         omap_cfg_reg(D19_24XX_MMC_DAT3);
 534                         omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
 535                         omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
 536                         omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
 537                 }
 538
 539                 /*
 540                  * Use internal loop-back in MMC/SDIO Module Input Clock
 541                  * selection
 542                  */
 543                 if (mmc_controller->slots[0].internal_clock) {
 544                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 545                         v |= (1 << 24);
 546                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 547                 }
 548         }
 549 }
 550
 551 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 552                         int nr_controllers)
 553 {
 554         int i;
 555         char *name;
 556
 557         for (i = 0; i < nr_controllers; i++) {
 558                 unsigned long base, size;
 559                 unsigned int irq = 0;
 560
 561                 if (!mmc_data[i])
 562                         continue;
 563
 564                 omap2_mmc_mux(mmc_data[i], i);
 565
 566                 switch (i) {
 567                 case 0:
 568                         base = OMAP2_MMC1_BASE;
 569                         irq = INT_24XX_MMC_IRQ;
 570                         break;
 571                 case 1:
 572                         base = OMAP2_MMC2_BASE;
 573                         irq = INT_24XX_MMC2_IRQ;
 574                         break;
 575                 case 2:
 576                         if (!cpu_is_omap34xx())
 577                                 return;
 578                         base = OMAP3_MMC3_BASE;
 579                         irq = INT_34XX_MMC3_IRQ;
 580                         break;
 581                 default:
 582                         continue;
 583                 }
 584
 585                 if (cpu_is_omap2420()) {
 586                         size = OMAP2420_MMC_SIZE;
 587                         name = "mmci-omap";
 588                 } else {
 589                         size = HSMMC_SIZE;
 590                         name = "mmci-omap-hs";
 591                 }
 592                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 593         };
 594 }
 595
 596 #endif
 597
 598 /*-------------------------------------------------------------------------*/
 599
 600 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 601 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 602 #define OMAP_HDQ_BASE   0x480B2000
 603 #endif
 604 static struct resource omap_hdq_resources[] = {
 605         {
 606                 .start          = OMAP_HDQ_BASE,
 607                 .end            = OMAP_HDQ_BASE + 0x1C,
 608                 .flags          = IORESOURCE_MEM,
 609         },
 610         {
 611                 .start          = INT_24XX_HDQ_IRQ,
 612                 .flags          = IORESOURCE_IRQ,
 613         },
 614 };
 615 static struct platform_device omap_hdq_dev = {
 616         .name = "omap_hdq",
 617         .id = 0,
 618         .dev = {
 619                 .platform_data = NULL,
 620         },
 621         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 622         .resource       = omap_hdq_resources,
 623 };
 624 static inline void omap_hdq_init(void)
 625 {
 626         (void) platform_device_register(&omap_hdq_dev);
 627 }
 628 #else
 629 static inline void omap_hdq_init(void) {}
 630 #endif
 631
 632 /*-------------------------------------------------------------------------*/
 633
 634 static int __init omap2_init_devices(void)
 635 {
 636         /* please keep these calls, and their implementations above,
 637          * in alphabetical order so they're easier to sort through.
 638          */
 639         omap_hsmmc_reset();
 640         omap_init_camera();
 641         omap_init_mbox();
 642         omap_init_mcspi();
 643         omap_hdq_init();
 644         omap_init_sti();
 645         omap_init_sha1_md5();
 646
 647         return 0;
 648 }
 649 arch_initcall(omap2_init_devices);