arch/arm/mach-omap2/devices.c

   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/io.h>
  17 #include <linux/clk.h>
  18
  19 #include <mach/hardware.h>
  20 #include <asm/mach-types.h>
  21 #include <asm/mach/map.h>
  22
  23 #include <mach/control.h>
  24 #include <mach/tc.h>
  25 #include <mach/board.h>
  26 #include <mach/mux.h>
  27 #include <mach/gpio.h>
  28 #include <mach/eac.h>
  29 #include <mach/mmc.h>
  30
  31 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  32
  33 static struct resource cam_resources[] = {
  34         {
  35                 .start          = OMAP24XX_CAMERA_BASE,
  36                 .end            = OMAP24XX_CAMERA_BASE + 0xfff,
  37                 .flags          = IORESOURCE_MEM,
  38         },
  39         {
  40                 .start          = INT_24XX_CAM_IRQ,
  41                 .flags          = IORESOURCE_IRQ,
  42         }
  43 };
  44
  45 static struct platform_device omap_cam_device = {
  46         .name           = "omap24xxcam",
  47         .id             = -1,
  48         .num_resources  = ARRAY_SIZE(cam_resources),
  49         .resource       = cam_resources,
  50 };
  51
  52 static inline void omap_init_camera(void)
  53 {
  54         platform_device_register(&omap_cam_device);
  55 }
  56
  57 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  58
  59 static struct resource cam_resources[] = {
  60         {
  61                 .start          = OMAP34XX_CAMERA_BASE,
  62                 .end            = OMAP34XX_CAMERA_BASE + 0x1B70,
  63                 .flags          = IORESOURCE_MEM,
  64         },
  65         {
  66                 .start          = INT_34XX_CAM_IRQ,
  67                 .flags          = IORESOURCE_IRQ,
  68         }
  69 };
  70
  71 static struct platform_device omap_cam_device = {
  72         .name           = "omap34xxcam",
  73         .id             = -1,
  74         .num_resources  = ARRAY_SIZE(cam_resources),
  75         .resource       = cam_resources,
  76 };
  77
  78 static inline void omap_init_camera(void)
  79 {
  80         platform_device_register(&omap_cam_device);
  81 }
  82 #else
  83 static inline void omap_init_camera(void)
  84 {
  85 }
  86 #endif
  87
  88 #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
  89 #define OMAP2_MBOX_BASE         IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
  90
  91 static struct resource mbox_resources[] = {
  92         {
  93                 .start          = OMAP2_MBOX_BASE,
  94                 .end            = OMAP2_MBOX_BASE + 0x11f,
  95                 .flags          = IORESOURCE_MEM,
  96         },
  97         {
  98                 .start          = INT_24XX_MAIL_U0_MPU,
  99                 .flags          = IORESOURCE_IRQ,
 100         },
 101         {
 102                 .start          = INT_24XX_MAIL_U3_MPU,
 103                 .flags          = IORESOURCE_IRQ,
 104         },
 105 };
 106
 107 static struct platform_device mbox_device = {
 108         .name           = "mailbox",
 109         .id             = -1,
 110         .num_resources  = ARRAY_SIZE(mbox_resources),
 111         .resource       = mbox_resources,
 112 };
 113
 114 static inline void omap_init_mbox(void)
 115 {
 116         platform_device_register(&mbox_device);
 117 }
 118 #else
 119 static inline void omap_init_mbox(void) { }
 120 #endif
 121
 122 #if defined(CONFIG_OMAP_STI)
 123
 124 #if defined(CONFIG_ARCH_OMAP2)
 125
 126 #define OMAP2_STI_BASE          0x48068000
 127 #define OMAP2_STI_CHANNEL_BASE  0x54000000
 128 #define OMAP2_STI_IRQ           4
 129
 130 static struct resource sti_resources[] = {
 131         {
 132                 .start          = OMAP2_STI_BASE,
 133                 .end            = OMAP2_STI_BASE + 0x7ff,
 134                 .flags          = IORESOURCE_MEM,
 135         },
 136         {
 137                 .start          = OMAP2_STI_CHANNEL_BASE,
 138                 .end            = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
 139                 .flags          = IORESOURCE_MEM,
 140         },
 141         {
 142                 .start          = OMAP2_STI_IRQ,
 143                 .flags          = IORESOURCE_IRQ,
 144         }
 145 };
 146 #elif defined(CONFIG_ARCH_OMAP3)
 147
 148 #define OMAP3_SDTI_BASE         0x54500000
 149 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
 150
 151 static struct resource sti_resources[] = {
 152         {
 153                 .start          = OMAP3_SDTI_BASE,
 154                 .end            = OMAP3_SDTI_BASE + 0xFFF,
 155                 .flags          = IORESOURCE_MEM,
 156         },
 157         {
 158                 .start          = OMAP3_SDTI_CHANNEL_BASE,
 159                 .end            = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
 160                 .flags          = IORESOURCE_MEM,
 161         }
 162 };
 163
 164 #endif
 165
 166 static struct platform_device sti_device = {
 167         .name           = "sti",
 168         .id             = -1,
 169         .num_resources  = ARRAY_SIZE(sti_resources),
 170         .resource       = sti_resources,
 171 };
 172
 173 static inline void omap_init_sti(void)
 174 {
 175         platform_device_register(&sti_device);
 176 }
 177 #else
 178 static inline void omap_init_sti(void) {}
 179 #endif
 180
 181 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 182
 183 #include <mach/mcspi.h>
 184
 185 #define OMAP2_MCSPI1_BASE               0x48098000
 186 #define OMAP2_MCSPI2_BASE               0x4809a000
 187 #define OMAP2_MCSPI3_BASE               0x480b8000
 188 #define OMAP2_MCSPI4_BASE               0x480ba000
 189
 190 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 191         .num_cs         = 4,
 192 };
 193
 194 static struct resource omap2_mcspi1_resources[] = {
 195         {
 196                 .start          = OMAP2_MCSPI1_BASE,
 197                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 198                 .flags          = IORESOURCE_MEM,
 199         },
 200 };
 201
 202 static struct platform_device omap2_mcspi1 = {
 203         .name           = "omap2_mcspi",
 204         .id             = 1,
 205         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 206         .resource       = omap2_mcspi1_resources,
 207         .dev            = {
 208                 .platform_data = &omap2_mcspi1_config,
 209         },
 210 };
 211
 212 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 213         .num_cs         = 2,
 214 };
 215
 216 static struct resource omap2_mcspi2_resources[] = {
 217         {
 218                 .start          = OMAP2_MCSPI2_BASE,
 219                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 220                 .flags          = IORESOURCE_MEM,
 221         },
 222 };
 223
 224 static struct platform_device omap2_mcspi2 = {
 225         .name           = "omap2_mcspi",
 226         .id             = 2,
 227         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 228         .resource       = omap2_mcspi2_resources,
 229         .dev            = {
 230                 .platform_data = &omap2_mcspi2_config,
 231         },
 232 };
 233
 234 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
 235 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 236         .num_cs         = 2,
 237 };
 238
 239 static struct resource omap2_mcspi3_resources[] = {
 240         {
 241         .start          = OMAP2_MCSPI3_BASE,
 242         .end            = OMAP2_MCSPI3_BASE + 0xff,
 243         .flags          = IORESOURCE_MEM,
 244         },
 245 };
 246
 247 static struct platform_device omap2_mcspi3 = {
 248         .name           = "omap2_mcspi",
 249         .id             = 3,
 250         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 251         .resource       = omap2_mcspi3_resources,
 252         .dev            = {
 253                 .platform_data = &omap2_mcspi3_config,
 254         },
 255 };
 256 #endif
 257
 258 #ifdef CONFIG_ARCH_OMAP3
 259 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 260         .num_cs         = 1,
 261 };
 262
 263 static struct resource omap2_mcspi4_resources[] = {
 264         {
 265                 .start          = OMAP2_MCSPI4_BASE,
 266                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 267                 .flags          = IORESOURCE_MEM,
 268         },
 269 };
 270
 271 static struct platform_device omap2_mcspi4 = {
 272         .name           = "omap2_mcspi",
 273         .id             = 4,
 274         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 275         .resource       = omap2_mcspi4_resources,
 276         .dev            = {
 277                 .platform_data = &omap2_mcspi4_config,
 278         },
 279 };
 280 #endif
 281
 282 static void omap_init_mcspi(void)
 283 {
 284         platform_device_register(&omap2_mcspi1);
 285         platform_device_register(&omap2_mcspi2);
 286 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
 287         if (cpu_is_omap2430() || cpu_is_omap343x())
 288                 platform_device_register(&omap2_mcspi3);
 289 #endif
 290 #ifdef CONFIG_ARCH_OMAP3
 291         if (cpu_is_omap343x())
 292                 platform_device_register(&omap2_mcspi4);
 293 #endif
 294 }
 295
 296 #else
 297 static inline void omap_init_mcspi(void) {}
 298 #endif
 299
 300 #ifdef CONFIG_SND_OMAP24XX_EAC
 301
 302 #define OMAP2_EAC_BASE                  (L4_24XX_BASE + 0x90000)
 303
 304 static struct resource omap2_eac_resources[] = {
 305         {
 306                 .start          = OMAP2_EAC_BASE,
 307                 .end            = OMAP2_EAC_BASE + 0xfff,
 308                 .flags          = IORESOURCE_MEM,
 309         },
 310 };
 311
 312 static struct platform_device omap2_eac_device = {
 313         .name           = "omap24xx-eac",
 314         .id             = -1,
 315         .num_resources  = ARRAY_SIZE(omap2_eac_resources),
 316         .resource       = omap2_eac_resources,
 317         .dev = {
 318                 .platform_data = NULL,
 319         },
 320 };
 321
 322 void omap_init_eac(struct eac_platform_data *pdata)
 323 {
 324         omap2_eac_device.dev.platform_data = pdata;
 325         platform_device_register(&omap2_eac_device);
 326 }
 327
 328 #else
 329 void omap_init_eac(struct eac_platform_data *pdata) {}
 330 #endif
 331
 332 #ifdef CONFIG_OMAP_SHA1_MD5
 333 static struct resource sha1_md5_resources[] = {
 334         {
 335                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 336                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 337                 .flags  = IORESOURCE_MEM,
 338         },
 339         {
 340                 .start  = INT_24XX_SHA1MD5,
 341                 .flags  = IORESOURCE_IRQ,
 342         }
 343 };
 344
 345 static struct platform_device sha1_md5_device = {
 346         .name           = "OMAP SHA1/MD5",
 347         .id             = -1,
 348         .num_resources  = ARRAY_SIZE(sha1_md5_resources),
 349         .resource       = sha1_md5_resources,
 350 };
 351
 352 static void omap_init_sha1_md5(void)
 353 {
 354         platform_device_register(&sha1_md5_device);
 355 }
 356 #else
 357 static inline void omap_init_sha1_md5(void) { }
 358 #endif
 359
 360 /*-------------------------------------------------------------------------*/
 361
 362 #ifdef CONFIG_ARCH_OMAP3
 363
 364 #define MMCHS_SYSCONFIG                 0x0010
 365 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 366 #define MMCHS_SYSSTATUS                 0x0014
 367 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 368
 369 static struct platform_device dummy_pdev = {
 370         .dev = {
 371                 .bus = &platform_bus_type,
 372         },
 373 };
 374
 375 /**
 376  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 377  *
 378  * Ensure that each MMC controller is fully reset.  Controllers
 379  * left in an unknown state (by bootloader) may prevent retention
 380  * or OFF-mode.  This is especially important in cases where the
 381  * MMC driver is not enabled, _or_ built as a module.
 382  *
 383  * In order for reset to work, interface, functional and debounce
 384  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 385  * and is not under SW control, so we only enable i- and f-clocks.
 386  **/
 387 static void __init omap_hsmmc_reset(void)
 388 {
 389         u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
 390                 OMAP24XX_NR_MMC;
 391
 392         for (i = 0; i < nr_controllers; i++) {
 393                 u32 v, base = 0;
 394                 struct clk *iclk, *fclk;
 395                 struct device *dev = &dummy_pdev.dev;
 396
 397                 switch (i) {
 398                 case 0:
 399                         base = OMAP2_MMC1_BASE;
 400                         break;
 401                 case 1:
 402                         base = OMAP2_MMC2_BASE;
 403                         break;
 404                 case 2:
 405                         base = OMAP3_MMC3_BASE;
 406                         break;
 407                 }
 408
 409                 dummy_pdev.id = i;
 410                 iclk = clk_get(dev, "mmchs_ick");
 411                 if (iclk && clk_enable(iclk))
 412                         iclk = NULL;
 413
 414                 fclk = clk_get(dev, "mmchs_fck");
 415                 if (fclk && clk_enable(fclk))
 416                         fclk = NULL;
 417
 418                 if (!iclk || !fclk) {
 419                         printk(KERN_WARNING
 420                                "%s: Unable to enable clocks for MMC%d, "
 421                                "cannot reset.\n",  __func__, i);
 422                         break;
 423                 }
 424
 425                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 426                 v = omap_readl(base + MMCHS_SYSSTATUS);
 427                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 428                          MMCHS_SYSSTATUS_RESETDONE))
 429                         cpu_relax();
 430
 431                 if (fclk) {
 432                         clk_disable(fclk);
 433                         clk_put(fclk);
 434                 }
 435                 if (iclk) {
 436                         clk_disable(iclk);
 437                         clk_put(iclk);
 438                 }
 439         }
 440 }
 441 #else
 442 static inline void omap_hsmmc_reset(void) {}
 443 #endif
 444
 445 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 446         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 447
 448 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 449                         int controller_nr)
 450 {
 451         if (cpu_is_omap2420() && controller_nr == 0) {
 452                 omap_cfg_reg(H18_24XX_MMC_CMD);
 453                 omap_cfg_reg(H15_24XX_MMC_CLKI);
 454                 omap_cfg_reg(G19_24XX_MMC_CLKO);
 455                 omap_cfg_reg(F20_24XX_MMC_DAT0);
 456                 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
 457                 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
 458                 if (mmc_controller->slots[0].wires == 4) {
 459                         omap_cfg_reg(H14_24XX_MMC_DAT1);
 460                         omap_cfg_reg(E19_24XX_MMC_DAT2);
 461                         omap_cfg_reg(D19_24XX_MMC_DAT3);
 462                         omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
 463                         omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
 464                         omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
 465                 }
 466
 467                 /*
 468                  * Use internal loop-back in MMC/SDIO Module Input Clock
 469                  * selection
 470                  */
 471                 if (mmc_controller->slots[0].internal_clock) {
 472                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 473                         v |= (1 << 24);
 474                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 475                 }
 476         }
 477 }
 478
 479 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 480                         int nr_controllers)
 481 {
 482         int i;
 483
 484         for (i = 0; i < nr_controllers; i++) {
 485                 unsigned long base, size;
 486                 unsigned int irq = 0;
 487
 488                 if (!mmc_data[i])
 489                         continue;
 490
 491                 omap2_mmc_mux(mmc_data[i], i);
 492
 493                 switch (i) {
 494                 case 0:
 495                         base = OMAP2_MMC1_BASE;
 496                         irq = INT_24XX_MMC_IRQ;
 497                         break;
 498                 case 1:
 499                         base = OMAP2_MMC2_BASE;
 500                         irq = INT_24XX_MMC2_IRQ;
 501                         break;
 502                 case 2:
 503                         if (!cpu_is_omap34xx())
 504                                 return;
 505                         base = OMAP3_MMC3_BASE;
 506                         irq = INT_34XX_MMC3_IRQ;
 507                         break;
 508                 default:
 509                         continue;
 510                 }
 511
 512                 if (cpu_is_omap2420())
 513                         size = OMAP2420_MMC_SIZE;
 514                 else
 515                         size = HSMMC_SIZE;
 516
 517                 omap_mmc_add(i, base, size, irq, mmc_data[i]);
 518         };
 519 }
 520
 521 #endif
 522
 523 /*-------------------------------------------------------------------------*/
 524
 525 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 526 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 527 #define OMAP_HDQ_BASE   0x480B2000
 528 #endif
 529 static struct resource omap_hdq_resources[] = {
 530         {
 531                 .start          = OMAP_HDQ_BASE,
 532                 .end            = OMAP_HDQ_BASE + 0x1C,
 533                 .flags          = IORESOURCE_MEM,
 534         },
 535         {
 536                 .start          = INT_24XX_HDQ_IRQ,
 537                 .flags          = IORESOURCE_IRQ,
 538         },
 539 };
 540 static struct platform_device omap_hdq_dev = {
 541         .name = "omap_hdq",
 542         .id = 0,
 543         .dev = {
 544                 .platform_data = NULL,
 545         },
 546         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 547         .resource       = omap_hdq_resources,
 548 };
 549 static inline void omap_hdq_init(void)
 550 {
 551         (void) platform_device_register(&omap_hdq_dev);
 552 }
 553 #else
 554 static inline void omap_hdq_init(void) {}
 555 #endif
 556
 557 /*-------------------------------------------------------------------------*/
 558
 559 static int __init omap2_init_devices(void)
 560 {
 561         /* please keep these calls, and their implementations above,
 562          * in alphabetical order so they're easier to sort through.
 563          */
 564         omap_hsmmc_reset();
 565         omap_init_camera();
 566         omap_init_mbox();
 567         omap_init_mcspi();
 568         omap_hdq_init();
 569         omap_init_sti();
 570         omap_init_sha1_md5();
 571
 572         return 0;
 573 }
 574 arch_initcall(omap2_init_devices);