summary |
shortlog |
log |
commit | commitdiff |
tree
raw |
patch |
inline | side by side (from parent 1:
03c0333)
Previously the individual clock recalculation functions handled their
own rate recalculation. This can be handled in the clk_set_rate(),
clk_set_parent(), and recalculate_root_clocks() functions in
plat-omap/clock.c. Removes duplicate code and clarifies the role of the
recalc functions.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
-
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
}
static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
if (unlikely(clk->rate == clk->parent->rate / dsor))
return; /* No change, quick exit */
clk->rate = clk->parent->rate / dsor;
-
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
/* MPU virtual clock functions */
}
/* MPU virtual clock functions */
- if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
- propagate_rate(clk);
-
omap_writel(l, MOD_CONF_CTRL_1);
clk->rate = p_rate / (div + 1);
omap_writel(l, MOD_CONF_CTRL_1);
clk->rate = p_rate / (div + 1);
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
- if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
- propagate_rate(clk);
-
WARN_ON(!clk->fixed_div);
clk->rate = clk->parent->rate / clk->fixed_div;
WARN_ON(!clk->fixed_div);
clk->rate = clk->parent->rate / clk->fixed_div;
-
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
clk->rate = clk->parent->rate / div;
pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div);
clk->rate = clk->parent->rate / div;
pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div);
-
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
if (clk->set_rate != NULL)
ret = clk->set_rate(clk, rate);
if (clk->set_rate != NULL)
ret = clk->set_rate(clk, rate);
- if (ret == 0 && (clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
-
pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
clk->name, clk->parent->name, clk->rate);
pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
clk->name, clk->parent->name, clk->rate);
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
-
static void omap2_dpllcore_recalc(struct clk *clk)
{
clk->rate = omap2xxx_clk_get_core_rate(clk);
static void omap2_dpllcore_recalc(struct clk *clk)
{
clk->rate = omap2xxx_clk_get_core_rate(clk);
}
static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
}
static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
omap2xxx_sdrc_reprogram(done_rate, 0);
}
omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
omap2xxx_sdrc_reprogram(done_rate, 0);
}
- omap2_dpllcore_recalc(&dpll_ck);
local_irq_restore(flags);
}
local_irq_restore(flags);
}
- omap2_dpllcore_recalc(&dpll_ck);
static void omap2_osc_clk_recalc(struct clk *clk)
{
clk->rate = omap2_get_apll_clkin() * omap2_get_sysclkdiv();
static void omap2_osc_clk_recalc(struct clk *clk)
{
clk->rate = omap2_get_apll_clkin() * omap2_get_sysclkdiv();
}
static void omap2_sys_clk_recalc(struct clk *clk)
{
clk->rate = clk->parent->rate / omap2_get_sysclkdiv();
}
static void omap2_sys_clk_recalc(struct clk *clk)
{
clk->rate = clk->parent->rate / omap2_get_sysclkdiv();
static void omap3_dpll_recalc(struct clk *clk)
{
clk->rate = omap2_get_dpll_rate(clk);
static void omap3_dpll_recalc(struct clk *clk)
{
clk->rate = omap2_get_dpll_rate(clk);
}
/* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
}
/* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
- omap3_dpll_recalc(clk);
-
sp->actim_ctrlb, new_div);
local_irq_enable();
sp->actim_ctrlb, new_div);
local_irq_enable();
- omap2_clksel_recalc(clk);
-
clk->rate = clk->parent->rate;
else
clk->rate = clk->parent->rate * 2;
clk->rate = clk->parent->rate;
else
clk->rate = clk->parent->rate * 2;
-
- if (clk->flags & RATE_PROPAGATES)
- propagate_rate(clk);
}
/* Common clock code */
}
/* Common clock code */
return ret;
spin_lock_irqsave(&clockfw_lock, flags);
return ret;
spin_lock_irqsave(&clockfw_lock, flags);
- if (arch_clock->clk_set_rate)
+
+ if (arch_clock->clk_set_rate) {
ret = arch_clock->clk_set_rate(clk, rate);
ret = arch_clock->clk_set_rate(clk, rate);
+ if (ret == 0) {
+ (*clk->recalc)(clk);
+ if (clk->flags & RATE_PROPAGATES)
+ propagate_rate(clk);
+ }
+ }
+
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
return ret;
spin_lock_irqsave(&clockfw_lock, flags);
return ret;
spin_lock_irqsave(&clockfw_lock, flags);
- if (arch_clock->clk_set_parent)
- ret = arch_clock->clk_set_parent(clk, parent);
+
+ if (arch_clock->clk_set_parent) {
+ ret = arch_clock->clk_set_parent(clk, parent);
+ if (ret == 0) {
+ (*clk->recalc)(clk);
+ if (clk->flags & RATE_PROPAGATES)
+ propagate_rate(clk);
+ }
+ }
+
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
return;
clk->rate = clk->parent->rate;
return;
clk->rate = clk->parent->rate;
- if (unlikely(clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
}
/* Propagate rate to children */
}
/* Propagate rate to children */
list_for_each_entry(clkp, &clocks, node) {
if (likely(clkp->parent != tclk))
continue;
list_for_each_entry(clkp, &clocks, node) {
if (likely(clkp->parent != tclk))
continue;
- if (likely((u32)clkp->recalc))
+ if (likely((u32)clkp->recalc)) {
+ if (clkp->flags & RATE_PROPAGATES)
+ propagate_rate(clkp);
+ }
struct clk *clkp;
list_for_each_entry(clkp, &clocks, node) {
struct clk *clkp;
list_for_each_entry(clkp, &clocks, node) {
- if (unlikely(!clkp->parent) && likely((u32)clkp->recalc))
+ if (unlikely(!clkp->parent) && likely((u32)clkp->recalc)) {
+ if (clkp->flags & RATE_PROPAGATES)
+ propagate_rate(clkp);
+ }