OMAP clock: drop RATE_FIXED

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / clock24xx.h

diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 8bf70cfa3230ec4cbb4c4a886e0b3e3792974035..824413d17c51f43b400d0c4b2d6887bc2bf2cfa6 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -24,13 +24,16 @@
 #include "cm-regbits-24xx.h"
 #include "sdrc.h"
 
-static void omap2_table_mpu_recalc(struct clk *clk);
+static void omap2_table_mpu_recalc(struct clk *clk, unsigned long parent_rate,
+                                  u8 rate_storage);
 static int omap2_select_table_rate(struct clk *clk, unsigned long rate);
 static long omap2_round_to_table_rate(struct clk *clk, unsigned long rate);
-static void omap2_sys_clk_recalc(struct clk *clk);
-static void omap2_osc_clk_recalc(struct clk *clk);
-static void omap2_sys_clk_recalc(struct clk *clk);
-static void omap2_dpllcore_recalc(struct clk *clk);
+static void omap2_sys_clk_recalc(struct clk *clk, unsigned long parent_rate,
+                                u8 rate_storage);
+static void omap2_osc_clk_recalc(struct clk *clk, unsigned long parent_rate,
+                                u8 rate_storage);
+static void omap2_dpllcore_recalc(struct clk *clk, unsigned long parent_rate,
+                                u8 rate_storage);
 static int omap2_clk_fixed_enable(struct clk *clk);
 static void omap2_clk_fixed_disable(struct clk *clk);
 static int omap2_enable_osc_ck(struct clk *clk);
@@ -625,16 +628,14 @@ static struct clk func_32k_ck = {
        .name           = "func_32k_ck",
        .rate           = 32000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
-       .recalc         = &propagate_rate,
 };
 
 /* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */
 static struct clk osc_ck = {           /* (*12, *13, 19.2, *26, 38.4)MHz */
        .name           = "osc_ck",
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm          = { .name = "prm_clkdm" },
        .enable         = &omap2_enable_osc_ck,
        .disable        = &omap2_disable_osc_ck,
@@ -646,7 +647,7 @@ static struct clk sys_ck = {                /* (*12, *13, 19.2, 26, 38.4)MHz */
        .name           = "sys_ck",             /* ~ ref_clk also */
        .parent         = &osc_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               ALWAYS_ENABLED | RATE_PROPAGATES,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_sys_clk_recalc,
 };
@@ -655,9 +656,8 @@ static struct clk alt_ck = {                /* Typical 54M or 48M, may not exist */
        .name           = "alt_ck",
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
-       .recalc         = &propagate_rate,
 };
 
 /*
@@ -673,9 +673,10 @@ static struct dpll_data dpll_dd = {
        .mult_div1_reg          = CM_CLKSEL1,
        .mult_mask              = OMAP24XX_DPLL_MULT_MASK,
        .div1_mask              = OMAP24XX_DPLL_DIV_MASK,
-       .idlest_reg             = CM_IDLEST,
-       .idlest_mask            = OMAP24XX_ST_CORE_CLK_MASK,
+       .control_reg            = CM_CLKEN,
+       .enable_mask            = OMAP24XX_EN_DPLL_MASK,
        .max_multiplier         = 1024,
+       .min_divider            = 1,
        .max_divider            = 16,
        .rate_tolerance         = DEFAULT_DPLL_RATE_TOLERANCE
 };
@@ -690,7 +691,7 @@ static struct clk dpll_ck = {
        .prcm_mod       = PLL_MOD,
        .dpll_data      = &dpll_dd,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES | ALWAYS_ENABLED,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "prm_clkdm" },
        .recalc         = &omap2_dpllcore_recalc,
        .set_rate       = &omap2_reprogram_dpllcore,
@@ -702,13 +703,12 @@ static struct clk apll96_ck = {
        .prcm_mod       = PLL_MOD,
        .rate           = 96000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
+                               ENABLE_ON_INIT,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_CLKEN,
        .enable_bit     = OMAP24XX_EN_96M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
        .disable        = &omap2_clk_fixed_disable,
-       .recalc         = &propagate_rate,
 };
 
 static struct clk apll54_ck = {
@@ -717,13 +717,12 @@ static struct clk apll54_ck = {
        .prcm_mod       = PLL_MOD,
        .rate           = 54000000,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
+                               ENABLE_ON_INIT,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = CM_CLKEN,
        .enable_bit     = OMAP24XX_EN_54M_PLL_SHIFT,
        .enable         = &omap2_clk_fixed_enable,
        .disable        = &omap2_clk_fixed_disable,
-       .recalc         = &propagate_rate,
 };
 
 /*
@@ -753,7 +752,7 @@ static struct clk func_54m_ck = {
        .parent         = &apll54_ck,   /* can also be alt_clk */
        .prcm_mod       = PLL_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
+                               PARENT_CONTROLS_CLOCK,
        .clkdm          = { .name = "cm_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = CM_CLKSEL1,
@@ -766,7 +765,7 @@ static struct clk core_ck = {
        .name           = "core_ck",
        .parent         = &dpll_ck,             /* can also be 32k */
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               ALWAYS_ENABLED | RATE_PROPAGATES,
+                               ALWAYS_ENABLED,
        .clkdm          = { .name = "cm_clkdm" },
        .recalc         = &followparent_recalc,
 };
@@ -794,7 +793,7 @@ static struct clk func_96m_ck = {
        .parent         = &apll96_ck,
        .prcm_mod       = PLL_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
+                               PARENT_CONTROLS_CLOCK,
        .clkdm          = { .name = "cm_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = CM_CLKSEL1,
@@ -828,7 +827,7 @@ static struct clk func_48m_ck = {
        .parent         = &apll96_ck,    /* 96M or Alt */
        .prcm_mod       = PLL_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
+                               PARENT_CONTROLS_CLOCK,
        .clkdm          = { .name = "cm_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = CM_CLKSEL1,
@@ -844,7 +843,7 @@ static struct clk func_12m_ck = {
        .parent         = &func_48m_ck,
        .fixed_div      = 4,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
+                               PARENT_CONTROLS_CLOCK,
        .clkdm          = { .name = "cm_clkdm" },
        .recalc         = &omap2_fixed_divisor_recalc,
 };
@@ -898,8 +897,7 @@ static struct clk sys_clkout_src = {
        .name           = "sys_clkout_src",
        .parent         = &func_54m_ck,
        .prcm_mod       = OMAP24XX_GR_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               RATE_PROPAGATES,
+       .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .clkdm          = { .name = "prm_clkdm" },
        .enable_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
        .enable_bit     = OMAP24XX_CLKOUT_EN_SHIFT,
@@ -946,7 +944,7 @@ static struct clk sys_clkout2_src = {
        .name           = "sys_clkout2_src",
        .parent         = &func_54m_ck,
        .prcm_mod       = OMAP24XX_GR_MOD,
-       .flags          = CLOCK_IN_OMAP242X | RATE_PROPAGATES,
+       .flags          = CLOCK_IN_OMAP242X,
        .clkdm          = { .name = "cm_clkdm" },
        .enable_reg     = OMAP24XX_PRCM_CLKOUT_CTRL_OFFSET,
        .enable_bit     = OMAP2420_CLKOUT2_EN_SHIFT,
@@ -1021,7 +1019,7 @@ static struct clk mpu_ck = {      /* Control cpu */
        .prcm_mod       = MPU_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ALWAYS_ENABLED | DELAYED_APP |
-                               CONFIG_PARTICIPANT | RATE_PROPAGATES,
+                               CONFIG_PARTICIPANT,
        .clkdm          = { .name = "mpu_clkdm" },
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = CM_CLKSEL,
@@ -1064,7 +1062,7 @@ static struct clk dsp_fck = {
        .parent         = &core_ck,
        .prcm_mod       = OMAP24XX_DSP_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
-                               CONFIG_PARTICIPANT | RATE_PROPAGATES,
+                               CONFIG_PARTICIPANT,
        .clkdm          = { .name = "dsp_clkdm" },
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
@@ -1136,8 +1134,7 @@ static struct clk iva1_ifck = {
        .name           = "iva1_ifck",
        .parent         = &core_ck,
        .prcm_mod       = OMAP24XX_DSP_MOD,
-       .flags          = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT |
-                               RATE_PROPAGATES | DELAYED_APP,
+       .flags          = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT | DELAYED_APP,
        .clkdm          = { .name = "iva1_clkdm" },
        .enable_reg     = CM_FCLKEN,
        .enable_bit     = OMAP2420_EN_IVA_COP_SHIFT,
@@ -1203,7 +1200,7 @@ static struct clk core_l3_ck = {  /* Used for ick and fck, interconnect */
        .prcm_mod       = CORE_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                ALWAYS_ENABLED | DELAYED_APP |
-                               CONFIG_PARTICIPANT | RATE_PROPAGATES,
+                               CONFIG_PARTICIPANT,
        .clkdm          = { .name = "core_l3_clkdm" },
        .clksel_reg     = CM_CLKSEL1,
        .clksel_mask    = OMAP24XX_CLKSEL_L3_MASK,
@@ -1268,7 +1265,7 @@ static struct clk l4_ck = {               /* used both as an ick and fck */
        .parent         = &core_l3_ck,
        .prcm_mod       = CORE_MOD,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
-                               ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES,
+                               ALWAYS_ENABLED | DELAYED_APP,
        .clkdm          = { .name = "core_l4_clkdm" },
        .clksel_reg     = CM_CLKSEL1,
        .clksel_mask    = OMAP24XX_CLKSEL_L4_MASK,
@@ -2500,7 +2497,7 @@ static struct clk i2c2_fck = {
 };
 
 static struct clk i2chs2_fck = {
-       .name           = "i2chs_fck",
+       .name           = "i2c_fck",
        .id             = 2,
        .parent         = &func_96m_ck,
        .prcm_mod       = CORE_MOD,
@@ -2538,7 +2535,7 @@ static struct clk i2c1_fck = {
 };
 
 static struct clk i2chs1_fck = {
-       .name           = "i2chs_fck",
+       .name           = "i2c_fck",
        .id             = 1,
        .parent         = &func_96m_ck,
        .prcm_mod       = CORE_MOD,