From f50b9fef9b94e4305941a5f28e44dbd042aa44d3 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Fri, 19 Oct 2007 14:14:15 -0700 Subject: [PATCH] ARM: OMAP: fix default sys_ck.rate for boot-time DPLL detection In the clock init code, the DPLL value set by the bootloader is queried, but always turns zero due it's parent clock (sys_ck) having no default rate. This results in the improper setting of the default PRCM rate-table entry and any queries of virt_prcm_set rate to return 0. Rather than setting a static sys_ck.rate, detect the correct value at boot time. Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock24xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index 96228948721..58856d30ef0 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c @@ -475,6 +475,7 @@ int __init omap2_clk_init(void) clk_init(&omap2_clk_functions); omap2_osc_clk_recalc(&osc_ck); + omap2_sys_clk_recalc(&sys_ck); for (clkp = onchip_24xx_clks; clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks); -- 2.41.0